From: Zhou Wang <wangzhou1@hisilicon.com>
To: Herbert Xu <herbert@gondor.apana.org.au>
Cc: "David S . Miller" <davem@davemloft.net>,
<linux-crypto@vger.kernel.org>, <linuxarm@huawei.com>,
<linux-kernel@vger.kernel.org>,
Kenneth Lee <liguozhu@hisilicon.com>,
Shiju Jose <shiju.jose@huawei.com>,
Hao Fang <fanghao11@huawei.com>
Subject: Re: [PATCH v2 2/4] crypto: hisilicon: Add queue management driver for HiSilicon QM module
Date: Fri, 1 Feb 2019 15:15:54 +0800 [thread overview]
Message-ID: <5C53F22A.2020804@hisilicon.com> (raw)
In-Reply-To: <20190201052229.wnjeirur6ephew7y@gondor.apana.org.au>
On 2019/2/1 13:22, Herbert Xu wrote:
> On Wed, Jan 23, 2019 at 09:08:51PM +0800, Zhou Wang wrote:
>>
>> +/**
>> + * hisi_qp_poll() - Poll current cqe to see if a task is finished.
>> + * @qp: The qp which will poll.
>> + *
>> + * This function polls current cqe for a give qp to see if a task is finished.
>> + * Return -ETIME if timeout.
>> + */
>> +int hisi_qp_poll(struct hisi_qp *qp)
>> +{
>> + struct qm_cqe *cqe = qp->cqe + qp->qp_status.cq_head;
>> + struct qm_cqc *cqc = qp->cqc;
>> + int retries = 1000;
>> +
>> + while (!(QM_CQE_PHASE(cqe) == (cqc->dw6 & 0x1))) {
>> + dma_rmb();
>> + if (!--retries) {
>> + dev_err(&qp->qm->pdev->dev, "Poll cqe failed!\n");
>> + return -ETIME;
>> + }
>> + udelay(10);
>> + }
>> +
>> + qm_cq_head_update(qp);
>> + atomic_dec(&qp->qp_status.used);
>> +
>> + qm_db(qp->qm, qp->qp_id, QM_DOORBELL_CMD_CQ, qp->qp_status.cq_head, 0);
>> + /* set c_flag */
>> + qm_db(qp->qm, qp->qp_id, QM_DOORBELL_CMD_CQ, qp->qp_status.cq_head, 1);
>> +
>> + return 0;
>> +}
>> +EXPORT_SYMBOL_GPL(hisi_qp_poll);
>
> Polling in softirq context is unacceptable. Can't your hardware
> send interrupts to signal completion? What is the average speed
> of processing a single 1500-byte packet on your hardware?
Our hardware supports interrupt. In fact, implementation of compress/decompress
interface of crypto_alg in v1 was done using interrupt:
compress/decompress:
send task to hardware
wait task finished(wait_for_completion_timeout)
In irq handler:
complete
However, there is get_cpu/put_cpu in scomp, wait and complete in above has to be
changed to poll:
compress/decompress:
send task to hardware
check if task is finished
The average speed of this zip engine is 7.5GB/s, so it will take about 0.2us to
process 1500B.
Best,
Zhou
>
> Cheers,
>
next prev parent reply other threads:[~2019-02-01 7:15 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-23 13:08 [PATCH v2 0/4] crypto: hisilicon: Add HiSilicon QM and ZIP controller driver Zhou Wang
2019-01-23 13:08 ` [PATCH v2 1/4] Documentation: Add debugfs doc for hisi_zip Zhou Wang
2019-01-23 13:08 ` [PATCH v2 2/4] crypto: hisilicon: Add queue management driver for HiSilicon QM module Zhou Wang
2019-02-01 5:22 ` Herbert Xu
2019-02-01 7:15 ` Zhou Wang [this message]
2019-02-01 15:39 ` Herbert Xu
2019-02-02 2:25 ` Zhou Wang
2019-02-20 4:10 ` Herbert Xu
2019-02-20 6:50 ` Zhou Wang
2019-01-23 13:08 ` [PATCH v2 3/4] crypto: hisilicon: Add HiSilicon ZIP accelerator support Zhou Wang
2019-01-23 13:08 ` [PATCH v2 4/4] MAINTAINERS: add maintainer for HiSilicon QM and ZIP controller driver Zhou Wang
2019-01-29 1:19 ` [PATCH v2 0/4] crypto: hisilicon: Add " Zhou Wang
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