From mboxrd@z Thu Jan 1 00:00:00 1970 From: Neil Armstrong Subject: Re: [PATCH v10 1/2] drm/fourcc: Add new P010, P016 video format Date: Fri, 08 Feb 2019 22:11:17 +0100 Message-ID: <5C5DF075.4090702@baylibre.com> References: <20190109195710.28501-1-ayaka@soulik.info> <20190109195710.28501-2-ayaka@soulik.info> <20190114163645.GA16349@arm.com> <81f3b266-10d4-f230-c59b-79931e2e3188@baylibre.com> <20190208155107.GN23159@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20190208155107.GN23159@phenom.ffwll.local> Sender: linux-kernel-owner@vger.kernel.org To: Ayan Halder , Randy Li , "airlied@linux.ie" , nd , "mchehab+samsung@kernel.org" , "maxime.ripard@bootlin.com" , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , "sakari.ailus@iki.fi" , "laurent.pinchart@ideasonboard.com" , "mikhail.v.gavrilov@gmail.com" , "mchehab@kernel.org" , "sean@poorly.run" , "linux-media@vger.kernel.org" List-Id: dri-devel@lists.freedesktop.org Le 08/02/2019 16:51, Daniel Vetter a écrit : > On Thu, Feb 07, 2019 at 10:44:10AM +0100, Neil Armstrong wrote: >> Hi, >> >> On 14/01/2019 17:36, Ayan Halder wrote: >>> On Thu, Jan 10, 2019 at 03:57:09AM +0800, Randy Li wrote: >>>> P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits per >>>> channel video format. >>>> >>>> P012 is a planar 4:2:0 YUV 12 bits per channel >>>> >>>> P016 is a planar 4:2:0 YUV with interleaved UV plane, 16 bits per >>>> channel video format. >>>> >>>> V3: Added P012 and fixed cpp for P010. >>>> V4: format definition refined per review. >>>> V5: Format comment block for each new pixel format. >>>> V6: reversed Cb/Cr order in comments. >>>> v7: reversed Cb/Cr order in comments of header files, remove >>>> the wrong part of commit message. >>>> V8: reversed V7 changes except commit message and rebased. >>>> v9: used the new properties to describe those format and >>>> rebased. >>>> >>>> Cc: Daniel Stone >>>> Cc: Ville Syrj??l?? >>>> >>>> Signed-off-by: Randy Li >>>> Signed-off-by: Clint Taylor >>>> --- >>>> drivers/gpu/drm/drm_fourcc.c | 9 +++++++++ >>>> include/uapi/drm/drm_fourcc.h | 21 +++++++++++++++++++++ >>>> 2 files changed, 30 insertions(+) >>>> >>>> diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c >>>> index d90ee03a84c6..ba7e19d4336c 100644 >>>> --- a/drivers/gpu/drm/drm_fourcc.c >>>> +++ b/drivers/gpu/drm/drm_fourcc.c >>>> @@ -238,6 +238,15 @@ const struct drm_format_info *__drm_format_info(u32 format) >>>> { .format = DRM_FORMAT_X0L2, .depth = 0, .num_planes = 1, >>>> .char_per_block = { 8, 0, 0 }, .block_w = { 2, 0, 0 }, .block_h = { 2, 0, 0 }, >>>> .hsub = 2, .vsub = 2, .is_yuv = true }, >>>> + { .format = DRM_FORMAT_P010, .depth = 0, .num_planes = 2, >>>> + .char_per_block = { 2, 4, 0 }, .block_w = { 1, 0, 0 }, .block_h = { 1, 0, 0 }, >>>> + .hsub = 2, .vsub = 2, .is_yuv = true}, >>>> + { .format = DRM_FORMAT_P012, .depth = 0, .num_planes = 2, >>>> + .char_per_block = { 2, 4, 0 }, .block_w = { 1, 0, 0 }, .block_h = { 1, 0, 0 }, >>>> + .hsub = 2, .vsub = 2, .is_yuv = true}, >>>> + { .format = DRM_FORMAT_P016, .depth = 0, .num_planes = 2, >>>> + .char_per_block = { 2, 4, 0 }, .block_w = { 1, 0, 0 }, .block_h = { 1, 0, 0 }, >>>> + .hsub = 2, .vsub = 2, .is_yuv = true}, >>>> }; >>>> >>>> unsigned int i; >>>> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h >>>> index 0b44260a5ee9..8dd1328bc8d6 100644 >>>> --- a/include/uapi/drm/drm_fourcc.h >>>> +++ b/include/uapi/drm/drm_fourcc.h >>>> @@ -195,6 +195,27 @@ extern "C" { >>>> #define DRM_FORMAT_NV24 fourcc_code('N', 'V', '2', '4') /* non-subsampled Cr:Cb plane */ >>>> #define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */ >>>> >>>> +/* >>>> + * 2 plane YCbCr MSB aligned >>>> + * index 0 = Y plane, [15:0] Y:x [10:6] little endian >>>> + * index 1 = Cr:Cb plane, [31:0] Cr:x:Cb:x [10:6:10:6] little endian >>>> + */ >>>> +#define DRM_FORMAT_P010 fourcc_code('P', '0', '1', '0') /* 2x2 subsampled Cr:Cb plane 10 bits per channel */ >>>> + >>>> +/* >>>> + * 2 plane YCbCr MSB aligned >>>> + * index 0 = Y plane, [15:0] Y:x [12:4] little endian >>>> + * index 1 = Cr:Cb plane, [31:0] Cr:x:Cb:x [12:4:12:4] little endian >>>> + */ >>>> +#define DRM_FORMAT_P012 fourcc_code('P', '0', '1', '2') /* 2x2 subsampled Cr:Cb plane 12 bits per channel */ >>>> + >>>> +/* >>>> + * 2 plane YCbCr MSB aligned >>>> + * index 0 = Y plane, [15:0] Y little endian >>>> + * index 1 = Cr:Cb plane, [31:0] Cr:Cb [16:16] little endian >>>> + */ >>>> +#define DRM_FORMAT_P016 fourcc_code('P', '0', '1', '6') /* 2x2 subsampled Cr:Cb plane 16 bits per channel */ >>>> + >>> >>> looks good to me. >>> Reviewed by:- Ayan Kumar Halder >>> >>> We are using P010 format for our mali display driver. Our AFBC patch >>> series(https://patchwork.freedesktop.org/series/53395/) is dependent >>> on this patch. So, that's why I wanted to know when you are planning to >>> merge this. As far as I remember, Juha wanted to implement some igt >>> tests >>> (https://lists.freedesktop.org/archives/intel-gfx/2018-September/174877.html) >>> , so is that done now? >>> >>> My apologies if I am pushing hard on this. >> >> Looks good to me aswell, >> >> Reviewed by: Neil Armstrong >> >> Seems we will also need P010 to support the Amlogic Compressed modifier to display >> compressed frames from the HW decoder. >> >> I can apply this to drm-misc-next if everyone is ok > > Matches what's still flaoting around by intel devs: > > https://patchwork.freedesktop.org/patch/284801/ > > Except this one uses the new block descriptors and has much neater > comments. > > Reviewed-by: Daniel Vetter > > Please push to drm-misc-next asap so intel folks aren't blocked. > > Thanks, Daniel Applying now, thanks ! Neil > >> >> Neil >> >>>> /* >>>> * 3 plane YCbCr >>>> * index 0: Y plane, [7:0] Y >>>> -- >>>> 2.20.1 >>>> >>>> _______________________________________________ >>>> dri-devel mailing list >>>> dri-devel@lists.freedesktop.org >>>> https://lists.freedesktop.org/mailman/listinfo/dri-devel >>> _______________________________________________ >>> dri-devel mailing list >>> dri-devel@lists.freedesktop.org >>> https://lists.freedesktop.org/mailman/listinfo/dri-devel >>> >> >