* [PATCH v2 0/3] ARM: meson: add p200 and p201 boards @ 2019-03-14 17:00 ` Mohammad Rasim 0 siblings, 0 replies; 14+ messages in thread From: Mohammad Rasim @ 2019-03-14 17:00 UTC (permalink / raw) To: u-boot, u-boot-amlogic; +Cc: Mohammad Rasim, narmstrong This adds support for p200 and p201 reference boards from amlogic Mohammad Rasim (3): ARM: dts: meson: add p200 and p201 boards ARM: board: meson: add p201 board ARM: board: meson: add p200 board arch/arm/dts/Makefile | 2 + arch/arm/dts/meson-gxbb-p200.dts | 99 +++++++++++ arch/arm/dts/meson-gxbb-p201.dts | 26 +++ arch/arm/dts/meson-gxbb-p20x.dtsi | 247 ++++++++++++++++++++++++++++ board/amlogic/odroid-c2/README.p200 | 103 ++++++++++++ board/amlogic/p201/MAINTAINERS | 6 + board/amlogic/p201/Makefile | 5 + board/amlogic/p201/README.p201 | 103 ++++++++++++ board/amlogic/p201/p201.c | 43 +++++ configs/p200_defconfig | 41 +++++ configs/p201_defconfig | 41 +++++ 11 files changed, 716 insertions(+) create mode 100644 arch/arm/dts/meson-gxbb-p200.dts create mode 100644 arch/arm/dts/meson-gxbb-p201.dts create mode 100644 arch/arm/dts/meson-gxbb-p20x.dtsi create mode 100644 board/amlogic/odroid-c2/README.p200 create mode 100644 board/amlogic/p201/MAINTAINERS create mode 100644 board/amlogic/p201/Makefile create mode 100644 board/amlogic/p201/README.p201 create mode 100644 board/amlogic/p201/p201.c create mode 100644 configs/p200_defconfig create mode 100644 configs/p201_defconfig -- 2.21.0 ^ permalink raw reply [flat|nested] 14+ messages in thread
* [U-Boot] [PATCH v2 0/3] ARM: meson: add p200 and p201 boards @ 2019-03-14 17:00 ` Mohammad Rasim 0 siblings, 0 replies; 14+ messages in thread From: Mohammad Rasim @ 2019-03-14 17:00 UTC (permalink / raw) To: u-boot This adds support for p200 and p201 reference boards from amlogic Mohammad Rasim (3): ARM: dts: meson: add p200 and p201 boards ARM: board: meson: add p201 board ARM: board: meson: add p200 board arch/arm/dts/Makefile | 2 + arch/arm/dts/meson-gxbb-p200.dts | 99 +++++++++++ arch/arm/dts/meson-gxbb-p201.dts | 26 +++ arch/arm/dts/meson-gxbb-p20x.dtsi | 247 ++++++++++++++++++++++++++++ board/amlogic/odroid-c2/README.p200 | 103 ++++++++++++ board/amlogic/p201/MAINTAINERS | 6 + board/amlogic/p201/Makefile | 5 + board/amlogic/p201/README.p201 | 103 ++++++++++++ board/amlogic/p201/p201.c | 43 +++++ configs/p200_defconfig | 41 +++++ configs/p201_defconfig | 41 +++++ 11 files changed, 716 insertions(+) create mode 100644 arch/arm/dts/meson-gxbb-p200.dts create mode 100644 arch/arm/dts/meson-gxbb-p201.dts create mode 100644 arch/arm/dts/meson-gxbb-p20x.dtsi create mode 100644 board/amlogic/odroid-c2/README.p200 create mode 100644 board/amlogic/p201/MAINTAINERS create mode 100644 board/amlogic/p201/Makefile create mode 100644 board/amlogic/p201/README.p201 create mode 100644 board/amlogic/p201/p201.c create mode 100644 configs/p200_defconfig create mode 100644 configs/p201_defconfig -- 2.21.0 ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 1/3] ARM: dts: meson: add p200 and p201 boards 2019-03-14 17:00 ` [U-Boot] " Mohammad Rasim @ 2019-03-14 17:00 ` Mohammad Rasim -1 siblings, 0 replies; 14+ messages in thread From: Mohammad Rasim @ 2019-03-14 17:00 UTC (permalink / raw) To: u-boot, u-boot-amlogic; +Cc: Mohammad Rasim, narmstrong This adds the device trees for p200 and p201 boards. Synced from kernel 5.0.0 revision a667cb7a94d48a483fb5d6006fe04a440f1a42ce. Signed-off-by: Mohammad Rasim <mohammad.rasim96@gmail.com> --- arch/arm/dts/Makefile | 2 + arch/arm/dts/meson-gxbb-p200.dts | 99 ++++++++++++ arch/arm/dts/meson-gxbb-p201.dts | 26 ++++ arch/arm/dts/meson-gxbb-p20x.dtsi | 247 ++++++++++++++++++++++++++++++ 4 files changed, 374 insertions(+) create mode 100644 arch/arm/dts/meson-gxbb-p200.dts create mode 100644 arch/arm/dts/meson-gxbb-p201.dts create mode 100644 arch/arm/dts/meson-gxbb-p20x.dtsi diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 2a040b20a5..adf5f26fac 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -60,6 +60,8 @@ dtb-$(CONFIG_ARCH_MESON) += \ meson-gxbb-nanopi-k2.dtb \ meson-gxbb-odroidc2.dtb \ meson-gxbb-nanopi-k2.dtb \ + meson-gxbb-p200.dtb \ + meson-gxbb-p201.dtb \ meson-gxl-s905x-p212.dtb \ meson-gxl-s905x-libretech-cc.dtb \ meson-gxl-s905x-khadas-vim.dtb \ diff --git a/arch/arm/dts/meson-gxbb-p200.dts b/arch/arm/dts/meson-gxbb-p200.dts new file mode 100644 index 0000000000..9d2406a7c4 --- /dev/null +++ b/arch/arm/dts/meson-gxbb-p200.dts @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2016 Andreas Färber + * Copyright (c) 2016 BayLibre, Inc. + * Author: Kevin Hilman <khilman@kernel.org> + */ + +/dts-v1/; + +#include "meson-gxbb-p20x.dtsi" +#include <dt-bindings/input/input.h> + +/ { + compatible = "amlogic,p200", "amlogic,meson-gxbb"; + model = "Amlogic Meson GXBB P200 Development Board"; + + avdd18_usb_adc: regulator-avdd18_usb_adc { + compatible = "regulator-fixed"; + regulator-name = "AVDD18_USB_ADC"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + adc_keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + + button-home { + label = "Home"; + linux,code = <KEY_HOME>; + press-threshold-microvolt = <900000>; /* 50% */ + }; + + button-esc { + label = "Esc"; + linux,code = <KEY_ESC>; + press-threshold-microvolt = <684000>; /* 38% */ + }; + + button-up { + label = "Volume Up"; + linux,code = <KEY_VOLUMEUP>; + press-threshold-microvolt = <468000>; /* 26% */ + }; + + button-down { + label = "Volume Down"; + linux,code = <KEY_VOLUMEDOWN>; + press-threshold-microvolt = <252000>; /* 14% */ + }; + + button-menu { + label = "Menu"; + linux,code = <KEY_MENU>; + press-threshold-microvolt = <0>; /* 0% */ + }; + }; +}; + +ðmac { + status = "okay"; + pinctrl-0 = <ð_rgmii_pins>; + pinctrl-names = "default"; + phy-handle = <ð_phy0>; + phy-mode = "rgmii"; + + amlogic,tx-delay-ns = <2>; + + snps,reset-gpio = <&gpio GPIOZ_14 0>; + snps,reset-delays-us = <0 10000 1000000>; + snps,reset-active-low; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + eth_phy0: ethernet-phy@3 { + /* Micrel KSZ9031 (0x00221620) */ + reg = <3>; + interrupt-parent = <&gpio_intc>; + /* MAC_INTR on GPIOZ_15 */ + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; + }; + }; +}; + +&i2c_B { + status = "okay"; + pinctrl-0 = <&i2c_b_pins>; + pinctrl-names = "default"; +}; + +&saradc { + status = "okay"; + vref-supply = <&avdd18_usb_adc>; +}; diff --git a/arch/arm/dts/meson-gxbb-p201.dts b/arch/arm/dts/meson-gxbb-p201.dts new file mode 100644 index 0000000000..56e0dd1ff5 --- /dev/null +++ b/arch/arm/dts/meson-gxbb-p201.dts @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2016 Andreas Färber + * Copyright (c) 2016 BayLibre, Inc. + * Author: Kevin Hilman <khilman@kernel.org> + */ + +/dts-v1/; + +#include "meson-gxbb-p20x.dtsi" + +/ { + compatible = "amlogic,p201", "amlogic,meson-gxbb"; + model = "Amlogic Meson GXBB P201 Development Board"; +}; + +ðmac { + status = "okay"; + pinctrl-0 = <ð_rmii_pins>; + pinctrl-names = "default"; + phy-mode = "rmii"; + + snps,reset-gpio = <&gpio GPIOZ_14 0>; + snps,reset-delays-us = <0 10000 1000000>; + snps,reset-active-low; +}; diff --git a/arch/arm/dts/meson-gxbb-p20x.dtsi b/arch/arm/dts/meson-gxbb-p20x.dtsi new file mode 100644 index 0000000000..0be0f2a5d2 --- /dev/null +++ b/arch/arm/dts/meson-gxbb-p20x.dtsi @@ -0,0 +1,247 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2016 Andreas Färber + * Copyright (c) 2016 BayLibre, Inc. + * Author: Kevin Hilman <khilman@kernel.org> + */ + +#include "meson-gxbb.dtsi" + +/ { + aliases { + serial0 = &uart_AO; + ethernet0 = ðmac; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x40000000>; + }; + + usb_pwr: regulator-usb-pwrs { + compatible = "regulator-fixed"; + + regulator-name = "USB_PWR"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + /* signal name in schematic: USB_PWR_EN */ + gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vddio_card: gpio-regulator { + compatible = "regulator-gpio"; + + regulator-name = "VDDIO_CARD"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + + /* Based on P200 schematics, signal CARD_1.8V/3.3V_CTR */ + states = <1800000 0 + 3300000 1>; + + regulator-settling-time-up-us = <10000>; + regulator-settling-time-down-us = <150000>; + }; + + vddio_boot: regulator-vddio_boot { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_BOOT"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vddao_3v3: regulator-vddao_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vcc_3v3: regulator-vcc_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; + }; + + wifi32k: wifi32k { + compatible = "pwm-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; + clocks = <&wifi32k>; + clock-names = "ext_clock"; + }; + + cvbs_connector: cvbs-connector { + compatible = "composite-video-connector"; + + port { + cvbs_connector_in: endpoint { + remote-endpoint = <&cvbs_vdac_out>; + }; + }; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; +}; + +&cec_AO { + status = "okay"; + pinctrl-0 = <&ao_cec_pins>; + pinctrl-names = "default"; + hdmi-phandle = <&hdmi_tx>; +}; + +&cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; + }; +}; + +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + +&ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; + pinctrl-names = "default"; +}; + +&pwm_ef { + status = "okay"; + pinctrl-0 = <&pwm_e_pins>; + pinctrl-names = "default"; + clocks = <&clkc CLKID_FCLK_DIV4>; + clock-names = "clkin0"; +}; + +/* Wireless SDIO Module */ +&sd_emmc_a { + status = "okay"; + pinctrl-0 = <&sdio_pins>; + pinctrl-1 = <&sdio_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + #address-cells = <1>; + #size-cells = <0>; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <100000000>; + + non-removable; + disable-wp; + + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddio_boot>; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +/* SD card */ +&sd_emmc_b { + status = "okay"; + pinctrl-0 = <&sdcard_pins>; + pinctrl-1 = <&sdcard_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <4>; + cap-sd-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + max-frequency = <100000000>; + disable-wp; + + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddio_card>; +}; + +/* eMMC */ +&sd_emmc_c { + status = "okay"; + pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <8>; + cap-mmc-highspeed; + max-frequency = <200000000>; + non-removable; + disable-wp; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + + mmc-pwrseq = <&emmc_pwrseq>; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vddio_boot>; +}; + +/* This UART is brought out to the DB9 connector */ +&uart_AO { + status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; +}; + +&usb0_phy { + status = "okay"; + phy-supply = <&usb_pwr>; +}; + +&usb1_phy { + status = "okay"; +}; + +&usb0 { + status = "okay"; +}; + +&usb1 { + status = "okay"; +}; -- 2.21.0 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [U-Boot] [PATCH v2 1/3] ARM: dts: meson: add p200 and p201 boards @ 2019-03-14 17:00 ` Mohammad Rasim 0 siblings, 0 replies; 14+ messages in thread From: Mohammad Rasim @ 2019-03-14 17:00 UTC (permalink / raw) To: u-boot This adds the device trees for p200 and p201 boards. Synced from kernel 5.0.0 revision a667cb7a94d48a483fb5d6006fe04a440f1a42ce. Signed-off-by: Mohammad Rasim <mohammad.rasim96@gmail.com> --- arch/arm/dts/Makefile | 2 + arch/arm/dts/meson-gxbb-p200.dts | 99 ++++++++++++ arch/arm/dts/meson-gxbb-p201.dts | 26 ++++ arch/arm/dts/meson-gxbb-p20x.dtsi | 247 ++++++++++++++++++++++++++++++ 4 files changed, 374 insertions(+) create mode 100644 arch/arm/dts/meson-gxbb-p200.dts create mode 100644 arch/arm/dts/meson-gxbb-p201.dts create mode 100644 arch/arm/dts/meson-gxbb-p20x.dtsi diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 2a040b20a5..adf5f26fac 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -60,6 +60,8 @@ dtb-$(CONFIG_ARCH_MESON) += \ meson-gxbb-nanopi-k2.dtb \ meson-gxbb-odroidc2.dtb \ meson-gxbb-nanopi-k2.dtb \ + meson-gxbb-p200.dtb \ + meson-gxbb-p201.dtb \ meson-gxl-s905x-p212.dtb \ meson-gxl-s905x-libretech-cc.dtb \ meson-gxl-s905x-khadas-vim.dtb \ diff --git a/arch/arm/dts/meson-gxbb-p200.dts b/arch/arm/dts/meson-gxbb-p200.dts new file mode 100644 index 0000000000..9d2406a7c4 --- /dev/null +++ b/arch/arm/dts/meson-gxbb-p200.dts @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2016 Andreas Färber + * Copyright (c) 2016 BayLibre, Inc. + * Author: Kevin Hilman <khilman@kernel.org> + */ + +/dts-v1/; + +#include "meson-gxbb-p20x.dtsi" +#include <dt-bindings/input/input.h> + +/ { + compatible = "amlogic,p200", "amlogic,meson-gxbb"; + model = "Amlogic Meson GXBB P200 Development Board"; + + avdd18_usb_adc: regulator-avdd18_usb_adc { + compatible = "regulator-fixed"; + regulator-name = "AVDD18_USB_ADC"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + adc_keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + + button-home { + label = "Home"; + linux,code = <KEY_HOME>; + press-threshold-microvolt = <900000>; /* 50% */ + }; + + button-esc { + label = "Esc"; + linux,code = <KEY_ESC>; + press-threshold-microvolt = <684000>; /* 38% */ + }; + + button-up { + label = "Volume Up"; + linux,code = <KEY_VOLUMEUP>; + press-threshold-microvolt = <468000>; /* 26% */ + }; + + button-down { + label = "Volume Down"; + linux,code = <KEY_VOLUMEDOWN>; + press-threshold-microvolt = <252000>; /* 14% */ + }; + + button-menu { + label = "Menu"; + linux,code = <KEY_MENU>; + press-threshold-microvolt = <0>; /* 0% */ + }; + }; +}; + +ðmac { + status = "okay"; + pinctrl-0 = <ð_rgmii_pins>; + pinctrl-names = "default"; + phy-handle = <ð_phy0>; + phy-mode = "rgmii"; + + amlogic,tx-delay-ns = <2>; + + snps,reset-gpio = <&gpio GPIOZ_14 0>; + snps,reset-delays-us = <0 10000 1000000>; + snps,reset-active-low; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + eth_phy0: ethernet-phy at 3 { + /* Micrel KSZ9031 (0x00221620) */ + reg = <3>; + interrupt-parent = <&gpio_intc>; + /* MAC_INTR on GPIOZ_15 */ + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; + }; + }; +}; + +&i2c_B { + status = "okay"; + pinctrl-0 = <&i2c_b_pins>; + pinctrl-names = "default"; +}; + +&saradc { + status = "okay"; + vref-supply = <&avdd18_usb_adc>; +}; diff --git a/arch/arm/dts/meson-gxbb-p201.dts b/arch/arm/dts/meson-gxbb-p201.dts new file mode 100644 index 0000000000..56e0dd1ff5 --- /dev/null +++ b/arch/arm/dts/meson-gxbb-p201.dts @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2016 Andreas Färber + * Copyright (c) 2016 BayLibre, Inc. + * Author: Kevin Hilman <khilman@kernel.org> + */ + +/dts-v1/; + +#include "meson-gxbb-p20x.dtsi" + +/ { + compatible = "amlogic,p201", "amlogic,meson-gxbb"; + model = "Amlogic Meson GXBB P201 Development Board"; +}; + +ðmac { + status = "okay"; + pinctrl-0 = <ð_rmii_pins>; + pinctrl-names = "default"; + phy-mode = "rmii"; + + snps,reset-gpio = <&gpio GPIOZ_14 0>; + snps,reset-delays-us = <0 10000 1000000>; + snps,reset-active-low; +}; diff --git a/arch/arm/dts/meson-gxbb-p20x.dtsi b/arch/arm/dts/meson-gxbb-p20x.dtsi new file mode 100644 index 0000000000..0be0f2a5d2 --- /dev/null +++ b/arch/arm/dts/meson-gxbb-p20x.dtsi @@ -0,0 +1,247 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2016 Andreas Färber + * Copyright (c) 2016 BayLibre, Inc. + * Author: Kevin Hilman <khilman@kernel.org> + */ + +#include "meson-gxbb.dtsi" + +/ { + aliases { + serial0 = &uart_AO; + ethernet0 = ðmac; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory at 0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x40000000>; + }; + + usb_pwr: regulator-usb-pwrs { + compatible = "regulator-fixed"; + + regulator-name = "USB_PWR"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + /* signal name in schematic: USB_PWR_EN */ + gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vddio_card: gpio-regulator { + compatible = "regulator-gpio"; + + regulator-name = "VDDIO_CARD"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + + /* Based on P200 schematics, signal CARD_1.8V/3.3V_CTR */ + states = <1800000 0 + 3300000 1>; + + regulator-settling-time-up-us = <10000>; + regulator-settling-time-down-us = <150000>; + }; + + vddio_boot: regulator-vddio_boot { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_BOOT"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vddao_3v3: regulator-vddao_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vcc_3v3: regulator-vcc_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; + }; + + wifi32k: wifi32k { + compatible = "pwm-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; + clocks = <&wifi32k>; + clock-names = "ext_clock"; + }; + + cvbs_connector: cvbs-connector { + compatible = "composite-video-connector"; + + port { + cvbs_connector_in: endpoint { + remote-endpoint = <&cvbs_vdac_out>; + }; + }; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; +}; + +&cec_AO { + status = "okay"; + pinctrl-0 = <&ao_cec_pins>; + pinctrl-names = "default"; + hdmi-phandle = <&hdmi_tx>; +}; + +&cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; + }; +}; + +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + +&ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; + pinctrl-names = "default"; +}; + +&pwm_ef { + status = "okay"; + pinctrl-0 = <&pwm_e_pins>; + pinctrl-names = "default"; + clocks = <&clkc CLKID_FCLK_DIV4>; + clock-names = "clkin0"; +}; + +/* Wireless SDIO Module */ +&sd_emmc_a { + status = "okay"; + pinctrl-0 = <&sdio_pins>; + pinctrl-1 = <&sdio_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + #address-cells = <1>; + #size-cells = <0>; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <100000000>; + + non-removable; + disable-wp; + + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddio_boot>; + + brcmf: wifi at 1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +/* SD card */ +&sd_emmc_b { + status = "okay"; + pinctrl-0 = <&sdcard_pins>; + pinctrl-1 = <&sdcard_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <4>; + cap-sd-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + max-frequency = <100000000>; + disable-wp; + + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddio_card>; +}; + +/* eMMC */ +&sd_emmc_c { + status = "okay"; + pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <8>; + cap-mmc-highspeed; + max-frequency = <200000000>; + non-removable; + disable-wp; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + + mmc-pwrseq = <&emmc_pwrseq>; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vddio_boot>; +}; + +/* This UART is brought out to the DB9 connector */ +&uart_AO { + status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; +}; + +&usb0_phy { + status = "okay"; + phy-supply = <&usb_pwr>; +}; + +&usb1_phy { + status = "okay"; +}; + +&usb0 { + status = "okay"; +}; + +&usb1 { + status = "okay"; +}; -- 2.21.0 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v2 1/3] ARM: dts: meson: add p200 and p201 boards 2019-03-14 17:00 ` [U-Boot] " Mohammad Rasim @ 2019-03-14 20:09 ` Neil Armstrong -1 siblings, 0 replies; 14+ messages in thread From: Neil Armstrong @ 2019-03-14 20:09 UTC (permalink / raw) To: Mohammad Rasim, u-boot, u-boot-amlogic Hi, Le 14/03/2019 18:00, Mohammad Rasim a écrit : > This adds the device trees for p200 and p201 boards. > Synced from kernel 5.0.0 revision a667cb7a94d48a483fb5d6006fe04a440f1a42ce. Commits should be described using the 12bytes identifier, like the Fixes tag. You can update it if you resend, and keep my Acked-by. > > Signed-off-by: Mohammad Rasim <mohammad.rasim96@gmail.com> > --- > arch/arm/dts/Makefile | 2 + > arch/arm/dts/meson-gxbb-p200.dts | 99 ++++++++++++ > arch/arm/dts/meson-gxbb-p201.dts | 26 ++++ > arch/arm/dts/meson-gxbb-p20x.dtsi | 247 ++++++++++++++++++++++++++++++ > 4 files changed, 374 insertions(+) > create mode 100644 arch/arm/dts/meson-gxbb-p200.dts > create mode 100644 arch/arm/dts/meson-gxbb-p201.dts > create mode 100644 arch/arm/dts/meson-gxbb-p20x.dtsi > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > index 2a040b20a5..adf5f26fac 100644 > --- a/arch/arm/dts/Makefile > +++ b/arch/arm/dts/Makefile > @@ -60,6 +60,8 @@ dtb-$(CONFIG_ARCH_MESON) += \ > meson-gxbb-nanopi-k2.dtb \ > meson-gxbb-odroidc2.dtb \ > meson-gxbb-nanopi-k2.dtb \ > + meson-gxbb-p200.dtb \ > + meson-gxbb-p201.dtb \ > meson-gxl-s905x-p212.dtb \ > meson-gxl-s905x-libretech-cc.dtb \ > meson-gxl-s905x-khadas-vim.dtb \ > diff --git a/arch/arm/dts/meson-gxbb-p200.dts b/arch/arm/dts/meson-gxbb-p200.dts > new file mode 100644 > index 0000000000..9d2406a7c4 > --- /dev/null > +++ b/arch/arm/dts/meson-gxbb-p200.dts > @@ -0,0 +1,99 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2016 Andreas Färber > + * Copyright (c) 2016 BayLibre, Inc. > + * Author: Kevin Hilman <khilman@kernel.org> > + */ > + > +/dts-v1/; > + > +#include "meson-gxbb-p20x.dtsi" > +#include <dt-bindings/input/input.h> > + > +/ { > + compatible = "amlogic,p200", "amlogic,meson-gxbb"; > + model = "Amlogic Meson GXBB P200 Development Board"; > + > + avdd18_usb_adc: regulator-avdd18_usb_adc { > + compatible = "regulator-fixed"; > + regulator-name = "AVDD18_USB_ADC"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + }; > + > + adc_keys { > + compatible = "adc-keys"; > + io-channels = <&saradc 0>; > + io-channel-names = "buttons"; > + keyup-threshold-microvolt = <1800000>; > + > + button-home { > + label = "Home"; > + linux,code = <KEY_HOME>; > + press-threshold-microvolt = <900000>; /* 50% */ > + }; > + > + button-esc { > + label = "Esc"; > + linux,code = <KEY_ESC>; > + press-threshold-microvolt = <684000>; /* 38% */ > + }; > + > + button-up { > + label = "Volume Up"; > + linux,code = <KEY_VOLUMEUP>; > + press-threshold-microvolt = <468000>; /* 26% */ > + }; > + > + button-down { > + label = "Volume Down"; > + linux,code = <KEY_VOLUMEDOWN>; > + press-threshold-microvolt = <252000>; /* 14% */ > + }; > + > + button-menu { > + label = "Menu"; > + linux,code = <KEY_MENU>; > + press-threshold-microvolt = <0>; /* 0% */ > + }; > + }; > +}; > + > +ðmac { > + status = "okay"; > + pinctrl-0 = <ð_rgmii_pins>; > + pinctrl-names = "default"; > + phy-handle = <ð_phy0>; > + phy-mode = "rgmii"; > + > + amlogic,tx-delay-ns = <2>; > + > + snps,reset-gpio = <&gpio GPIOZ_14 0>; > + snps,reset-delays-us = <0 10000 1000000>; > + snps,reset-active-low; > + > + mdio { > + compatible = "snps,dwmac-mdio"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + eth_phy0: ethernet-phy@3 { > + /* Micrel KSZ9031 (0x00221620) */ > + reg = <3>; > + interrupt-parent = <&gpio_intc>; > + /* MAC_INTR on GPIOZ_15 */ > + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; > + }; > + }; > +}; > + > +&i2c_B { > + status = "okay"; > + pinctrl-0 = <&i2c_b_pins>; > + pinctrl-names = "default"; > +}; > + > +&saradc { > + status = "okay"; > + vref-supply = <&avdd18_usb_adc>; > +}; > diff --git a/arch/arm/dts/meson-gxbb-p201.dts b/arch/arm/dts/meson-gxbb-p201.dts > new file mode 100644 > index 0000000000..56e0dd1ff5 > --- /dev/null > +++ b/arch/arm/dts/meson-gxbb-p201.dts > @@ -0,0 +1,26 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2016 Andreas Färber > + * Copyright (c) 2016 BayLibre, Inc. > + * Author: Kevin Hilman <khilman@kernel.org> > + */ > + > +/dts-v1/; > + > +#include "meson-gxbb-p20x.dtsi" > + > +/ { > + compatible = "amlogic,p201", "amlogic,meson-gxbb"; > + model = "Amlogic Meson GXBB P201 Development Board"; > +}; > + > +ðmac { > + status = "okay"; > + pinctrl-0 = <ð_rmii_pins>; > + pinctrl-names = "default"; > + phy-mode = "rmii"; > + > + snps,reset-gpio = <&gpio GPIOZ_14 0>; > + snps,reset-delays-us = <0 10000 1000000>; > + snps,reset-active-low; > +}; > diff --git a/arch/arm/dts/meson-gxbb-p20x.dtsi b/arch/arm/dts/meson-gxbb-p20x.dtsi > new file mode 100644 > index 0000000000..0be0f2a5d2 > --- /dev/null > +++ b/arch/arm/dts/meson-gxbb-p20x.dtsi > @@ -0,0 +1,247 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2016 Andreas Färber > + * Copyright (c) 2016 BayLibre, Inc. > + * Author: Kevin Hilman <khilman@kernel.org> > + */ > + > +#include "meson-gxbb.dtsi" > + > +/ { > + aliases { > + serial0 = &uart_AO; > + ethernet0 = ðmac; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + memory@0 { > + device_type = "memory"; > + reg = <0x0 0x0 0x0 0x40000000>; > + }; > + > + usb_pwr: regulator-usb-pwrs { > + compatible = "regulator-fixed"; > + > + regulator-name = "USB_PWR"; > + > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + > + /* signal name in schematic: USB_PWR_EN */ > + gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + }; > + > + vddio_card: gpio-regulator { > + compatible = "regulator-gpio"; > + > + regulator-name = "VDDIO_CARD"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <3300000>; > + > + gpios = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>; > + gpios-states = <1>; > + > + /* Based on P200 schematics, signal CARD_1.8V/3.3V_CTR */ > + states = <1800000 0 > + 3300000 1>; > + > + regulator-settling-time-up-us = <10000>; > + regulator-settling-time-down-us = <150000>; > + }; > + > + vddio_boot: regulator-vddio_boot { > + compatible = "regulator-fixed"; > + regulator-name = "VDDIO_BOOT"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + }; > + > + vddao_3v3: regulator-vddao_3v3 { > + compatible = "regulator-fixed"; > + regulator-name = "VDDAO_3V3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + }; > + > + vcc_3v3: regulator-vcc_3v3 { > + compatible = "regulator-fixed"; > + regulator-name = "VCC_3V3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + }; > + > + emmc_pwrseq: emmc-pwrseq { > + compatible = "mmc-pwrseq-emmc"; > + reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; > + }; > + > + wifi32k: wifi32k { > + compatible = "pwm-clock"; > + #clock-cells = <0>; > + clock-frequency = <32768>; > + pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ > + }; > + > + sdio_pwrseq: sdio-pwrseq { > + compatible = "mmc-pwrseq-simple"; > + reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; > + clocks = <&wifi32k>; > + clock-names = "ext_clock"; > + }; > + > + cvbs_connector: cvbs-connector { > + compatible = "composite-video-connector"; > + > + port { > + cvbs_connector_in: endpoint { > + remote-endpoint = <&cvbs_vdac_out>; > + }; > + }; > + }; > + > + hdmi-connector { > + compatible = "hdmi-connector"; > + type = "a"; > + > + port { > + hdmi_connector_in: endpoint { > + remote-endpoint = <&hdmi_tx_tmds_out>; > + }; > + }; > + }; > +}; > + > +&cec_AO { > + status = "okay"; > + pinctrl-0 = <&ao_cec_pins>; > + pinctrl-names = "default"; > + hdmi-phandle = <&hdmi_tx>; > +}; > + > +&cvbs_vdac_port { > + cvbs_vdac_out: endpoint { > + remote-endpoint = <&cvbs_connector_in>; > + }; > +}; > + > +&hdmi_tx { > + status = "okay"; > + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; > + pinctrl-names = "default"; > +}; > + > +&hdmi_tx_tmds_port { > + hdmi_tx_tmds_out: endpoint { > + remote-endpoint = <&hdmi_connector_in>; > + }; > +}; > + > +&ir { > + status = "okay"; > + pinctrl-0 = <&remote_input_ao_pins>; > + pinctrl-names = "default"; > +}; > + > +&pwm_ef { > + status = "okay"; > + pinctrl-0 = <&pwm_e_pins>; > + pinctrl-names = "default"; > + clocks = <&clkc CLKID_FCLK_DIV4>; > + clock-names = "clkin0"; > +}; > + > +/* Wireless SDIO Module */ > +&sd_emmc_a { > + status = "okay"; > + pinctrl-0 = <&sdio_pins>; > + pinctrl-1 = <&sdio_clk_gate_pins>; > + pinctrl-names = "default", "clk-gate"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + bus-width = <4>; > + cap-sd-highspeed; > + max-frequency = <100000000>; > + > + non-removable; > + disable-wp; > + > + mmc-pwrseq = <&sdio_pwrseq>; > + > + vmmc-supply = <&vddao_3v3>; > + vqmmc-supply = <&vddio_boot>; > + > + brcmf: wifi@1 { > + reg = <1>; > + compatible = "brcm,bcm4329-fmac"; > + }; > +}; > + > +/* SD card */ > +&sd_emmc_b { > + status = "okay"; > + pinctrl-0 = <&sdcard_pins>; > + pinctrl-1 = <&sdcard_clk_gate_pins>; > + pinctrl-names = "default", "clk-gate"; > + > + bus-width = <4>; > + cap-sd-highspeed; > + sd-uhs-sdr12; > + sd-uhs-sdr25; > + sd-uhs-sdr50; > + max-frequency = <100000000>; > + disable-wp; > + > + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; > + > + vmmc-supply = <&vddao_3v3>; > + vqmmc-supply = <&vddio_card>; > +}; > + > +/* eMMC */ > +&sd_emmc_c { > + status = "okay"; > + pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; > + pinctrl-1 = <&emmc_clk_gate_pins>; > + pinctrl-names = "default", "clk-gate"; > + > + bus-width = <8>; > + cap-mmc-highspeed; > + max-frequency = <200000000>; > + non-removable; > + disable-wp; > + mmc-ddr-1_8v; > + mmc-hs200-1_8v; > + > + mmc-pwrseq = <&emmc_pwrseq>; > + vmmc-supply = <&vcc_3v3>; > + vqmmc-supply = <&vddio_boot>; > +}; > + > +/* This UART is brought out to the DB9 connector */ > +&uart_AO { > + status = "okay"; > + pinctrl-0 = <&uart_ao_a_pins>; > + pinctrl-names = "default"; > +}; > + > +&usb0_phy { > + status = "okay"; > + phy-supply = <&usb_pwr>; > +}; > + > +&usb1_phy { > + status = "okay"; > +}; > + > +&usb0 { > + status = "okay"; > +}; > + > +&usb1 { > + status = "okay"; > +}; > -- > 2.21.0 > Acked-by: Neil Armstrong <narmstrong@baylibre.com> Thanks, Neil ^ permalink raw reply [flat|nested] 14+ messages in thread
* [U-Boot] [PATCH v2 1/3] ARM: dts: meson: add p200 and p201 boards @ 2019-03-14 20:09 ` Neil Armstrong 0 siblings, 0 replies; 14+ messages in thread From: Neil Armstrong @ 2019-03-14 20:09 UTC (permalink / raw) To: u-boot Hi, Le 14/03/2019 18:00, Mohammad Rasim a écrit : > This adds the device trees for p200 and p201 boards. > Synced from kernel 5.0.0 revision a667cb7a94d48a483fb5d6006fe04a440f1a42ce. Commits should be described using the 12bytes identifier, like the Fixes tag. You can update it if you resend, and keep my Acked-by. > > Signed-off-by: Mohammad Rasim <mohammad.rasim96@gmail.com> > --- > arch/arm/dts/Makefile | 2 + > arch/arm/dts/meson-gxbb-p200.dts | 99 ++++++++++++ > arch/arm/dts/meson-gxbb-p201.dts | 26 ++++ > arch/arm/dts/meson-gxbb-p20x.dtsi | 247 ++++++++++++++++++++++++++++++ > 4 files changed, 374 insertions(+) > create mode 100644 arch/arm/dts/meson-gxbb-p200.dts > create mode 100644 arch/arm/dts/meson-gxbb-p201.dts > create mode 100644 arch/arm/dts/meson-gxbb-p20x.dtsi > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > index 2a040b20a5..adf5f26fac 100644 > --- a/arch/arm/dts/Makefile > +++ b/arch/arm/dts/Makefile > @@ -60,6 +60,8 @@ dtb-$(CONFIG_ARCH_MESON) += \ > meson-gxbb-nanopi-k2.dtb \ > meson-gxbb-odroidc2.dtb \ > meson-gxbb-nanopi-k2.dtb \ > + meson-gxbb-p200.dtb \ > + meson-gxbb-p201.dtb \ > meson-gxl-s905x-p212.dtb \ > meson-gxl-s905x-libretech-cc.dtb \ > meson-gxl-s905x-khadas-vim.dtb \ > diff --git a/arch/arm/dts/meson-gxbb-p200.dts b/arch/arm/dts/meson-gxbb-p200.dts > new file mode 100644 > index 0000000000..9d2406a7c4 > --- /dev/null > +++ b/arch/arm/dts/meson-gxbb-p200.dts > @@ -0,0 +1,99 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2016 Andreas Färber > + * Copyright (c) 2016 BayLibre, Inc. > + * Author: Kevin Hilman <khilman@kernel.org> > + */ > + > +/dts-v1/; > + > +#include "meson-gxbb-p20x.dtsi" > +#include <dt-bindings/input/input.h> > + > +/ { > + compatible = "amlogic,p200", "amlogic,meson-gxbb"; > + model = "Amlogic Meson GXBB P200 Development Board"; > + > + avdd18_usb_adc: regulator-avdd18_usb_adc { > + compatible = "regulator-fixed"; > + regulator-name = "AVDD18_USB_ADC"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + }; > + > + adc_keys { > + compatible = "adc-keys"; > + io-channels = <&saradc 0>; > + io-channel-names = "buttons"; > + keyup-threshold-microvolt = <1800000>; > + > + button-home { > + label = "Home"; > + linux,code = <KEY_HOME>; > + press-threshold-microvolt = <900000>; /* 50% */ > + }; > + > + button-esc { > + label = "Esc"; > + linux,code = <KEY_ESC>; > + press-threshold-microvolt = <684000>; /* 38% */ > + }; > + > + button-up { > + label = "Volume Up"; > + linux,code = <KEY_VOLUMEUP>; > + press-threshold-microvolt = <468000>; /* 26% */ > + }; > + > + button-down { > + label = "Volume Down"; > + linux,code = <KEY_VOLUMEDOWN>; > + press-threshold-microvolt = <252000>; /* 14% */ > + }; > + > + button-menu { > + label = "Menu"; > + linux,code = <KEY_MENU>; > + press-threshold-microvolt = <0>; /* 0% */ > + }; > + }; > +}; > + > +ðmac { > + status = "okay"; > + pinctrl-0 = <ð_rgmii_pins>; > + pinctrl-names = "default"; > + phy-handle = <ð_phy0>; > + phy-mode = "rgmii"; > + > + amlogic,tx-delay-ns = <2>; > + > + snps,reset-gpio = <&gpio GPIOZ_14 0>; > + snps,reset-delays-us = <0 10000 1000000>; > + snps,reset-active-low; > + > + mdio { > + compatible = "snps,dwmac-mdio"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + eth_phy0: ethernet-phy at 3 { > + /* Micrel KSZ9031 (0x00221620) */ > + reg = <3>; > + interrupt-parent = <&gpio_intc>; > + /* MAC_INTR on GPIOZ_15 */ > + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; > + }; > + }; > +}; > + > +&i2c_B { > + status = "okay"; > + pinctrl-0 = <&i2c_b_pins>; > + pinctrl-names = "default"; > +}; > + > +&saradc { > + status = "okay"; > + vref-supply = <&avdd18_usb_adc>; > +}; > diff --git a/arch/arm/dts/meson-gxbb-p201.dts b/arch/arm/dts/meson-gxbb-p201.dts > new file mode 100644 > index 0000000000..56e0dd1ff5 > --- /dev/null > +++ b/arch/arm/dts/meson-gxbb-p201.dts > @@ -0,0 +1,26 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2016 Andreas Färber > + * Copyright (c) 2016 BayLibre, Inc. > + * Author: Kevin Hilman <khilman@kernel.org> > + */ > + > +/dts-v1/; > + > +#include "meson-gxbb-p20x.dtsi" > + > +/ { > + compatible = "amlogic,p201", "amlogic,meson-gxbb"; > + model = "Amlogic Meson GXBB P201 Development Board"; > +}; > + > +ðmac { > + status = "okay"; > + pinctrl-0 = <ð_rmii_pins>; > + pinctrl-names = "default"; > + phy-mode = "rmii"; > + > + snps,reset-gpio = <&gpio GPIOZ_14 0>; > + snps,reset-delays-us = <0 10000 1000000>; > + snps,reset-active-low; > +}; > diff --git a/arch/arm/dts/meson-gxbb-p20x.dtsi b/arch/arm/dts/meson-gxbb-p20x.dtsi > new file mode 100644 > index 0000000000..0be0f2a5d2 > --- /dev/null > +++ b/arch/arm/dts/meson-gxbb-p20x.dtsi > @@ -0,0 +1,247 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2016 Andreas Färber > + * Copyright (c) 2016 BayLibre, Inc. > + * Author: Kevin Hilman <khilman@kernel.org> > + */ > + > +#include "meson-gxbb.dtsi" > + > +/ { > + aliases { > + serial0 = &uart_AO; > + ethernet0 = ðmac; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + memory at 0 { > + device_type = "memory"; > + reg = <0x0 0x0 0x0 0x40000000>; > + }; > + > + usb_pwr: regulator-usb-pwrs { > + compatible = "regulator-fixed"; > + > + regulator-name = "USB_PWR"; > + > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + > + /* signal name in schematic: USB_PWR_EN */ > + gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + }; > + > + vddio_card: gpio-regulator { > + compatible = "regulator-gpio"; > + > + regulator-name = "VDDIO_CARD"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <3300000>; > + > + gpios = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>; > + gpios-states = <1>; > + > + /* Based on P200 schematics, signal CARD_1.8V/3.3V_CTR */ > + states = <1800000 0 > + 3300000 1>; > + > + regulator-settling-time-up-us = <10000>; > + regulator-settling-time-down-us = <150000>; > + }; > + > + vddio_boot: regulator-vddio_boot { > + compatible = "regulator-fixed"; > + regulator-name = "VDDIO_BOOT"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + }; > + > + vddao_3v3: regulator-vddao_3v3 { > + compatible = "regulator-fixed"; > + regulator-name = "VDDAO_3V3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + }; > + > + vcc_3v3: regulator-vcc_3v3 { > + compatible = "regulator-fixed"; > + regulator-name = "VCC_3V3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + }; > + > + emmc_pwrseq: emmc-pwrseq { > + compatible = "mmc-pwrseq-emmc"; > + reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; > + }; > + > + wifi32k: wifi32k { > + compatible = "pwm-clock"; > + #clock-cells = <0>; > + clock-frequency = <32768>; > + pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ > + }; > + > + sdio_pwrseq: sdio-pwrseq { > + compatible = "mmc-pwrseq-simple"; > + reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; > + clocks = <&wifi32k>; > + clock-names = "ext_clock"; > + }; > + > + cvbs_connector: cvbs-connector { > + compatible = "composite-video-connector"; > + > + port { > + cvbs_connector_in: endpoint { > + remote-endpoint = <&cvbs_vdac_out>; > + }; > + }; > + }; > + > + hdmi-connector { > + compatible = "hdmi-connector"; > + type = "a"; > + > + port { > + hdmi_connector_in: endpoint { > + remote-endpoint = <&hdmi_tx_tmds_out>; > + }; > + }; > + }; > +}; > + > +&cec_AO { > + status = "okay"; > + pinctrl-0 = <&ao_cec_pins>; > + pinctrl-names = "default"; > + hdmi-phandle = <&hdmi_tx>; > +}; > + > +&cvbs_vdac_port { > + cvbs_vdac_out: endpoint { > + remote-endpoint = <&cvbs_connector_in>; > + }; > +}; > + > +&hdmi_tx { > + status = "okay"; > + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; > + pinctrl-names = "default"; > +}; > + > +&hdmi_tx_tmds_port { > + hdmi_tx_tmds_out: endpoint { > + remote-endpoint = <&hdmi_connector_in>; > + }; > +}; > + > +&ir { > + status = "okay"; > + pinctrl-0 = <&remote_input_ao_pins>; > + pinctrl-names = "default"; > +}; > + > +&pwm_ef { > + status = "okay"; > + pinctrl-0 = <&pwm_e_pins>; > + pinctrl-names = "default"; > + clocks = <&clkc CLKID_FCLK_DIV4>; > + clock-names = "clkin0"; > +}; > + > +/* Wireless SDIO Module */ > +&sd_emmc_a { > + status = "okay"; > + pinctrl-0 = <&sdio_pins>; > + pinctrl-1 = <&sdio_clk_gate_pins>; > + pinctrl-names = "default", "clk-gate"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + bus-width = <4>; > + cap-sd-highspeed; > + max-frequency = <100000000>; > + > + non-removable; > + disable-wp; > + > + mmc-pwrseq = <&sdio_pwrseq>; > + > + vmmc-supply = <&vddao_3v3>; > + vqmmc-supply = <&vddio_boot>; > + > + brcmf: wifi at 1 { > + reg = <1>; > + compatible = "brcm,bcm4329-fmac"; > + }; > +}; > + > +/* SD card */ > +&sd_emmc_b { > + status = "okay"; > + pinctrl-0 = <&sdcard_pins>; > + pinctrl-1 = <&sdcard_clk_gate_pins>; > + pinctrl-names = "default", "clk-gate"; > + > + bus-width = <4>; > + cap-sd-highspeed; > + sd-uhs-sdr12; > + sd-uhs-sdr25; > + sd-uhs-sdr50; > + max-frequency = <100000000>; > + disable-wp; > + > + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; > + > + vmmc-supply = <&vddao_3v3>; > + vqmmc-supply = <&vddio_card>; > +}; > + > +/* eMMC */ > +&sd_emmc_c { > + status = "okay"; > + pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; > + pinctrl-1 = <&emmc_clk_gate_pins>; > + pinctrl-names = "default", "clk-gate"; > + > + bus-width = <8>; > + cap-mmc-highspeed; > + max-frequency = <200000000>; > + non-removable; > + disable-wp; > + mmc-ddr-1_8v; > + mmc-hs200-1_8v; > + > + mmc-pwrseq = <&emmc_pwrseq>; > + vmmc-supply = <&vcc_3v3>; > + vqmmc-supply = <&vddio_boot>; > +}; > + > +/* This UART is brought out to the DB9 connector */ > +&uart_AO { > + status = "okay"; > + pinctrl-0 = <&uart_ao_a_pins>; > + pinctrl-names = "default"; > +}; > + > +&usb0_phy { > + status = "okay"; > + phy-supply = <&usb_pwr>; > +}; > + > +&usb1_phy { > + status = "okay"; > +}; > + > +&usb0 { > + status = "okay"; > +}; > + > +&usb1 { > + status = "okay"; > +}; > -- > 2.21.0 > Acked-by: Neil Armstrong <narmstrong@baylibre.com> Thanks, Neil ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 2/3] ARM: board: meson: add p201 board 2019-03-14 17:00 ` [U-Boot] " Mohammad Rasim @ 2019-03-14 17:00 ` Mohammad Rasim -1 siblings, 0 replies; 14+ messages in thread From: Mohammad Rasim @ 2019-03-14 17:00 UTC (permalink / raw) To: u-boot, u-boot-amlogic; +Cc: Mohammad Rasim, narmstrong Signed-off-by: Mohammad Rasim <mohammad.rasim96@gmail.com> --- board/amlogic/p201/MAINTAINERS | 6 ++ board/amlogic/p201/Makefile | 5 ++ board/amlogic/p201/README.p201 | 103 +++++++++++++++++++++++++++++++++ board/amlogic/p201/p201.c | 43 ++++++++++++++ configs/p201_defconfig | 41 +++++++++++++ 5 files changed, 198 insertions(+) create mode 100644 board/amlogic/p201/MAINTAINERS create mode 100644 board/amlogic/p201/Makefile create mode 100644 board/amlogic/p201/README.p201 create mode 100644 board/amlogic/p201/p201.c create mode 100644 configs/p201_defconfig diff --git a/board/amlogic/p201/MAINTAINERS b/board/amlogic/p201/MAINTAINERS new file mode 100644 index 0000000000..6ebb5f6396 --- /dev/null +++ b/board/amlogic/p201/MAINTAINERS @@ -0,0 +1,6 @@ +P201 +M: Beniamino Galvani <b.galvani@gmail.com> +M: Neil Armstrong <narmstrong@baylibre.com> +S: Maintained +F: board/amlogic/p201/ +F: configs/p201_defconfig diff --git a/board/amlogic/p201/Makefile b/board/amlogic/p201/Makefile new file mode 100644 index 0000000000..11de5396ab --- /dev/null +++ b/board/amlogic/p201/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com> + +obj-y := p201.o diff --git a/board/amlogic/p201/README.p201 b/board/amlogic/p201/README.p201 new file mode 100644 index 0000000000..c251096ce1 --- /dev/null +++ b/board/amlogic/p201/README.p201 @@ -0,0 +1,103 @@ +U-Boot for Amlogic P201 +======================= + +P201 is a reference board manufactured by Amlogic with the following +specifications: + + - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz + - ARM Mali 450 GPU + - 2GB DDR3 SDRAM + - 10/100 Ethernet + - HDMI 2.0 4K/60Hz display + - 2 x USB 2.0 Host + - eMMC, microSD + - Infrared receiver + - SDIO WiFi Module + - CVBS+Stereo Audio Jack + +Schematics are available from Amlogic on demand. + +Currently the u-boot port supports the following devices: + - serial + - eMMC, microSD + - Ethernet + - I2C + - Regulators + - Reset controller + - Clock controller + - USB Host + - ADC + +u-boot compilation +================== + + > export ARCH=arm + > export CROSS_COMPILE=aarch64-none-elf- + > make p201_defconfig + > make + +Image creation +============== + +Amlogic doesn't provide sources for the firmware and for tools needed +to create the bootloader image, so it is necessary to obtain them from +the git tree published by the board vendor: + + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz + > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz + > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH + > git clone https://github.com/BayLibre/u-boot.git -b n-amlogic-openlinux-20170606 amlogic-u-boot + > cd amlogic-u-boot + > make gxb_p201_v1_defconfig + > make + > export FIPDIR=$PWD/fip + +Go back to mainline U-boot source tree then : + > mkdir fip + + > cp $FIPDIR/gxl/bl2.bin fip/ + > cp $FIPDIR/gxl/acs.bin fip/ + > cp $FIPDIR/gxl/bl21.bin fip/ + > cp $FIPDIR/gxl/bl30.bin fip/ + > cp $FIPDIR/gxl/bl301.bin fip/ + > cp $FIPDIR/gxl/bl31.img fip/ + > cp u-boot.bin fip/bl33.bin + + > $FIPDIR/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + + > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0 + + > $FIPDIR/blx_fix.sh \ + fip/bl2_acs.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/bl21.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin + > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig + > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \ + --output fip/u-boot.bin \ + --bl2 fip/bl2.n.bin.sig \ + --bl30 fip/bl30_new.bin.enc \ + --bl31 fip/bl31.img.enc \ + --bl33 fip/bl33.bin.enc + +and then write the image to SD with: + + > DEV=/dev/your_sd_device + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444 diff --git a/board/amlogic/p201/p201.c b/board/amlogic/p201/p201.c new file mode 100644 index 0000000000..ef0c65cd9f --- /dev/null +++ b/board/amlogic/p201/p201.c @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com> + */ + +#include <common.h> +#include <dm.h> +#include <environment.h> +#include <asm/io.h> +#include <asm/arch/gx.h> +#include <asm/arch/sm.h> +#include <asm/arch/eth.h> +#include <asm/arch/mem.h> + +#define EFUSE_SN_OFFSET 20 +#define EFUSE_SN_SIZE 16 +#define EFUSE_MAC_OFFSET 52 +#define EFUSE_MAC_SIZE 6 + +int misc_init_r(void) +{ + u8 mac_addr[EFUSE_MAC_SIZE]; + char serial[EFUSE_SN_SIZE]; + ssize_t len; + + meson_eth_init(PHY_INTERFACE_MODE_RMII, 0); + + if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { + len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, + mac_addr, EFUSE_MAC_SIZE); + if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr)) + eth_env_set_enetaddr("ethaddr", mac_addr); + } + + if (!env_get("serial#")) { + len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial, + EFUSE_SN_SIZE); + if (len == EFUSE_SN_SIZE) + env_set("serial#", serial); + } + + return 0; +} diff --git a/configs/p201_defconfig b/configs/p201_defconfig new file mode 100644 index 0000000000..f6a821cf32 --- /dev/null +++ b/configs/p201_defconfig @@ -0,0 +1,41 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_DEBUG_UART_BASE=0xc81004c0 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_IDENT_STRING=" p201" +CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_OF_BOARD_SETUP=y +CONFIG_MISC_INIT_R=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p201" +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MESON=y +CONFIG_DM_MMC=y +CONFIG_MMC_MESON_GX=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_GXBB=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_MESON=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_SYS_BOARD="p201" -- 2.21.0 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [U-Boot] [PATCH v2 2/3] ARM: board: meson: add p201 board @ 2019-03-14 17:00 ` Mohammad Rasim 0 siblings, 0 replies; 14+ messages in thread From: Mohammad Rasim @ 2019-03-14 17:00 UTC (permalink / raw) To: u-boot Signed-off-by: Mohammad Rasim <mohammad.rasim96@gmail.com> --- board/amlogic/p201/MAINTAINERS | 6 ++ board/amlogic/p201/Makefile | 5 ++ board/amlogic/p201/README.p201 | 103 +++++++++++++++++++++++++++++++++ board/amlogic/p201/p201.c | 43 ++++++++++++++ configs/p201_defconfig | 41 +++++++++++++ 5 files changed, 198 insertions(+) create mode 100644 board/amlogic/p201/MAINTAINERS create mode 100644 board/amlogic/p201/Makefile create mode 100644 board/amlogic/p201/README.p201 create mode 100644 board/amlogic/p201/p201.c create mode 100644 configs/p201_defconfig diff --git a/board/amlogic/p201/MAINTAINERS b/board/amlogic/p201/MAINTAINERS new file mode 100644 index 0000000000..6ebb5f6396 --- /dev/null +++ b/board/amlogic/p201/MAINTAINERS @@ -0,0 +1,6 @@ +P201 +M: Beniamino Galvani <b.galvani@gmail.com> +M: Neil Armstrong <narmstrong@baylibre.com> +S: Maintained +F: board/amlogic/p201/ +F: configs/p201_defconfig diff --git a/board/amlogic/p201/Makefile b/board/amlogic/p201/Makefile new file mode 100644 index 0000000000..11de5396ab --- /dev/null +++ b/board/amlogic/p201/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com> + +obj-y := p201.o diff --git a/board/amlogic/p201/README.p201 b/board/amlogic/p201/README.p201 new file mode 100644 index 0000000000..c251096ce1 --- /dev/null +++ b/board/amlogic/p201/README.p201 @@ -0,0 +1,103 @@ +U-Boot for Amlogic P201 +======================= + +P201 is a reference board manufactured by Amlogic with the following +specifications: + + - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz + - ARM Mali 450 GPU + - 2GB DDR3 SDRAM + - 10/100 Ethernet + - HDMI 2.0 4K/60Hz display + - 2 x USB 2.0 Host + - eMMC, microSD + - Infrared receiver + - SDIO WiFi Module + - CVBS+Stereo Audio Jack + +Schematics are available from Amlogic on demand. + +Currently the u-boot port supports the following devices: + - serial + - eMMC, microSD + - Ethernet + - I2C + - Regulators + - Reset controller + - Clock controller + - USB Host + - ADC + +u-boot compilation +================== + + > export ARCH=arm + > export CROSS_COMPILE=aarch64-none-elf- + > make p201_defconfig + > make + +Image creation +============== + +Amlogic doesn't provide sources for the firmware and for tools needed +to create the bootloader image, so it is necessary to obtain them from +the git tree published by the board vendor: + + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz + > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz + > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH + > git clone https://github.com/BayLibre/u-boot.git -b n-amlogic-openlinux-20170606 amlogic-u-boot + > cd amlogic-u-boot + > make gxb_p201_v1_defconfig + > make + > export FIPDIR=$PWD/fip + +Go back to mainline U-boot source tree then : + > mkdir fip + + > cp $FIPDIR/gxl/bl2.bin fip/ + > cp $FIPDIR/gxl/acs.bin fip/ + > cp $FIPDIR/gxl/bl21.bin fip/ + > cp $FIPDIR/gxl/bl30.bin fip/ + > cp $FIPDIR/gxl/bl301.bin fip/ + > cp $FIPDIR/gxl/bl31.img fip/ + > cp u-boot.bin fip/bl33.bin + + > $FIPDIR/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + + > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0 + + > $FIPDIR/blx_fix.sh \ + fip/bl2_acs.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/bl21.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin + > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig + > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \ + --output fip/u-boot.bin \ + --bl2 fip/bl2.n.bin.sig \ + --bl30 fip/bl30_new.bin.enc \ + --bl31 fip/bl31.img.enc \ + --bl33 fip/bl33.bin.enc + +and then write the image to SD with: + + > DEV=/dev/your_sd_device + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444 diff --git a/board/amlogic/p201/p201.c b/board/amlogic/p201/p201.c new file mode 100644 index 0000000000..ef0c65cd9f --- /dev/null +++ b/board/amlogic/p201/p201.c @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com> + */ + +#include <common.h> +#include <dm.h> +#include <environment.h> +#include <asm/io.h> +#include <asm/arch/gx.h> +#include <asm/arch/sm.h> +#include <asm/arch/eth.h> +#include <asm/arch/mem.h> + +#define EFUSE_SN_OFFSET 20 +#define EFUSE_SN_SIZE 16 +#define EFUSE_MAC_OFFSET 52 +#define EFUSE_MAC_SIZE 6 + +int misc_init_r(void) +{ + u8 mac_addr[EFUSE_MAC_SIZE]; + char serial[EFUSE_SN_SIZE]; + ssize_t len; + + meson_eth_init(PHY_INTERFACE_MODE_RMII, 0); + + if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { + len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, + mac_addr, EFUSE_MAC_SIZE); + if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr)) + eth_env_set_enetaddr("ethaddr", mac_addr); + } + + if (!env_get("serial#")) { + len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial, + EFUSE_SN_SIZE); + if (len == EFUSE_SN_SIZE) + env_set("serial#", serial); + } + + return 0; +} diff --git a/configs/p201_defconfig b/configs/p201_defconfig new file mode 100644 index 0000000000..f6a821cf32 --- /dev/null +++ b/configs/p201_defconfig @@ -0,0 +1,41 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_DEBUG_UART_BASE=0xc81004c0 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_IDENT_STRING=" p201" +CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_OF_BOARD_SETUP=y +CONFIG_MISC_INIT_R=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p201" +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MESON=y +CONFIG_DM_MMC=y +CONFIG_MMC_MESON_GX=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_GXBB=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_MESON=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_SYS_BOARD="p201" -- 2.21.0 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v2 2/3] ARM: board: meson: add p201 board 2019-03-14 17:00 ` [U-Boot] " Mohammad Rasim @ 2019-03-14 20:12 ` Neil Armstrong -1 siblings, 0 replies; 14+ messages in thread From: Neil Armstrong @ 2019-03-14 20:12 UTC (permalink / raw) To: Mohammad Rasim, u-boot, u-boot-amlogic Hi, Le 14/03/2019 18:00, Mohammad Rasim a écrit : > > Signed-off-by: Mohammad Rasim <mohammad.rasim96@gmail.com> > --- > board/amlogic/p201/MAINTAINERS | 6 ++ > board/amlogic/p201/Makefile | 5 ++ > board/amlogic/p201/README.p201 | 103 +++++++++++++++++++++++++++++++++ > board/amlogic/p201/p201.c | 43 ++++++++++++++ > configs/p201_defconfig | 41 +++++++++++++ > 5 files changed, 198 insertions(+) > create mode 100644 board/amlogic/p201/MAINTAINERS > create mode 100644 board/amlogic/p201/Makefile > create mode 100644 board/amlogic/p201/README.p201 > create mode 100644 board/amlogic/p201/p201.c > create mode 100644 configs/p201_defconfig > > diff --git a/board/amlogic/p201/MAINTAINERS b/board/amlogic/p201/MAINTAINERS > new file mode 100644 > index 0000000000..6ebb5f6396 > --- /dev/null > +++ b/board/amlogic/p201/MAINTAINERS > @@ -0,0 +1,6 @@ > +P201 > +M: Beniamino Galvani <b.galvani@gmail.com> You can remove Beniamino for this one. > +M: Neil Armstrong <narmstrong@baylibre.com> > +S: Maintained > +F: board/amlogic/p201/ > +F: configs/p201_defconfig > diff --git a/board/amlogic/p201/Makefile b/board/amlogic/p201/Makefile > new file mode 100644 > index 0000000000..11de5396ab > --- /dev/null > +++ b/board/amlogic/p201/Makefile > @@ -0,0 +1,5 @@ > +# SPDX-License-Identifier: GPL-2.0+ > +# > +# (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com> > + > +obj-y := p201.o > diff --git a/board/amlogic/p201/README.p201 b/board/amlogic/p201/README.p201 > new file mode 100644 > index 0000000000..c251096ce1 > --- /dev/null > +++ b/board/amlogic/p201/README.p201 > @@ -0,0 +1,103 @@ > +U-Boot for Amlogic P201 > +======================= > + > +P201 is a reference board manufactured by Amlogic with the following > +specifications: > + > + - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz > + - ARM Mali 450 GPU > + - 2GB DDR3 SDRAM > + - 10/100 Ethernet > + - HDMI 2.0 4K/60Hz display > + - 2 x USB 2.0 Host > + - eMMC, microSD > + - Infrared receiver > + - SDIO WiFi Module > + - CVBS+Stereo Audio Jack > + > +Schematics are available from Amlogic on demand. > + > +Currently the u-boot port supports the following devices: > + - serial > + - eMMC, microSD > + - Ethernet > + - I2C > + - Regulators > + - Reset controller > + - Clock controller > + - USB Host > + - ADC > + > +u-boot compilation > +================== > + > + > export ARCH=arm > + > export CROSS_COMPILE=aarch64-none-elf- > + > make p201_defconfig > + > make > + > +Image creation > +============== > + > +Amlogic doesn't provide sources for the firmware and for tools needed > +to create the bootloader image, so it is necessary to obtain them from > +the git tree published by the board vendor: > + > + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz > + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz > + > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz > + > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz > + > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH > + > git clone https://github.com/BayLibre/u-boot.git -b n-amlogic-openlinux-20170606 amlogic-u-boot > + > cd amlogic-u-boot > + > make gxb_p201_v1_defconfig > + > make > + > export FIPDIR=$PWD/fip > + > +Go back to mainline U-boot source tree then : > + > mkdir fip > + > + > cp $FIPDIR/gxl/bl2.bin fip/ > + > cp $FIPDIR/gxl/acs.bin fip/ > + > cp $FIPDIR/gxl/bl21.bin fip/ > + > cp $FIPDIR/gxl/bl30.bin fip/ > + > cp $FIPDIR/gxl/bl301.bin fip/ > + > cp $FIPDIR/gxl/bl31.img fip/ > + > cp u-boot.bin fip/bl33.bin > + > + > $FIPDIR/blx_fix.sh \ > + fip/bl30.bin \ > + fip/zero_tmp \ > + fip/bl30_zero.bin \ > + fip/bl301.bin \ > + fip/bl301_zero.bin \ > + fip/bl30_new.bin \ > + bl30 > + > + > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0 > + > + > $FIPDIR/blx_fix.sh \ > + fip/bl2_acs.bin \ > + fip/zero_tmp \ > + fip/bl2_zero.bin \ > + fip/bl21.bin \ > + fip/bl21_zero.bin \ > + fip/bl2_new.bin \ > + bl2 > + > + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin > + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img > + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin > + > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig > + > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \ > + --output fip/u-boot.bin \ > + --bl2 fip/bl2.n.bin.sig \ > + --bl30 fip/bl30_new.bin.enc \ > + --bl31 fip/bl31.img.enc \ > + --bl33 fip/bl33.bin.enc > + > +and then write the image to SD with: > + > + > DEV=/dev/your_sd_device > + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 > + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444 > diff --git a/board/amlogic/p201/p201.c b/board/amlogic/p201/p201.c > new file mode 100644 > index 0000000000..ef0c65cd9f > --- /dev/null > +++ b/board/amlogic/p201/p201.c > @@ -0,0 +1,43 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com> > + */ > + > +#include <common.h> > +#include <dm.h> > +#include <environment.h> > +#include <asm/io.h> > +#include <asm/arch/gx.h> > +#include <asm/arch/sm.h> > +#include <asm/arch/eth.h> > +#include <asm/arch/mem.h> > + > +#define EFUSE_SN_OFFSET 20 > +#define EFUSE_SN_SIZE 16 > +#define EFUSE_MAC_OFFSET 52 > +#define EFUSE_MAC_SIZE 6 > + > +int misc_init_r(void) > +{ > + u8 mac_addr[EFUSE_MAC_SIZE]; > + char serial[EFUSE_SN_SIZE]; > + ssize_t len; > + > + meson_eth_init(PHY_INTERFACE_MODE_RMII, 0); > + > + if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { > + len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, > + mac_addr, EFUSE_MAC_SIZE); > + if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr)) > + eth_env_set_enetaddr("ethaddr", mac_addr); > + } > + > + if (!env_get("serial#")) { > + len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial, > + EFUSE_SN_SIZE); > + if (len == EFUSE_SN_SIZE) > + env_set("serial#", serial); > + } > + > + return 0; > +} > diff --git a/configs/p201_defconfig b/configs/p201_defconfig > new file mode 100644 > index 0000000000..f6a821cf32 > --- /dev/null > +++ b/configs/p201_defconfig > @@ -0,0 +1,41 @@ > +CONFIG_ARM=y > +CONFIG_ARCH_MESON=y > +CONFIG_SYS_TEXT_BASE=0x01000000 > +CONFIG_DEBUG_UART_BASE=0xc81004c0 > +CONFIG_DEBUG_UART_CLOCK=24000000 > +CONFIG_IDENT_STRING=" p201" > +CONFIG_DEBUG_UART=y > +CONFIG_NR_DRAM_BANKS=1 > +CONFIG_OF_BOARD_SETUP=y > +CONFIG_MISC_INIT_R=y > +# CONFIG_DISPLAY_CPUINFO is not set > +# CONFIG_DISPLAY_BOARDINFO is not set > +# CONFIG_CMD_BDI is not set > +# CONFIG_CMD_IMI is not set > +CONFIG_CMD_GPIO=y > +CONFIG_CMD_I2C=y > +# CONFIG_CMD_LOADS is not set > +CONFIG_CMD_MMC=y > +# CONFIG_CMD_SETEXPR is not set > +CONFIG_CMD_REGULATOR=y > +CONFIG_OF_CONTROL=y > +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p201" > +CONFIG_NET_RANDOM_ETHADDR=y > +CONFIG_DM_GPIO=y > +CONFIG_DM_I2C=y > +CONFIG_SYS_I2C_MESON=y > +CONFIG_DM_MMC=y > +CONFIG_MMC_MESON_GX=y > +CONFIG_DM_ETH=y > +CONFIG_ETH_DESIGNWARE=y > +CONFIG_PINCTRL=y > +CONFIG_PINCTRL_MESON_GXBB=y > +CONFIG_DM_REGULATOR=y > +CONFIG_DM_REGULATOR_FIXED=y > +CONFIG_DM_RESET=y > +CONFIG_DEBUG_UART_MESON=y > +CONFIG_DEBUG_UART_ANNOUNCE=y > +CONFIG_DEBUG_UART_SKIP_INIT=y > +CONFIG_MESON_SERIAL=y > +CONFIG_OF_LIBFDT_OVERLAY=y > +CONFIG_SYS_BOARD="p201" > -- > 2.21.0 > Lookgs good, Acked-by: Neil Armstrong <narmstrong@baylibre.com> ^ permalink raw reply [flat|nested] 14+ messages in thread
* [U-Boot] [PATCH v2 2/3] ARM: board: meson: add p201 board @ 2019-03-14 20:12 ` Neil Armstrong 0 siblings, 0 replies; 14+ messages in thread From: Neil Armstrong @ 2019-03-14 20:12 UTC (permalink / raw) To: u-boot Hi, Le 14/03/2019 18:00, Mohammad Rasim a écrit : > > Signed-off-by: Mohammad Rasim <mohammad.rasim96@gmail.com> > --- > board/amlogic/p201/MAINTAINERS | 6 ++ > board/amlogic/p201/Makefile | 5 ++ > board/amlogic/p201/README.p201 | 103 +++++++++++++++++++++++++++++++++ > board/amlogic/p201/p201.c | 43 ++++++++++++++ > configs/p201_defconfig | 41 +++++++++++++ > 5 files changed, 198 insertions(+) > create mode 100644 board/amlogic/p201/MAINTAINERS > create mode 100644 board/amlogic/p201/Makefile > create mode 100644 board/amlogic/p201/README.p201 > create mode 100644 board/amlogic/p201/p201.c > create mode 100644 configs/p201_defconfig > > diff --git a/board/amlogic/p201/MAINTAINERS b/board/amlogic/p201/MAINTAINERS > new file mode 100644 > index 0000000000..6ebb5f6396 > --- /dev/null > +++ b/board/amlogic/p201/MAINTAINERS > @@ -0,0 +1,6 @@ > +P201 > +M: Beniamino Galvani <b.galvani@gmail.com> You can remove Beniamino for this one. > +M: Neil Armstrong <narmstrong@baylibre.com> > +S: Maintained > +F: board/amlogic/p201/ > +F: configs/p201_defconfig > diff --git a/board/amlogic/p201/Makefile b/board/amlogic/p201/Makefile > new file mode 100644 > index 0000000000..11de5396ab > --- /dev/null > +++ b/board/amlogic/p201/Makefile > @@ -0,0 +1,5 @@ > +# SPDX-License-Identifier: GPL-2.0+ > +# > +# (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com> > + > +obj-y := p201.o > diff --git a/board/amlogic/p201/README.p201 b/board/amlogic/p201/README.p201 > new file mode 100644 > index 0000000000..c251096ce1 > --- /dev/null > +++ b/board/amlogic/p201/README.p201 > @@ -0,0 +1,103 @@ > +U-Boot for Amlogic P201 > +======================= > + > +P201 is a reference board manufactured by Amlogic with the following > +specifications: > + > + - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz > + - ARM Mali 450 GPU > + - 2GB DDR3 SDRAM > + - 10/100 Ethernet > + - HDMI 2.0 4K/60Hz display > + - 2 x USB 2.0 Host > + - eMMC, microSD > + - Infrared receiver > + - SDIO WiFi Module > + - CVBS+Stereo Audio Jack > + > +Schematics are available from Amlogic on demand. > + > +Currently the u-boot port supports the following devices: > + - serial > + - eMMC, microSD > + - Ethernet > + - I2C > + - Regulators > + - Reset controller > + - Clock controller > + - USB Host > + - ADC > + > +u-boot compilation > +================== > + > + > export ARCH=arm > + > export CROSS_COMPILE=aarch64-none-elf- > + > make p201_defconfig > + > make > + > +Image creation > +============== > + > +Amlogic doesn't provide sources for the firmware and for tools needed > +to create the bootloader image, so it is necessary to obtain them from > +the git tree published by the board vendor: > + > + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz > + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz > + > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz > + > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz > + > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH > + > git clone https://github.com/BayLibre/u-boot.git -b n-amlogic-openlinux-20170606 amlogic-u-boot > + > cd amlogic-u-boot > + > make gxb_p201_v1_defconfig > + > make > + > export FIPDIR=$PWD/fip > + > +Go back to mainline U-boot source tree then : > + > mkdir fip > + > + > cp $FIPDIR/gxl/bl2.bin fip/ > + > cp $FIPDIR/gxl/acs.bin fip/ > + > cp $FIPDIR/gxl/bl21.bin fip/ > + > cp $FIPDIR/gxl/bl30.bin fip/ > + > cp $FIPDIR/gxl/bl301.bin fip/ > + > cp $FIPDIR/gxl/bl31.img fip/ > + > cp u-boot.bin fip/bl33.bin > + > + > $FIPDIR/blx_fix.sh \ > + fip/bl30.bin \ > + fip/zero_tmp \ > + fip/bl30_zero.bin \ > + fip/bl301.bin \ > + fip/bl301_zero.bin \ > + fip/bl30_new.bin \ > + bl30 > + > + > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0 > + > + > $FIPDIR/blx_fix.sh \ > + fip/bl2_acs.bin \ > + fip/zero_tmp \ > + fip/bl2_zero.bin \ > + fip/bl21.bin \ > + fip/bl21_zero.bin \ > + fip/bl2_new.bin \ > + bl2 > + > + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin > + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img > + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin > + > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig > + > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \ > + --output fip/u-boot.bin \ > + --bl2 fip/bl2.n.bin.sig \ > + --bl30 fip/bl30_new.bin.enc \ > + --bl31 fip/bl31.img.enc \ > + --bl33 fip/bl33.bin.enc > + > +and then write the image to SD with: > + > + > DEV=/dev/your_sd_device > + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 > + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444 > diff --git a/board/amlogic/p201/p201.c b/board/amlogic/p201/p201.c > new file mode 100644 > index 0000000000..ef0c65cd9f > --- /dev/null > +++ b/board/amlogic/p201/p201.c > @@ -0,0 +1,43 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com> > + */ > + > +#include <common.h> > +#include <dm.h> > +#include <environment.h> > +#include <asm/io.h> > +#include <asm/arch/gx.h> > +#include <asm/arch/sm.h> > +#include <asm/arch/eth.h> > +#include <asm/arch/mem.h> > + > +#define EFUSE_SN_OFFSET 20 > +#define EFUSE_SN_SIZE 16 > +#define EFUSE_MAC_OFFSET 52 > +#define EFUSE_MAC_SIZE 6 > + > +int misc_init_r(void) > +{ > + u8 mac_addr[EFUSE_MAC_SIZE]; > + char serial[EFUSE_SN_SIZE]; > + ssize_t len; > + > + meson_eth_init(PHY_INTERFACE_MODE_RMII, 0); > + > + if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { > + len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, > + mac_addr, EFUSE_MAC_SIZE); > + if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr)) > + eth_env_set_enetaddr("ethaddr", mac_addr); > + } > + > + if (!env_get("serial#")) { > + len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial, > + EFUSE_SN_SIZE); > + if (len == EFUSE_SN_SIZE) > + env_set("serial#", serial); > + } > + > + return 0; > +} > diff --git a/configs/p201_defconfig b/configs/p201_defconfig > new file mode 100644 > index 0000000000..f6a821cf32 > --- /dev/null > +++ b/configs/p201_defconfig > @@ -0,0 +1,41 @@ > +CONFIG_ARM=y > +CONFIG_ARCH_MESON=y > +CONFIG_SYS_TEXT_BASE=0x01000000 > +CONFIG_DEBUG_UART_BASE=0xc81004c0 > +CONFIG_DEBUG_UART_CLOCK=24000000 > +CONFIG_IDENT_STRING=" p201" > +CONFIG_DEBUG_UART=y > +CONFIG_NR_DRAM_BANKS=1 > +CONFIG_OF_BOARD_SETUP=y > +CONFIG_MISC_INIT_R=y > +# CONFIG_DISPLAY_CPUINFO is not set > +# CONFIG_DISPLAY_BOARDINFO is not set > +# CONFIG_CMD_BDI is not set > +# CONFIG_CMD_IMI is not set > +CONFIG_CMD_GPIO=y > +CONFIG_CMD_I2C=y > +# CONFIG_CMD_LOADS is not set > +CONFIG_CMD_MMC=y > +# CONFIG_CMD_SETEXPR is not set > +CONFIG_CMD_REGULATOR=y > +CONFIG_OF_CONTROL=y > +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p201" > +CONFIG_NET_RANDOM_ETHADDR=y > +CONFIG_DM_GPIO=y > +CONFIG_DM_I2C=y > +CONFIG_SYS_I2C_MESON=y > +CONFIG_DM_MMC=y > +CONFIG_MMC_MESON_GX=y > +CONFIG_DM_ETH=y > +CONFIG_ETH_DESIGNWARE=y > +CONFIG_PINCTRL=y > +CONFIG_PINCTRL_MESON_GXBB=y > +CONFIG_DM_REGULATOR=y > +CONFIG_DM_REGULATOR_FIXED=y > +CONFIG_DM_RESET=y > +CONFIG_DEBUG_UART_MESON=y > +CONFIG_DEBUG_UART_ANNOUNCE=y > +CONFIG_DEBUG_UART_SKIP_INIT=y > +CONFIG_MESON_SERIAL=y > +CONFIG_OF_LIBFDT_OVERLAY=y > +CONFIG_SYS_BOARD="p201" > -- > 2.21.0 > Lookgs good, Acked-by: Neil Armstrong <narmstrong@baylibre.com> ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 3/3] ARM: board: meson: add p200 board 2019-03-14 17:00 ` [U-Boot] " Mohammad Rasim @ 2019-03-14 17:00 ` Mohammad Rasim -1 siblings, 0 replies; 14+ messages in thread From: Mohammad Rasim @ 2019-03-14 17:00 UTC (permalink / raw) To: u-boot, u-boot-amlogic; +Cc: Mohammad Rasim, narmstrong Signed-off-by: Mohammad Rasim <mohammad.rasim96@gmail.com> --- board/amlogic/odroid-c2/README.p200 | 103 ++++++++++++++++++++++++++++ configs/p200_defconfig | 41 +++++++++++ 2 files changed, 144 insertions(+) create mode 100644 board/amlogic/odroid-c2/README.p200 create mode 100644 configs/p200_defconfig diff --git a/board/amlogic/odroid-c2/README.p200 b/board/amlogic/odroid-c2/README.p200 new file mode 100644 index 0000000000..01d82d1e79 --- /dev/null +++ b/board/amlogic/odroid-c2/README.p200 @@ -0,0 +1,103 @@ +U-Boot for Amlogic P200 +======================= + +P200 is a reference board manufactured by Amlogic with the following +specifications: + + - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz + - ARM Mali 450 GPU + - 2GB DDR3 SDRAM + - Gigabit Ethernet + - HDMI 2.0 4K/60Hz display + - 2 x USB 2.0 Host + - eMMC, microSD + - Infrared receiver + - SDIO WiFi Module + - CVBS+Stereo Audio Jack + +Schematics are available from Amlogic on demand. + +Currently the u-boot port supports the following devices: + - serial + - eMMC, microSD + - Ethernet + - I2C + - Regulators + - Reset controller + - Clock controller + - USB Host + - ADC + +u-boot compilation +================== + + > export ARCH=arm + > export CROSS_COMPILE=aarch64-none-elf- + > make p200_defconfig + > make + +Image creation +============== + +Amlogic doesn't provide sources for the firmware and for tools needed +to create the bootloader image, so it is necessary to obtain them from +the git tree published by the board vendor: + + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz + > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz + > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH + > git clone https://github.com/BayLibre/u-boot.git -b n-amlogic-openlinux-20170606 amlogic-u-boot + > cd amlogic-u-boot + > make gxb_p200_v1_defconfig + > make + > export FIPDIR=$PWD/fip + +Go back to mainline U-boot source tree then : + > mkdir fip + + > cp $FIPDIR/gxl/bl2.bin fip/ + > cp $FIPDIR/gxl/acs.bin fip/ + > cp $FIPDIR/gxl/bl21.bin fip/ + > cp $FIPDIR/gxl/bl30.bin fip/ + > cp $FIPDIR/gxl/bl301.bin fip/ + > cp $FIPDIR/gxl/bl31.img fip/ + > cp u-boot.bin fip/bl33.bin + + > $FIPDIR/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + + > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0 + + > $FIPDIR/blx_fix.sh \ + fip/bl2_acs.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/bl21.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin + > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig + > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \ + --output fip/u-boot.bin \ + --bl2 fip/bl2.n.bin.sig \ + --bl30 fip/bl30_new.bin.enc \ + --bl31 fip/bl31.img.enc \ + --bl33 fip/bl33.bin.enc + +and then write the image to SD with: + + > DEV=/dev/your_sd_device + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444 diff --git a/configs/p200_defconfig b/configs/p200_defconfig new file mode 100644 index 0000000000..4011866140 --- /dev/null +++ b/configs/p200_defconfig @@ -0,0 +1,41 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_DEBUG_UART_BASE=0xc81004c0 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_IDENT_STRING=" p200" +CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_OF_BOARD_SETUP=y +CONFIG_MISC_INIT_R=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p200" +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MESON=y +CONFIG_DM_MMC=y +CONFIG_MMC_MESON_GX=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_GXBB=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_MESON=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_SYS_BOARD="odroid-c2" -- 2.21.0 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [U-Boot] [PATCH v2 3/3] ARM: board: meson: add p200 board @ 2019-03-14 17:00 ` Mohammad Rasim 0 siblings, 0 replies; 14+ messages in thread From: Mohammad Rasim @ 2019-03-14 17:00 UTC (permalink / raw) To: u-boot Signed-off-by: Mohammad Rasim <mohammad.rasim96@gmail.com> --- board/amlogic/odroid-c2/README.p200 | 103 ++++++++++++++++++++++++++++ configs/p200_defconfig | 41 +++++++++++ 2 files changed, 144 insertions(+) create mode 100644 board/amlogic/odroid-c2/README.p200 create mode 100644 configs/p200_defconfig diff --git a/board/amlogic/odroid-c2/README.p200 b/board/amlogic/odroid-c2/README.p200 new file mode 100644 index 0000000000..01d82d1e79 --- /dev/null +++ b/board/amlogic/odroid-c2/README.p200 @@ -0,0 +1,103 @@ +U-Boot for Amlogic P200 +======================= + +P200 is a reference board manufactured by Amlogic with the following +specifications: + + - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz + - ARM Mali 450 GPU + - 2GB DDR3 SDRAM + - Gigabit Ethernet + - HDMI 2.0 4K/60Hz display + - 2 x USB 2.0 Host + - eMMC, microSD + - Infrared receiver + - SDIO WiFi Module + - CVBS+Stereo Audio Jack + +Schematics are available from Amlogic on demand. + +Currently the u-boot port supports the following devices: + - serial + - eMMC, microSD + - Ethernet + - I2C + - Regulators + - Reset controller + - Clock controller + - USB Host + - ADC + +u-boot compilation +================== + + > export ARCH=arm + > export CROSS_COMPILE=aarch64-none-elf- + > make p200_defconfig + > make + +Image creation +============== + +Amlogic doesn't provide sources for the firmware and for tools needed +to create the bootloader image, so it is necessary to obtain them from +the git tree published by the board vendor: + + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz + > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz + > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH + > git clone https://github.com/BayLibre/u-boot.git -b n-amlogic-openlinux-20170606 amlogic-u-boot + > cd amlogic-u-boot + > make gxb_p200_v1_defconfig + > make + > export FIPDIR=$PWD/fip + +Go back to mainline U-boot source tree then : + > mkdir fip + + > cp $FIPDIR/gxl/bl2.bin fip/ + > cp $FIPDIR/gxl/acs.bin fip/ + > cp $FIPDIR/gxl/bl21.bin fip/ + > cp $FIPDIR/gxl/bl30.bin fip/ + > cp $FIPDIR/gxl/bl301.bin fip/ + > cp $FIPDIR/gxl/bl31.img fip/ + > cp u-boot.bin fip/bl33.bin + + > $FIPDIR/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + + > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0 + + > $FIPDIR/blx_fix.sh \ + fip/bl2_acs.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/bl21.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin + > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig + > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \ + --output fip/u-boot.bin \ + --bl2 fip/bl2.n.bin.sig \ + --bl30 fip/bl30_new.bin.enc \ + --bl31 fip/bl31.img.enc \ + --bl33 fip/bl33.bin.enc + +and then write the image to SD with: + + > DEV=/dev/your_sd_device + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444 diff --git a/configs/p200_defconfig b/configs/p200_defconfig new file mode 100644 index 0000000000..4011866140 --- /dev/null +++ b/configs/p200_defconfig @@ -0,0 +1,41 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_DEBUG_UART_BASE=0xc81004c0 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_IDENT_STRING=" p200" +CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_OF_BOARD_SETUP=y +CONFIG_MISC_INIT_R=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p200" +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MESON=y +CONFIG_DM_MMC=y +CONFIG_MMC_MESON_GX=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_GXBB=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_MESON=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_SYS_BOARD="odroid-c2" -- 2.21.0 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v2 3/3] ARM: board: meson: add p200 board 2019-03-14 17:00 ` [U-Boot] " Mohammad Rasim @ 2019-03-14 20:13 ` Neil Armstrong -1 siblings, 0 replies; 14+ messages in thread From: Neil Armstrong @ 2019-03-14 20:13 UTC (permalink / raw) To: Mohammad Rasim, u-boot, u-boot-amlogic Hi, Le 14/03/2019 18:00, Mohammad Rasim a écrit : > > Signed-off-by: Mohammad Rasim <mohammad.rasim96@gmail.com> > --- > board/amlogic/odroid-c2/README.p200 | 103 ++++++++++++++++++++++++++++ > configs/p200_defconfig | 41 +++++++++++ > 2 files changed, 144 insertions(+) > create mode 100644 board/amlogic/odroid-c2/README.p200 > create mode 100644 configs/p200_defconfig You should also update the MAINTAINERS file in board/amlogic/odroid-c2/ for configs/p200_defconfig Otherwise looks good Neil > > diff --git a/board/amlogic/odroid-c2/README.p200 b/board/amlogic/odroid-c2/README.p200 > new file mode 100644 > index 0000000000..01d82d1e79 > --- /dev/null > +++ b/board/amlogic/odroid-c2/README.p200 > @@ -0,0 +1,103 @@ > +U-Boot for Amlogic P200 > +======================= > + > +P200 is a reference board manufactured by Amlogic with the following > +specifications: > + > + - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz > + - ARM Mali 450 GPU > + - 2GB DDR3 SDRAM > + - Gigabit Ethernet > + - HDMI 2.0 4K/60Hz display > + - 2 x USB 2.0 Host > + - eMMC, microSD > + - Infrared receiver > + - SDIO WiFi Module > + - CVBS+Stereo Audio Jack > + > +Schematics are available from Amlogic on demand. > + > +Currently the u-boot port supports the following devices: > + - serial > + - eMMC, microSD > + - Ethernet > + - I2C > + - Regulators > + - Reset controller > + - Clock controller > + - USB Host > + - ADC > + > +u-boot compilation > +================== > + > + > export ARCH=arm > + > export CROSS_COMPILE=aarch64-none-elf- > + > make p200_defconfig > + > make > + > +Image creation > +============== > + > +Amlogic doesn't provide sources for the firmware and for tools needed > +to create the bootloader image, so it is necessary to obtain them from > +the git tree published by the board vendor: > + > + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz > + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz > + > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz > + > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz > + > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH > + > git clone https://github.com/BayLibre/u-boot.git -b n-amlogic-openlinux-20170606 amlogic-u-boot > + > cd amlogic-u-boot > + > make gxb_p200_v1_defconfig > + > make > + > export FIPDIR=$PWD/fip > + > +Go back to mainline U-boot source tree then : > + > mkdir fip > + > + > cp $FIPDIR/gxl/bl2.bin fip/ > + > cp $FIPDIR/gxl/acs.bin fip/ > + > cp $FIPDIR/gxl/bl21.bin fip/ > + > cp $FIPDIR/gxl/bl30.bin fip/ > + > cp $FIPDIR/gxl/bl301.bin fip/ > + > cp $FIPDIR/gxl/bl31.img fip/ > + > cp u-boot.bin fip/bl33.bin > + > + > $FIPDIR/blx_fix.sh \ > + fip/bl30.bin \ > + fip/zero_tmp \ > + fip/bl30_zero.bin \ > + fip/bl301.bin \ > + fip/bl301_zero.bin \ > + fip/bl30_new.bin \ > + bl30 > + > + > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0 > + > + > $FIPDIR/blx_fix.sh \ > + fip/bl2_acs.bin \ > + fip/zero_tmp \ > + fip/bl2_zero.bin \ > + fip/bl21.bin \ > + fip/bl21_zero.bin \ > + fip/bl2_new.bin \ > + bl2 > + > + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin > + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img > + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin > + > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig > + > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \ > + --output fip/u-boot.bin \ > + --bl2 fip/bl2.n.bin.sig \ > + --bl30 fip/bl30_new.bin.enc \ > + --bl31 fip/bl31.img.enc \ > + --bl33 fip/bl33.bin.enc > + > +and then write the image to SD with: > + > + > DEV=/dev/your_sd_device > + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 > + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444 > diff --git a/configs/p200_defconfig b/configs/p200_defconfig > new file mode 100644 > index 0000000000..4011866140 > --- /dev/null > +++ b/configs/p200_defconfig > @@ -0,0 +1,41 @@ > +CONFIG_ARM=y > +CONFIG_ARCH_MESON=y > +CONFIG_SYS_TEXT_BASE=0x01000000 > +CONFIG_DEBUG_UART_BASE=0xc81004c0 > +CONFIG_DEBUG_UART_CLOCK=24000000 > +CONFIG_IDENT_STRING=" p200" > +CONFIG_DEBUG_UART=y > +CONFIG_NR_DRAM_BANKS=1 > +CONFIG_OF_BOARD_SETUP=y > +CONFIG_MISC_INIT_R=y > +# CONFIG_DISPLAY_CPUINFO is not set > +# CONFIG_DISPLAY_BOARDINFO is not set > +# CONFIG_CMD_BDI is not set > +# CONFIG_CMD_IMI is not set > +CONFIG_CMD_GPIO=y > +CONFIG_CMD_I2C=y > +# CONFIG_CMD_LOADS is not set > +CONFIG_CMD_MMC=y > +# CONFIG_CMD_SETEXPR is not set > +CONFIG_CMD_REGULATOR=y > +CONFIG_OF_CONTROL=y > +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p200" > +CONFIG_NET_RANDOM_ETHADDR=y > +CONFIG_DM_GPIO=y > +CONFIG_DM_I2C=y > +CONFIG_SYS_I2C_MESON=y > +CONFIG_DM_MMC=y > +CONFIG_MMC_MESON_GX=y > +CONFIG_DM_ETH=y > +CONFIG_ETH_DESIGNWARE=y > +CONFIG_PINCTRL=y > +CONFIG_PINCTRL_MESON_GXBB=y > +CONFIG_DM_REGULATOR=y > +CONFIG_DM_REGULATOR_FIXED=y > +CONFIG_DM_RESET=y > +CONFIG_DEBUG_UART_MESON=y > +CONFIG_DEBUG_UART_ANNOUNCE=y > +CONFIG_DEBUG_UART_SKIP_INIT=y > +CONFIG_MESON_SERIAL=y > +CONFIG_OF_LIBFDT_OVERLAY=y > +CONFIG_SYS_BOARD="odroid-c2" > -- > 2.21.0 > ^ permalink raw reply [flat|nested] 14+ messages in thread
* [U-Boot] [PATCH v2 3/3] ARM: board: meson: add p200 board @ 2019-03-14 20:13 ` Neil Armstrong 0 siblings, 0 replies; 14+ messages in thread From: Neil Armstrong @ 2019-03-14 20:13 UTC (permalink / raw) To: u-boot Hi, Le 14/03/2019 18:00, Mohammad Rasim a écrit : > > Signed-off-by: Mohammad Rasim <mohammad.rasim96@gmail.com> > --- > board/amlogic/odroid-c2/README.p200 | 103 ++++++++++++++++++++++++++++ > configs/p200_defconfig | 41 +++++++++++ > 2 files changed, 144 insertions(+) > create mode 100644 board/amlogic/odroid-c2/README.p200 > create mode 100644 configs/p200_defconfig You should also update the MAINTAINERS file in board/amlogic/odroid-c2/ for configs/p200_defconfig Otherwise looks good Neil > > diff --git a/board/amlogic/odroid-c2/README.p200 b/board/amlogic/odroid-c2/README.p200 > new file mode 100644 > index 0000000000..01d82d1e79 > --- /dev/null > +++ b/board/amlogic/odroid-c2/README.p200 > @@ -0,0 +1,103 @@ > +U-Boot for Amlogic P200 > +======================= > + > +P200 is a reference board manufactured by Amlogic with the following > +specifications: > + > + - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz > + - ARM Mali 450 GPU > + - 2GB DDR3 SDRAM > + - Gigabit Ethernet > + - HDMI 2.0 4K/60Hz display > + - 2 x USB 2.0 Host > + - eMMC, microSD > + - Infrared receiver > + - SDIO WiFi Module > + - CVBS+Stereo Audio Jack > + > +Schematics are available from Amlogic on demand. > + > +Currently the u-boot port supports the following devices: > + - serial > + - eMMC, microSD > + - Ethernet > + - I2C > + - Regulators > + - Reset controller > + - Clock controller > + - USB Host > + - ADC > + > +u-boot compilation > +================== > + > + > export ARCH=arm > + > export CROSS_COMPILE=aarch64-none-elf- > + > make p200_defconfig > + > make > + > +Image creation > +============== > + > +Amlogic doesn't provide sources for the firmware and for tools needed > +to create the bootloader image, so it is necessary to obtain them from > +the git tree published by the board vendor: > + > + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz > + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz > + > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz > + > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz > + > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH > + > git clone https://github.com/BayLibre/u-boot.git -b n-amlogic-openlinux-20170606 amlogic-u-boot > + > cd amlogic-u-boot > + > make gxb_p200_v1_defconfig > + > make > + > export FIPDIR=$PWD/fip > + > +Go back to mainline U-boot source tree then : > + > mkdir fip > + > + > cp $FIPDIR/gxl/bl2.bin fip/ > + > cp $FIPDIR/gxl/acs.bin fip/ > + > cp $FIPDIR/gxl/bl21.bin fip/ > + > cp $FIPDIR/gxl/bl30.bin fip/ > + > cp $FIPDIR/gxl/bl301.bin fip/ > + > cp $FIPDIR/gxl/bl31.img fip/ > + > cp u-boot.bin fip/bl33.bin > + > + > $FIPDIR/blx_fix.sh \ > + fip/bl30.bin \ > + fip/zero_tmp \ > + fip/bl30_zero.bin \ > + fip/bl301.bin \ > + fip/bl301_zero.bin \ > + fip/bl30_new.bin \ > + bl30 > + > + > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0 > + > + > $FIPDIR/blx_fix.sh \ > + fip/bl2_acs.bin \ > + fip/zero_tmp \ > + fip/bl2_zero.bin \ > + fip/bl21.bin \ > + fip/bl21_zero.bin \ > + fip/bl2_new.bin \ > + bl2 > + > + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin > + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img > + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin > + > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig > + > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \ > + --output fip/u-boot.bin \ > + --bl2 fip/bl2.n.bin.sig \ > + --bl30 fip/bl30_new.bin.enc \ > + --bl31 fip/bl31.img.enc \ > + --bl33 fip/bl33.bin.enc > + > +and then write the image to SD with: > + > + > DEV=/dev/your_sd_device > + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 > + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444 > diff --git a/configs/p200_defconfig b/configs/p200_defconfig > new file mode 100644 > index 0000000000..4011866140 > --- /dev/null > +++ b/configs/p200_defconfig > @@ -0,0 +1,41 @@ > +CONFIG_ARM=y > +CONFIG_ARCH_MESON=y > +CONFIG_SYS_TEXT_BASE=0x01000000 > +CONFIG_DEBUG_UART_BASE=0xc81004c0 > +CONFIG_DEBUG_UART_CLOCK=24000000 > +CONFIG_IDENT_STRING=" p200" > +CONFIG_DEBUG_UART=y > +CONFIG_NR_DRAM_BANKS=1 > +CONFIG_OF_BOARD_SETUP=y > +CONFIG_MISC_INIT_R=y > +# CONFIG_DISPLAY_CPUINFO is not set > +# CONFIG_DISPLAY_BOARDINFO is not set > +# CONFIG_CMD_BDI is not set > +# CONFIG_CMD_IMI is not set > +CONFIG_CMD_GPIO=y > +CONFIG_CMD_I2C=y > +# CONFIG_CMD_LOADS is not set > +CONFIG_CMD_MMC=y > +# CONFIG_CMD_SETEXPR is not set > +CONFIG_CMD_REGULATOR=y > +CONFIG_OF_CONTROL=y > +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p200" > +CONFIG_NET_RANDOM_ETHADDR=y > +CONFIG_DM_GPIO=y > +CONFIG_DM_I2C=y > +CONFIG_SYS_I2C_MESON=y > +CONFIG_DM_MMC=y > +CONFIG_MMC_MESON_GX=y > +CONFIG_DM_ETH=y > +CONFIG_ETH_DESIGNWARE=y > +CONFIG_PINCTRL=y > +CONFIG_PINCTRL_MESON_GXBB=y > +CONFIG_DM_REGULATOR=y > +CONFIG_DM_REGULATOR_FIXED=y > +CONFIG_DM_RESET=y > +CONFIG_DEBUG_UART_MESON=y > +CONFIG_DEBUG_UART_ANNOUNCE=y > +CONFIG_DEBUG_UART_SKIP_INIT=y > +CONFIG_MESON_SERIAL=y > +CONFIG_OF_LIBFDT_OVERLAY=y > +CONFIG_SYS_BOARD="odroid-c2" > -- > 2.21.0 > ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2019-03-14 20:13 UTC | newest] Thread overview: 14+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2019-03-14 17:00 [PATCH v2 0/3] ARM: meson: add p200 and p201 boards Mohammad Rasim 2019-03-14 17:00 ` [U-Boot] " Mohammad Rasim 2019-03-14 17:00 ` [PATCH v2 1/3] ARM: dts: " Mohammad Rasim 2019-03-14 17:00 ` [U-Boot] " Mohammad Rasim 2019-03-14 20:09 ` Neil Armstrong 2019-03-14 20:09 ` [U-Boot] " Neil Armstrong 2019-03-14 17:00 ` [PATCH v2 2/3] ARM: board: meson: add p201 board Mohammad Rasim 2019-03-14 17:00 ` [U-Boot] " Mohammad Rasim 2019-03-14 20:12 ` Neil Armstrong 2019-03-14 20:12 ` [U-Boot] " Neil Armstrong 2019-03-14 17:00 ` [PATCH v2 3/3] ARM: board: meson: add p200 board Mohammad Rasim 2019-03-14 17:00 ` [U-Boot] " Mohammad Rasim 2019-03-14 20:13 ` Neil Armstrong 2019-03-14 20:13 ` [U-Boot] " Neil Armstrong
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