From: "Luck, Tony" <tony.luck@intel.com>
To: "Li, Zhiquan1" <zhiquan1.li@intel.com>,
Jarkko Sakkinen <jarkko@kernel.org>
Cc: "linux-sgx@vger.kernel.org" <linux-sgx@vger.kernel.org>,
"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
"Christopherson,, Sean" <seanjc@google.com>,
"Du, Fan" <fan.du@intel.com>
Subject: RE: [PATCH 0/4] x86/sgx: fine grained SGX MCA behavior
Date: Sun, 15 May 2022 03:35:20 +0000 [thread overview]
Message-ID: <5b6ad3e2af614caf9b41092797ffcd86@intel.com> (raw)
In-Reply-To: <35284def-ca7f-d42b-164f-1c49eb8977ee@intel.com>
> Any machine check exception (#MC) that occurs after Intel SGX is first enables
> causes Intel SGX to be disabled, (CPUID.SGX_Leaf.0:EAX[SGX1] == 0). It cannot be
> enabled until after the next reset. "
That part is out of date. A machine check used to disable SGX system-wide. It now just
disables the enclave that triggered the machine check.
Is that text still in the latest SDM (version 077, April 2022)?
-Tony
next prev parent reply other threads:[~2022-05-15 3:35 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-10 3:16 [PATCH 0/4] x86/sgx: fine grained SGX MCA behavior Zhiquan Li
2022-05-11 10:29 ` Jarkko Sakkinen
2022-05-12 12:03 ` Zhiquan Li
2022-05-13 14:38 ` Jarkko Sakkinen
2022-05-13 16:35 ` Luck, Tony
2022-05-14 5:39 ` Zhiquan Li
2022-05-15 3:35 ` Luck, Tony [this message]
2022-05-16 0:57 ` Zhiquan Li
2022-05-16 2:29 ` Kai Huang
2022-05-16 8:40 ` Zhiquan Li
2022-05-17 0:43 ` Kai Huang
2022-05-18 1:02 ` Zhiquan Li
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