Re: [PATCH] arm64: qcom: dts: sm8750: add coresight nodes

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 11/19/25 3:01 AM, Jie Gan wrote:
> 
> 
> On 11/18/2025 6:03 PM, Konrad Dybcio wrote:
>> On 11/17/25 10:31 AM, Jie Gan wrote:
>>> Add CoreSight DT nodes for AOSS, QDSS, Turing, and Modem blocks to enable
>>> the STM and TPDM sources to route trace data to the ETF for debugging.
>>>
>>> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
>>> ---
>>>   arch/arm64/boot/dts/qcom/sm8750.dtsi | 981 +++++++++++++++++++++++++++++++++++
>>>   1 file changed, 981 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
>>> index 3f0b57f428bb..56c2605f3e0d 100644
>>> --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
>>> @@ -3313,6 +3313,948 @@ tcsrcc: clock-controller@f204008 {
>>>               #reset-cells = <1>;
>>>           };
>>>   +        stm@10002000 {
>>> +            compatible = "arm,coresight-stm", "arm,primecell";
>>> +            reg = <0x0 0x10002000 0x0 0x1000>,
>>> +                  <0x0 0x37280000 0x0 0x180000>;
>>
>> This region is a little bigger but it's not described clearly. Is there
>> a reason to use this slice of it and not the whole thing?
> 
> This region is about the STM channels which are allocated for APSS/HLOS. The channel 10240-20479 is allocated for APSS/HLOS, each occupied 256. So the start address is 10240 * 256 = 2,621,440 (0x28000). The length is 0x180000 because we only use part of these channels so far.

This is useful information. Could we better document it internally in the
usual place one would go to check on registers?

Konrad