From: "CK Hu (胡俊光)" <ck.hu@mediatek.com>
To: "regressions@leemhuis.info" <regressions@leemhuis.info>,
"me@adamthiede.com" <me@adamthiede.com>,
"bisson.gary@gmail.com" <bisson.gary@gmail.com>
Cc: "chunkuang.hu@kernel.org" <chunkuang.hu@kernel.org>,
"simona@ffwll.ch" <simona@ffwll.ch>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
"airlied@gmail.com" <airlied@gmail.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
"linux-mediatek@lists.infradead.org"
<linux-mediatek@lists.infradead.org>,
"regressions@lists.linux.dev" <regressions@lists.linux.dev>
Subject: Re: [PATCH] drm/mediatek: mtk_dsi: enable hs clock during pre-enable
Date: Tue, 7 Jul 2026 02:20:16 +0000 [thread overview]
Message-ID: <5baeb90d2c3736df67ad075ede4ac765bfeaed2d.camel@mediatek.com> (raw)
In-Reply-To: <f0d99b1a-e383-4d14-adb1-4ccab46efddb@leemhuis.info>
On Mon, 2026-07-06 at 12:16 +0200, Thorsten Leemhuis wrote:
> External email : Please do not click links or open attachments until you have verified the sender or the content.
>
>
> On 6/22/26 15:23, Adam Thiede wrote:
> > On 6/22/26 06:22, Gary Bisson wrote:
> > > On Thu, Jun 18, 2026 at 04:06:28PM -0500, Adam Thiede wrote:
> > > > On 1/20/26 05:36, Gary Bisson wrote:
> > > > > Some bridges, such as the TI SN65DSI83, require the HS clock to be
> > > > > running in order to lock its PLL during its own pre-enable function.
> > > > >
> > > > > Without this change, the bridge gives the following error:
> > > > > sn65dsi83 14-002c: failed to lock PLL, ret=-110
> > > > > sn65dsi83 14-002c: Unexpected link status 0x01
> > > > > sn65dsi83 14-002c: reset the pipe
> > > > > [...]
> > > >
> > > > This commit was part of 7.1 and caused a problem for me.
> > > > I'm running postmarketOS (basically Alpine Linux) on a Lenovo C330
> > > > chromebook with a Mediatek MT8173 processor.
> > > > The problem: when the display on my laptop powers off (via suspend or
> > > > idle,
> > > > like xset dpms off) the picture does not come back when the display
> > > > powers
> > > > back on (from resume). The display backlight comes on and brightness is
> > > > adjustable but there is no picture. The only fix is to reboot.
> > > >
> > > > Reverting this commit and applying it as a patch on top of 7.1
> > > > addresses the
> > > > issue for me.
> > > >
> > > > You can view the config I'm using here:
> > > > https://urldefense.com/v3/__https://gitlab.postmarketos.org/postmarketOS/pmaports/-/__;!!CTRNKA9wMg0ARbw!jrsPDtSEUdaINzLlq92Li8gmsEBkTOxZ6WUzNHjvIN6CyOJjHiHkNSOhIRPXFTLPlaYlxU2uvryVkwjUAN9bmax5$
> > > > merge_requests/8819
> > > >
> > > > Is there any sort of testing or other debugging info I can provide to
> > > > help
> > > > address this issue?
> > >
> > > Thanks for reporting the issue, could you share some logs? Is the driver
> > > saying anything during resume? Also, what type of panel is used on that
> > > chromebook?
> >
> > The curious thing is that there are no real logs in dmesg or /var/log/
> > messages about this. This picture just fails to come back. If there are
> > some kernel params I can set to get deeper logging, that would help, but
> > I'm not aware of any.
> >
> > I think the panel is a "BOE NV116WHM-T00" - I used this command to get
> > info: cat /sys/class/drm/card0-eDP-1/edid | edid-decode
> >
> > Output: https://urldefense.com/v3/__https://termbin.com/8nbd__;!!CTRNKA9wMg0ARbw!jrsPDtSEUdaINzLlq92Li8gmsEBkTOxZ6WUzNHjvIN6CyOJjHiHkNSOhIRPXFTLPlaYlxU2uvryVkwjUAJooSyqL$
>
> This looked stalled. If I'm mistaken here, please let me known; but if
> no solution is in sight, should we maybe just revert the change until a
> proper was found?
>
> Ciao, Thorsten
>
>
It's welcome anyone to provide a revert patch,
but I would still wait for the fixup patch until 7.2-rc4.
If no fixup patch exist, then apply the revert patch.
Regards,
CK
next prev parent reply other threads:[~2026-07-07 2:20 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-20 11:36 [PATCH] drm/mediatek: mtk_dsi: enable hs clock during pre-enable Gary Bisson
2026-02-25 6:20 ` CK Hu (胡俊光)
2026-02-25 6:20 ` CK Hu (胡俊光)
2026-02-25 8:20 ` Chen-Yu Tsai
2026-02-25 13:16 ` AngeloGioacchino Del Regno
2026-03-22 12:48 ` Chun-Kuang Hu
2026-06-18 21:06 ` Adam Thiede
2026-06-22 11:22 ` Gary Bisson
2026-06-22 13:23 ` Adam Thiede
2026-07-06 10:16 ` Thorsten Leemhuis
2026-07-07 2:20 ` CK Hu (胡俊光) [this message]
2026-07-07 8:51 ` Thorsten Leemhuis
2026-07-07 10:38 ` AngeloGioacchino Del Regno
2026-07-08 1:25 ` Adam Thiede
2026-07-08 12:12 ` AngeloGioacchino Del Regno
2026-07-08 12:13 ` Gary Bisson
2026-07-08 12:25 ` AngeloGioacchino Del Regno
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