Re: [PATCH v4 4/9] cpufreq: amd_pstate: implement Pstate EPP support for the AMD processors

[Wyes Karny <wyes.karny@amd.com>]

Hi Perry,

On 11/10/2022 11:28 PM, Perry Yuan wrote:
[snip]
> +
> +static ssize_t store_energy_performance_preference(
> +		struct cpufreq_policy *policy, const char *buf, size_t count)
> +{
> +	struct amd_cpudata *cpudata = policy->driver_data;
> +	char str_preference[21];
> +	ssize_t ret;
> +	u32 epp = 0;

Here `epp` is a unused variable.
 [snip]
> @@ -657,6 +1281,20 @@ static int __init amd_pstate_param(char *str)
>  	if (!str)
>  		return -EINVAL;
>  
> +	/*
> +	 * Disable amd-pstate driver by default for now
> +	 * append amd-pstate=active or amd-pstate=active
> +	 * to enable driver loaded
> +	 */
> +	if (!strcmp(str, "active")) {
> +		cppc_load = 1;
> +		default_pstate_driver = &amd_pstate_epp_driver;
> +	} else if (!strcmp(str, "passive")) {
> +		epp_off = 1;
> +		cppc_load = 1;
> +		default_pstate_driver = &amd_pstate_driver;
> +	}
> +
>  	/*
>  	 * support shared memory type CPPC which has no MSR function.
>  	 * enable amd-pstate on processors with shared memory solution

In the shared memory support section also `cppc_load` has to be set otherwise
amd_pstate=legacy_cppc will not work.

if (!strcmp(str, "legacy_cppc")) {
	shared_mem = true;
	cppc_load = 1;
}


-- 
Thanks & Regards,
Wyes