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From: Logan Gunthorpe <logang@deltatee.com>
To: Frank Li <Frank.li@oss.nxp.com>
Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org,
	Vinod Koul <vkoul@kernel.org>, Frank Li <Frank.li@nxp.com>,
	Sashiko <sashiko-bot@kernel.org>
Subject: Re: [PATCH 4/6] dmaengine: plx_dma: add dma_rmb() after observing write-back status
Date: Fri, 6 Nov 2026 16:13:08 -0700	[thread overview]
Message-ID: <5deeec6f-9dff-40f7-93cc-5bb140ca9901@deltatee.com> (raw)
In-Reply-To: <au4SwnmfSotzKalT@lizhi-Precision-Tower-5810>

Thanks for the reviews, I've included your tags in the patches I'll send
next week.

On 2026-11-06 10:47, Frank Li wrote:
> On Tue, Nov 03, 2026 at 09:51:59AM -0600, Logan Gunthorpe wrote:
>> +		/*
>> +		 * Ensure the write-back status is read before the
>> +		 * completed transfer's payload.
>> +		 */
>> +		dma_rmb();
>> +
> 
> Is it false alarm by sashiko? follow code have dependence with 'flags'.
> 
> which part in Documentation/memory-barriers.txt show here need dma_rmb()?

Yes, this stuff always confuses me to no end. But I'm pretty sure it is
correct so let me try to explain.

The two actions in question are:

1. read desc->hw->flags_and_size and check if VALID is clear
2. read the destination buffer which may happen in:
   a. dma_unmap_page() via dmaengine_unmap() in the case of a bounce
      buffer being used
   b. a calling driver's callback or processing after polling with
      tx_status()

On a weakly ordered CPU like arm64, nothing forces load 2 to happen
after load 1, even though load 2 is only reached when load 1 says
"done". The CPU predicts that (flags & VALID) condition won't be taken
and issues load 2 early. If the device hadn't finished writing at that
moment, load 2 returns stale data. When load 1 then confirms the
prediction, nothing gets redone, and the stale data is used. That's the
"load-load control dependency" case in memory-barriers.txt. dma_rmb()
stops loads after it from being satisfied before loads ahead of it.

I've tried to improve the comment on the dma_rmb() call to hopefully be
more clear on this point and I'll put the above text as the commit
message seeing I think it is clearer for when I send the series again.

Logan


  reply	other threads:[~2026-11-06 23:13 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-03 15:51 [PATCH 0/6] plx_dma fixes Logan Gunthorpe
2026-11-03 15:51 ` [PATCH 1/6] dmaengine: plx_dma: don't call pci_irq_vector() under rcu_read_lock() Logan Gunthorpe
2026-11-06 17:27   ` Frank Li
2026-11-03 15:51 ` [PATCH 2/6] dmaengine: plx_dma: fix descriptor ring leak in alloc_chan_resources() Logan Gunthorpe
2026-11-06 17:28   ` Frank Li
2026-11-03 15:51 ` [PATCH 3/6] dmaengine: plx_dma: use writel() for the 32-bit PLX_REG_CTRL register Logan Gunthorpe
2026-11-06 17:29   ` Frank Li
2026-11-03 15:51 ` [PATCH 4/6] dmaengine: plx_dma: add dma_rmb() after observing write-back status Logan Gunthorpe
2026-11-06 17:47   ` Frank Li
2026-11-06 23:13     ` Logan Gunthorpe [this message]
2026-11-03 15:52 ` [PATCH 5/6] dmaengine: plx_dma: use spin_lock_bh() in plx_dma_process_desc() Logan Gunthorpe
2026-11-06 17:48   ` Frank Li
2026-11-03 15:52 ` [PATCH 6/6] dmaengine: plx_dma: don't invoke client callbacks with ring_lock held Logan Gunthorpe
2026-11-03 16:13   ` sashiko-bot
2026-11-03 17:26     ` Logan Gunthorpe

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