From: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
To: "Manna, Animesh" <animesh.manna@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>
Cc: "Shankar, Uma" <uma.shankar@intel.com>
Subject: Re: [PATCH v4 13/13] drm/i915/display: Add DC3CO count and residency in dmc debugfs
Date: Mon, 1 Jun 2026 18:08:36 +0530 [thread overview]
Message-ID: <5e8bc0a1-c846-463b-97d8-a1f4abe0aefd@intel.com> (raw)
In-Reply-To: <DS0PR11MB8049419C11C883D2B72B303DF9152@DS0PR11MB8049.namprd11.prod.outlook.com>
On 01-06-2026 11:20, Manna, Animesh wrote:
>
>> -----Original Message-----
>> From: Dibin Moolakadan Subrahmanian
>> <dibin.moolakadan.subrahmanian@intel.com>
>> Sent: Wednesday, May 27, 2026 12:48 AM
>> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
>> Cc: Manna, Animesh <animesh.manna@intel.com>; Shankar, Uma
>> <uma.shankar@intel.com>
>> Subject: [PATCH v4 13/13] drm/i915/display: Add DC3CO count and residency
>> in dmc debugfs
>>
>> Expose DC3CO count and residency for xe3lp platforms via debugfs.
>>
>> Changes in v4:
>> - Keep dc5_reg register initialization to avoid any
>> invalid access (sashiko)
>>
>> Signed-off-by: Dibin Moolakadan Subrahmanian
>> <dibin.moolakadan.subrahmanian@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_dmc.c | 9 ++++++++-
>> drivers/gpu/drm/i915/display/intel_dmc_regs.h | 2 ++
>> 2 files changed, 10 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
>> b/drivers/gpu/drm/i915/display/intel_dmc.c
>> index a133785c815b..5ffe2b1c3c51 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
>> @@ -1650,7 +1650,14 @@ static int intel_dmc_debugfs_status_show(struct
>> seq_file *m, void *unused)
>> DMC_VERSION_MINOR(dmc->version));
>>
>> if (DISPLAY_VER(display) >= 12) {
>> - if (display->platform.dgfx || DISPLAY_VER(display) >= 14) {
>> + if (DISPLAY_VER(display) >= 35) {
>> + dc5_reg = DG1_DMC_DEBUG_DC5_COUNT;
>> + seq_printf(m, "DC3CO count: %d\n",
>> + intel_de_read(display,
>> XE3P_DMC_DC3CO_COUNT));
>> +
>> + seq_printf(m, "DC3CO residency: %d\n",
>> + intel_de_read(display,
>> DC_STATE_DC3CO_RESIDENCY));
>> + } else if (display->platform.dgfx || DISPLAY_VER(display) >=
>> 14) {
>> dc5_reg = DG1_DMC_DEBUG_DC5_COUNT;
>> } else {
>> dc5_reg = TGL_DMC_DEBUG_DC5_COUNT;
>> diff --git a/drivers/gpu/drm/i915/display/intel_dmc_regs.h
>> b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
>> index 38e342b45af0..1998549b6318 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dmc_regs.h
>> +++ b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
>> @@ -531,6 +531,8 @@ enum pipedmc_event_id {
>> #define TGL_DMC_DEBUG3 _MMIO(0x101090)
>> #define DG1_DMC_DEBUG3 _MMIO(0x13415c)
>>
>> +#define XE3P_DMC_DC3CO_COUNT _MMIO(0x8f05C)
> Lower and upper-case mixing.
Will change it to lower case in the next version.
> Regards,
> Animesh
>
>> +
>> #define DMC_WAKELOCK_CFG _MMIO(0x8F1B0)
>> #define DMC_WAKELOCK_CFG_ENABLE REG_BIT(31)
>> #define DMC_WAKELOCK1_CTL _MMIO(0x8F140)
>> --
>> 2.43.0
next prev parent reply other threads:[~2026-06-01 12:38 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-26 19:18 [PATCH v4 00/13] drm/i915/display: Add DC3CO support Dibin Moolakadan Subrahmanian
2026-05-26 19:18 ` [PATCH v4 01/13] drm/i915/display: Remove TGL " Dibin Moolakadan Subrahmanian
2026-05-27 9:30 ` Manna, Animesh
2026-05-26 19:18 ` [PATCH v4 02/13] drm/i915/display: Switch DC3CO enable from standalone bit to DC level encoding Dibin Moolakadan Subrahmanian
2026-06-01 5:25 ` Manna, Animesh
2026-06-01 12:18 ` Dibin Moolakadan Subrahmanian
2026-05-26 19:18 ` [PATCH v4 03/13] drm/i915/display: Use FIELD_PREP() for DC state enable bits Dibin Moolakadan Subrahmanian
2026-06-01 5:30 ` Manna, Animesh
2026-06-01 12:22 ` Dibin Moolakadan Subrahmanian
2026-05-26 19:18 ` [PATCH v4 04/13] drm/i915/display: Add DC3CO DC_STATE enable/disable support Dibin Moolakadan Subrahmanian
2026-06-01 5:42 ` Manna, Animesh
2026-06-01 12:30 ` Dibin Moolakadan Subrahmanian
2026-05-26 19:18 ` [PATCH v4 05/13] drm/i915/display: Add DC3CO support check Dibin Moolakadan Subrahmanian
2026-05-27 12:26 ` Jani Nikula
2026-05-28 9:18 ` Dibin Moolakadan Subrahmanian
2026-05-26 19:18 ` [PATCH v4 06/13] drm/i915/display: Add HAS_DC3CO() macro Dibin Moolakadan Subrahmanian
2026-05-26 19:18 ` [PATCH v4 07/13] drm/i915/display: Add DC3CO eligibility computation Dibin Moolakadan Subrahmanian
2026-05-27 12:24 ` Jani Nikula
2026-05-28 11:29 ` Dibin Moolakadan Subrahmanian
2026-05-27 12:28 ` Jani Nikula
2026-05-28 9:46 ` Dibin Moolakadan Subrahmanian
2026-05-26 19:18 ` [PATCH v4 08/13] drm/i915/display: Store DC3CO eligibility in PSR state Dibin Moolakadan Subrahmanian
2026-05-27 12:30 ` Jani Nikula
2026-05-28 11:37 ` Dibin Moolakadan Subrahmanian
2026-05-26 19:18 ` [PATCH v4 09/13] drm/i915/display: PSR2: Set idle_frames to 0 for DC3CO Dibin Moolakadan Subrahmanian
2026-05-26 19:18 ` [PATCH v4 10/13] drm/i915/display: Enable DC3CO idle protocol in ALPM Dibin Moolakadan Subrahmanian
2026-05-26 19:18 ` [PATCH v4 11/13] drm/i915/display: PSR Add delayed work to exit DC3CO Dibin Moolakadan Subrahmanian
2026-05-26 19:18 ` [PATCH v4 12/13] drm/i915/display: Add helper to enable DC counter Dibin Moolakadan Subrahmanian
2026-06-01 5:47 ` Manna, Animesh
2026-06-01 12:35 ` Dibin Moolakadan Subrahmanian
2026-05-26 19:18 ` [PATCH v4 13/13] drm/i915/display: Add DC3CO count and residency in dmc debugfs Dibin Moolakadan Subrahmanian
2026-06-01 5:50 ` Manna, Animesh
2026-06-01 12:38 ` Dibin Moolakadan Subrahmanian [this message]
2026-05-26 20:14 ` ✓ CI.KUnit: success for drm/i915/display: Add DC3CO support (rev4) Patchwork
2026-05-26 20:14 ` ✓ i915.CI.BAT: " Patchwork
2026-05-26 20:52 ` ✓ Xe.CI.BAT: " Patchwork
2026-05-27 1:20 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-05-27 4:27 ` ✗ i915.CI.Full: " Patchwork
2026-05-27 10:16 ` ✓ i915.CI.Full: success " Patchwork
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