From mboxrd@z Thu Jan  1 00:00:00 1970
Date: Mon, 25 Feb 2008 20:03:33 +0100
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From: Joachim Meyer <Jogi95@domain.hid>
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Subject: Re: [Xenomai-help] Xenomai and Virtex II Pro (PPC405)
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To: Alexis Berlemont <berlemont.hauw@domain.hid>
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Hi

>I don't understand: I thought only the PPC405 cores were implemented as hard 
>IPs inside the FPGA, not the DDR/SDRAM controller, the EBC, etc.

Your probably right. I'm just starting to learn about FPGAs. But I didn't write anything in VHDL. But in the EDK (The Xilinx Programming Suite) I used the standard components on the builder, which includes some things like UART and DDRam, so the Code is probably in there as IP cores.

Thanks for all the information.
Joachim

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