From: "Lazar, Lijo" <lijo.lazar@amd.com>
To: "amd-gfx@lists.freedesktop.org" <amd-gfx@lists.freedesktop.org>
Cc: "Zhang, Hawking" <Hawking.Zhang@amd.com>,
"Deucher, Alexander" <Alexander.Deucher@amd.com>,
"Koenig, Christian" <Christian.Koenig@amd.com>,
"Zhu, James" <James.Zhu@amd.com>, "Ma, Bing" <Bing.Ma@amd.com>
Subject: Re: [PATCH] drm/amdgpu: Derive RLC SPM xcc from GFXHUB
Date: Mon, 12 Oct 2026 20:58:06 +0530 [thread overview]
Message-ID: <6180206a-85c3-4d64-9c40-e22094176e71@amd.com> (raw)
In-Reply-To: <SA0PR12MB7091927251394D32F43248A7978D2@SA0PR12MB7091.namprd12.prod.outlook.com>
<Ping + 1>
On 28-Sep-26 7:19 PM, Lazar, Lijo wrote:
> <Ping>
>
> Thanks,
> Lijo
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Lijo Lazar
> Sent: Friday, September 25, 2026 3:07 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Hawking <Hawking.Zhang@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Zhu, James <James.Zhu@amd.com>; Ma, Bing <Bing.Ma@amd.com>
> Subject: [PATCH] drm/amdgpu: Derive RLC SPM xcc from GFXHUB
>
> RLC SPM is updated for GFX subsystem related performance counters. Only jobs on rings that use GFX subsystem need to be updated. Some rings like SDMA could be inside/outside of GFX subsytem based on SOC. Identify the rings using GFXHUB assignment and use hub id assigned to find the right GC rather than relying on xcc id. xcc id may not be necessarily assigned properly for all rings.
>
> Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c | 31 +++++++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h | 2 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 +-
> 4 files changed, 35 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> index 0f8b097001e3..6ea73ef6e672 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> @@ -212,7 +212,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, struct amdgpu_job *job,
> amdgpu_ring_emit_pipeline_sync(ring);
>
> if (emit_spm_needed)
> - adev->gfx.rlc.funcs->update_spm_vmid(adev, ring->xcc_id, ring, job->vmid);
> + amdgpu_gfx_rlc_update_spm(adev, ring, job->vmid);
>
> if (emit_gds_needed)
> amdgpu_ring_emit_gds_switch(ring, job->vmid, job->gds_base, diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> index 002fae3c380e..f791e1bcbf17 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> @@ -27,6 +27,37 @@
> #include "amdgpu_gfx.h"
> #include "amdgpu_rlc.h"
>
> +/**
> + * amdgpu_gfx_rlc_update_spm - update RLC SPM VMID
> + *
> + * @adev: amdgpu_device pointer
> + * @ring: ring the VMID got assigned to
> + * @vmid: VMID to program
> + *
> + * RLC SPM counters are used only for GFX and GFX Cache subsystem. Only
> +jobs submitted to
> + * rings in GFX subsystem need to update RLC SPM counters. Derive xcc_id from ring->vm_hub.
> + */
> +void amdgpu_gfx_rlc_update_spm(struct amdgpu_device *adev,
> + struct amdgpu_ring *ring, unsigned int vmid) {
> + int xcc_id, num_xcc;
> +
> + if (!adev->gfx.rlc.funcs->update_spm_vmid || !ring)
> + return;
> +
> + if (!AMDGPU_IS_GFXHUB(ring->vm_hub))
> + return;
> +
> + num_xcc = NUM_XCC(adev->gfx.xcc_mask);
> + for (xcc_id = 0; xcc_id < num_xcc; xcc_id++) {
> + if (AMDGPU_GFXHUB(xcc_id) == ring->vm_hub) {
> + adev->gfx.rlc.funcs->update_spm_vmid(adev, xcc_id, ring,
> + vmid);
> + return;
> + }
> + }
> +}
> +
> /**
> * amdgpu_gfx_rlc_enter_safe_mode - Set RLC into safe mode
> *
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h
> index 959d60c90dcd..1410954da5a6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h
> @@ -370,6 +370,8 @@ struct amdgpu_rlc {
> struct amdgpu_rlcg_reg_access_ctrl reg_access_ctrl[AMDGPU_MAX_RLC_INSTANCES];
> };
>
> +void amdgpu_gfx_rlc_update_spm(struct amdgpu_device *adev,
> + struct amdgpu_ring *ring, unsigned int vmid);
> void amdgpu_gfx_rlc_enter_safe_mode(struct amdgpu_device *adev, int xcc_id); void amdgpu_gfx_rlc_exit_safe_mode(struct amdgpu_device *adev, int xcc_id); int amdgpu_gfx_rlc_init_sr(struct amdgpu_device *adev, u32 dws); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index 29a66e39f3d6..dc8f85176b8b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -865,7 +865,7 @@ void amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
> amdgpu_gmc_emit_pasid_mapping(ring, job->vmid, job->pasid);
>
> if (spm_update_needed)
> - adev->gfx.rlc.funcs->update_spm_vmid(adev, ring->xcc_id, ring, job->vmid);
> + amdgpu_gfx_rlc_update_spm(adev, ring, job->vmid);
>
> if (gds_switch_needed)
> amdgpu_ring_emit_gds_switch(ring, job->vmid, job->gds_base,
> --
> 2.49.0
next prev parent reply other threads:[~2026-10-12 15:28 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-25 9:37 [PATCH] drm/amdgpu: Derive RLC SPM xcc from GFXHUB Lijo Lazar
2026-09-25 10:34 ` Tvrtko Ursulin
2026-09-25 10:49 ` Lazar, Lijo
2026-09-28 13:49 ` Lazar, Lijo
2026-10-12 15:28 ` Lazar, Lijo [this message]
2026-10-13 7:37 ` Christian König
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