Re: [PATCH v2 0/2] x86/PCI: SiS PIRQ router updates

[Nikolai Zhubr <zhubr.2@gmail.com>]

Hello Maciej,

Apparently, my previous replies (of 11-sep-2021 to 16-sep-2021) with 
some observations somehow went to spam box or whatever. I was going to 
retry but got too busy with unrelated stuff at that time. I can re-send 
them if necessary.

Anyway. Yes, your patch is very usefull. I've tested it quite thoroughly 
back then, including sharing IRQs for 2 unrelated PCI devices etc. I 
have it always automatically applied in my private trees since then.

One peculiarity with my specific board is that I had to also patch ROM 
BIOS because it included some non-standard $IRT table instead of $PIR 
table. With that in place, it now Just Works.

Thank you again for your effort,

Regards,

Nikolai


03.01.2022 2:24, Maciej W. Rozycki:
> Hi,
>
>   Reposting as this has gone nowhere.  Regenerated for line changes and
> with Nikolai's Tested-by annotation for 2/2, which now have been verified
> in combination with generic PIRQ router updates posted separately (there's
> no ordering dependency between the two patch series).
>
>   Nikolai has observed the trigger mode not being fixed up once it has been
> incorrectly set by the BIOS for PCI devices, causing all kinds of usual
> issues.  As it turns out we don't have a PIRQ router defined for the
> SiS85C497 southbridge, which Nikolai's system uses, and which is different
> from the SiS85C503 southbridge we have support for.
>
>   As we use the generic `sis' infix (capitalised or not) for the SiS85C503
> southbridge I have prepared this small patch series to first make the
> existing SiS program entities use a more specific `sis503' infix, and then
> provide a suitable PIRQ router for the SiS85C497 device.
>
>   See individual change descriptions for further details.
>
>   Please apply.
>
>    Maciej
>