From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9C738C433F5 for ; Thu, 20 Jan 2022 12:09:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:In-Reply-To:References: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=TZLyGAd1lj3LkAokQB1tVzvT/g0qgiK3zIxpSavTuv8=; b=irERi6qfs92ypw od1sT3aHSheCmRkoEBfK0rszaibOEIR2ljvDq8eFMk3Czt89s7LHijO8WS9dXlfQ257Gq5FEIsOBd BNG+NzaqiW6e/gZCJv5DqN5bFh8J3zlIqYknESFqGOZPHlv+oWjukkrRwpCBIB4rhbzvNz/l07ZFU eleX1KG36aMdbqXqmZZrWEMLnuq0zfCzDqLPF2ZQTwlf5PKHICKCvRj930e+eDv6CXDwTUTW8Fm2Q j5srsgs+O7Br6CpCE4gyaN6TBvjuG4TRYRmuQoqsfzC7W9+qM2ZXl9R2ckz9FFbzBm6ehdsuMNxPn jdd6qMc99ZTjIWDkM00g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nAWEZ-00BDA8-Ji; Thu, 20 Jan 2022 12:08:07 +0000 Received: from mx4.securetransport.de ([178.254.6.145]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nAWEU-00BD9O-GM for linux-arm-kernel@lists.infradead.org; Thu, 20 Jan 2022 12:08:05 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dh-electronics.com; s=dhelectronicscom; t=1642680449; bh=xlwi6QEytDKwgKpZzwH/CdQl5VkwC/O1dAz1bAahF1U=; h=From:To:CC:Subject:Date:References:In-Reply-To:From; b=jmsopXAoBHgDJtHL7JOMTWJj3qccxiTUZT6KR8+zAZ62Wqb0lXpVVIw20rPtWpgTE sdD2u6troG0SJncWxDLu2utFq3IYo8HtWcxvbAn1qEORxLasKm3Ym5h+S+lJZBgIze ZLdqnrkX3uCD8KfDp4gO/euofS5nwuLGrCkMl1TqlY298cNxLNDwcOhRbtfzPwxJsR nW0r+W+A714gH75OZgHLWJwID4MrKcKE7dM3a2lN+Bec+xHbRlkqKtRWz+MeMv5VAT 6Zvmdx6pQCM603lpV54NW5w3ph0kj5vkqqiibsX1lZKAWSHkDuzkfi8Ih0xl5U5cSK GFLLs/G7uHWhg== X-secureTransport-forwarded: yes From: Johann Neuhauser Complaints-To: abuse@cubewerk.de To: "Marek MV. Vasut" , "linux-arm-kernel@lists.infradead.org" CC: "Marek MV. Vasut" , Alexandre Torgue , Christophe Roullier , Gabriel Fernandez , Patrice Chotard , Patrick Delaunay , Stephen Boyd , "linux-clk@vger.kernel.org" , "linux-stm32@st-md-mailman.stormreply.com" Subject: RE: [PATCH 1/5] clk: stm32mp1: Split ETHCK_K into separate MUX and GATE clock Thread-Topic: [PATCH 1/5] clk: stm32mp1: Split ETHCK_K into separate MUX and GATE clock Thread-Index: AQHYDKowNA7EPo3h4k2gR/zmZEXweqxqTbYw Date: Thu, 20 Jan 2022 12:07:09 +0000 Message-ID: <61a45bcf348144beaa9e6678f1ed0fa1@dh-electronics.com> References: <20220118202958.1840431-1-marex@denx.de> In-Reply-To: <20220118202958.1840431-1-marex@denx.de> Accept-Language: de-DE, en-US Content-Language: de-DE X-MS-Has-Attach: X-MS-TNEF-Correlator: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220120_040803_008161_1842EF2C X-CRM114-Status: GOOD ( 19.44 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org > From: Marek Vasut [mailto:marex@denx.de] > Sent: Tuesday, January 18, 2022 9:30 PM > > The ETHCK_K are modeled as composite clock of MUX and GATE, however per > STM32MP1 Reference Manual RM0436 Rev 3, Page 574, Figure 83. Peripheral > clock distribution for Ethernet, ETHPTPDIV divider is attached past the > ETHCK_K mux, and ETH_CLK/eth_clk_fb clock are output past ETHCKEN gate. > Therefore, in case ETH_CLK/eth_clk_fb are not in use AND PTP clock are > in use, ETHCKEN gate can be turned off. Current driver does not permit > that, fix it. > > This patch converts ETHCK_K from composite clock into a ETHCKEN gate, > ETHPTP_K from composite clock into ETHPTPDIV divider, and adds another > NO_ID clock "ck_ker_eth" which models the ETHSRC mux and is parent clock > to both ETHCK_K and ETHPTP_K. Therefore, all references to ETHCK_K and > ETHPTP_K remain functional as before. > > [1] STM32MP1 Reference Manual RM0436 Rev 3, Page 574, > Figure 83. Peripheral clock distribution for Ethernet > https://www.st.com/resource/en/reference_manual/dm00327659-stm32mp157-advanced-armbased-32bit-mpus-stmicroelectronics.pdf > > Signed-off-by: Marek Vasut > Cc: Alexandre Torgue > Cc: Christophe Roullier > Cc: Gabriel Fernandez > Cc: Patrice Chotard > Cc: Patrick Delaunay > Cc: Stephen Boyd > Cc: linux-clk@vger.kernel.org > Cc: linux-stm32@st-md-mailman.stormreply.com > To: linux-arm-kernel@lists.infradead.org > --- > drivers/clk/clk-stm32mp1.c | 10 +++++++--- > 1 file changed, 7 insertions(+), 3 deletions(-) > > diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/clk-stm32mp1.c > index 863274aa50e38..23a34ab459a3b 100644 > --- a/drivers/clk/clk-stm32mp1.c > +++ b/drivers/clk/clk-stm32mp1.c > @@ -2008,7 +2008,6 @@ static const struct clock_config stm32mp1_clock_cfg[] = { > KCLK(DSI_K, "dsi_k", dsi_src, 0, G_DSI, M_DSI), > KCLK(ADFSDM_K, "adfsdm_k", sai_src, 0, G_ADFSDM, M_SAI1), > KCLK(USBO_K, "usbo_k", usbo_src, 0, G_USBO, M_USBO), > - KCLK(ETHCK_K, "ethck_k", eth_src, 0, G_ETHCK, M_ETHCK), > > /* Particulary Kernel Clocks (no mux or no gate) */ > MGATE_MP1(DFSDM_K, "dfsdm_k", "ck_mcu", 0, G_DFSDM), > @@ -2017,11 +2016,16 @@ static const struct clock_config stm32mp1_clock_cfg[] = { > MGATE_MP1(GPU_K, "gpu_k", "pll2_q", 0, G_GPU), > MGATE_MP1(DAC12_K, "dac12_k", "ck_lsi", 0, G_DAC12), > > - COMPOSITE(ETHPTP_K, "ethptp_k", eth_src, CLK_OPS_PARENT_ENABLE | > + COMPOSITE(NO_ID, "ck_ker_eth", eth_src, CLK_OPS_PARENT_ENABLE | > CLK_SET_RATE_NO_REPARENT, > _NO_GATE, > _MMUX(M_ETHCK), > - _DIV(RCC_ETHCKSELR, 4, 4, 0, NULL)), > + _NO_DIV), > + > + MGATE_MP1(ETHCK_K, "ethck_k", "ck_ker_eth", 0, G_ETHCK), > + > + DIV(ETHPTP_K, "ethptp_k", "ck_ker_eth", CLK_OPS_PARENT_ENABLE | > + CLK_SET_RATE_NO_REPARENT, RCC_ETHCKSELR, 4, 4, 0), > > /* RTC clock */ > COMPOSITE(RTC, "ck_rtc", rtc_src, CLK_OPS_PARENT_ENABLE, > -- > 2.34.1 Tested-by: Johann Neuhauser _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel