Re: [PATCH 2/2] target/hexagon: gdbstub - Add sys reg support

["Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>]

On 30/9/26 19:51, Brian Cain wrote:
> Add support for the system and guest registers to the gdbstub.
> 
> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
> ---
>   target/hexagon/cpu.h      |  1 +
>   target/hexagon/internal.h |  4 +++
>   target/hexagon/cpu.c      | 14 ++++++++
>   target/hexagon/gdbstub.c  | 68 +++++++++++++++++++++++++++++++++++++++
>   4 files changed, 87 insertions(+)


> +void hexagon_greg_write(CPUHexagonState *env, uint32_t reg, uint32_t val)
> +{
> +    if (reg <= HEX_GREG_G3) {
> +        env->greg[reg] = val;
> +        return;
> +    }
> +    qemu_log_mask(LOG_UNIMP, "writing greg %" PRIu32
> +            " not yet supported.\n", reg);

Not sure void/LOG_UNIMP is safe, LOG_UNIMP is only enabled with
'-d unimp' and goes on stderr, ...

(nit misaligned style)

> +}


> +int hexagon_sys_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
> +{
> +    CPUHexagonState *env = cpu_env(cs);
> +    HexagonCPU *cpu = env_archcpu(env);
> +    BQL_LOCK_GUARD();
> +
> +    if (n < NUM_SREGS) {
> +        uint32_t val = ldl_le_p(mem_buf);
> +        if (n == HEX_SREG_SSR) {
> +            uint32_t old = env->t_sreg[HEX_SREG_SSR];
> +            env->t_sreg[HEX_SREG_SSR] = val;
> +            hexagon_modify_ssr(env, val, old);
> +        } else if (n < HEX_SREG_GLB_START) {
> +            env->t_sreg[n] = val;
> +        } else if (cpu->globalregs) {
> +            hexagon_globalreg_write(cpu->globalregs, n, val, env->threadId);
> +        }
> +        return sizeof(uint32_t);
> +    }
> +    n -= NUM_SREGS;
> +
> +    if (n < NUM_GREGS) {
> +        hexagon_greg_write(env, n, ldl_le_p(mem_buf));
> +        return sizeof(uint32_t);

... and here we tell the user the register was correctly written.

> +    }
> +    n -= NUM_GREGS;
> +
> +    g_assert_not_reached();
> +}