Re[2]: MPC5200 + LocalPlus Bus + memcpy

[Andrey Volkov <avolkov@varma-el.com>]

Hello, Sascha.

On Friday, April 7, 2006, Sascha Hauer wrote:

> Hello,

> On Thu, Apr 06, 2006 at 06:21:44PM +0400, Andrey Volkov wrote:
>> Hello, Sascha.
>> 
>> On Wednesday, April 5, 2006, Sascha Hauer wrote:
>> 
>> > Hi all,
>> 
>> > I try to use jffs2 on a flash device connected to the mpc5200
>> > LocalPlus Bus. This bus does not allow misaligned accesses.
>> > The jffs2 code uses memcpy to copy from a word aligned address to an
>> > odd address. The ppc memcpy implementation first copies three bytes to get
>> > the target address word aligned, but then the source address is on an
>> > odd address. The following word accesses on this unaligned address fail
>> > badly.
>> Invalid crc on 'name' field ;)?

> Yes, exactly ;)
:)
>> 
>> > I have fixed my problem by modifying the physmap mtd driver, but some
>> > day someone wants to connect SRAM to the LocalPlus Bus and I guess he
>> > will expect memcpy to work.
>> Heh, I'll have same problem. Patch (dirty hack)
>> attached (vs head of vanilla 2.6. tree)
>> 
>> > (BTW the arm implementation of memcpy seems to work around this problem)
>> Wrong, memcpy to/from SDRAM _may_ be unaligned, only
>> memcpy_fromio/memcpy_toio _must_ be aligned to even addresses.

> Hm, then a proper fix would be:
> - implement an optimized version of memcpy_fromio/memcpy_toio, this
>   could be a version of memcpy which only alignes on the io side
Yes.

> - use memcpy_fromio/memcpy_toio in jffs2 code
They already use it (from jffs2_read/write), only scan.c doesn't
calling this fns.

> Do I see this right?
Yes.

> Is SRAM considered io? I know (Arm-)Boards which do not have SDRAM, they
> run completely from SRAM.
Only LBP demand alignment, SDRAM/DDR and internal SRAM didn't.



-- 
Regards,
Andrey Volkov