From: Thomas Monjalon <thomas@monjalon.net>
To: Drocula <quzeyao@gmail.com>,
anatoly.burakov@intel.com, stephen@networkplumber.org,
alejandro.lucero@netronome.com
Cc: dev@dpdk.org
Subject: Re: [PATCH v2] bus/pci: check if 5-level paging is enabled when testing IOMMU address width
Date: Sun, 28 Oct 2018 19:22:58 +0100 [thread overview]
Message-ID: <6478965.gRfG50N2Qn@xps> (raw)
In-Reply-To: <1534165068-23161-1-git-send-email-quzeyao@gmail.com>
Any review please?
It may require some change after Alejandro patches.
13/08/2018 14:57, Drocula:
> The kernel version 4.14 released with the support of 5-level paging.
> When PML5 enabled, user-space virtual addresses uses up to 56 bits.
> see kernel's Documentation/x86/x86_64/mm.txt.
>
> Signed-off-by: ZY Qiu <quzeyao@gmail.com>
You used a different name in another patch.
Which one should be used?
next prev parent reply other threads:[~2018-10-28 18:22 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-05 18:41 [PATCH] bus/pci: check if 5-level paging is enabled when testing IOMMU address width Drocula
2018-08-09 10:49 ` Burakov, Anatoly
2018-08-10 7:51 ` Drocula
2018-08-09 17:03 ` Stephen Hemminger
2018-08-10 8:35 ` Drocula
2018-08-10 9:18 ` Burakov, Anatoly
2018-08-13 12:57 ` [PATCH v2] " Drocula
2018-10-28 18:22 ` Thomas Monjalon [this message]
2023-06-09 16:31 ` [PATCH] " Stephen Hemminger
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