From: "Huang, Honglei" <honghuan@amd.com>
To: "Christian König" <christian.koenig@amd.com>
Cc: "Xiaogang Chen" <xiaogang.chen@amd.com>,
"Oak Zeng" <Oak.Zeng@amd.com>,
"Jenny Liu" <Jenny-Jing.Liu@amd.com>,
"Zhu Lingshan" <lingshan.zhu@amd.com>,
"Honglei Huang" <honglei1.huang@amd.com>,
"Junhua Shen" <Junhua.Shen@amd.com>, "Yiru Ma" <yiru.ma@amd.com>,
"Huang Rui" <ray.huang@amd.com>,
"Philip Yang" <Philip.Yang@amd.com>,
"Alex Deucher" <alexander.deucher@amd.com>,
"Felix Kuehling" <felix.kuehling@amd.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Matthew Brost" <matthew.brost@intel.com>,
"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
"Danilo Krummrich" <dakr@kernel.org>,
"Alice Ryhl" <aliceryhl@google.com>,
amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
"Timur Kristóf" <timur.kristof@gmail.com>
Subject: Re: [PATCH v10 02/22] drm/amdgpu: add SVM core header and VM integration
Date: Tue, 10 Nov 2026 10:51:53 +0800 [thread overview]
Message-ID: <64f0db19-7ea6-4974-afa4-797b765a581f@amd.com> (raw)
In-Reply-To: <ee28d94b-ab11-4625-9c01-435491548f9d@amd.com>
On 11/9/2026 8:33 PM, Christian König wrote:
> On 10/21/26 04:58, Huang Rui wrote:
>> From: Honglei Huang <honghuan@amd.com>
>>
>> Add amdgpu_svm.h with SVM data structures and public API:
>> - enum amdgpu_svm_xnack_mode: OFF, ON and DEFAULT mode
>> - struct amdgpu_svm: core context with drm_gpusvm, kref lifecycle,
>> attribute tree, rw_semaphore, GC workqueue, xnack state.
>> - struct amdgpu_svm_gc: garbage collector with workqueue and work_struct
>> - Kmem cache helpers: AMDGPU_SVM_KMEM_CACHE_CREATE/DESTROY
>> - Locking helpers: amdgpu_svm_lock/unlock/assert_locked
>> - Public API declarations (including clean_queue, sync_work)
>>
>> Suggested-by: Christian König <christian.koenig@amd.com>
>> Suggested-by: Huang Rui <ray.huang@amd.com>
>> Signed-off-by: Honglei Huang <honghuan@amd.com>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_svm.h | 195 ++++++++++++++++++++++++
>> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 4 +
>> 2 files changed, 199 insertions(+)
>> create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_svm.h
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_svm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_svm.h
>> new file mode 100644
>> index 0000000000000..72f954d2df39e
>> --- /dev/null
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_svm.h
>> @@ -0,0 +1,195 @@
>> +/* SPDX-License-Identifier: GPL-2.0 OR MIT */
>> +/*
>> + * Copyright 2026 Advanced Micro Devices, Inc.
>> + *
>> + * Permission is hereby granted, free of charge, to any person obtaining a
>> + * copy of this software and associated documentation files (the "Software"),
>> + * to deal in the Software without restriction, including without limitation
>> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
>> + * and/or sell copies of the Software, and to permit persons to whom the
>> + * Software is furnished to do so, subject to the following conditions:
>> + *
>> + * The above copyright notice and this permission notice shall be included in
>> + * all copies or substantial portions of the Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
>> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
>> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
>> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
>> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
>> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> + * OTHER DEALINGS IN THE SOFTWARE.
>> + *
>> + */
>> +
>> +#ifndef __AMDGPU_SVM_H__
>> +#define __AMDGPU_SVM_H__
>> +
>> +#include <drm/amdgpu_drm.h>
>> +#include <drm/drm_gpusvm.h>
>> +#include <linux/atomic.h>
>> +#include <linux/kref.h>
>> +#include <linux/list.h>
>> +#include <linux/printk.h>
>> +#include <linux/rwsem.h>
>> +#include <linux/slab.h>
>> +#include <linux/spinlock.h>
>> +#include <linux/types.h>
>> +#include <linux/workqueue.h>
>> +
>> +struct amdgpu_device;
>> +struct amdgpu_vm;
>> +struct amdgpu_svm_attr_tree;
>> +struct amdgpu_svm_attrs;
>> +struct drm_device;
>> +struct drm_file;
>> +
>> +enum amdgpu_svm_xnack_mode {
>> + AMDGPU_SVM_XNACK_OFF,
>> + AMDGPU_SVM_XNACK_ON,
>> + AMDGPU_SVM_XNACK_DEFAULT,
>> +};
>> +
>> +#define amdgpu_svm_assert_in_notifier(svm__) \
>> + lockdep_assert_held_write(&(svm__)->gpusvm.notifier_lock)
>> +
>> +/**
>> + * struct amdgpu_svm_gc - SVM range garbage collector used for unmapping
>> + * SVM ranges in response to mmu_notifier events.
>> + * @wq: Workqueue where @work runs on.
>> + * @list: Ranges list in garbage collector. Protected by amdgpu_svm.work_lock.
>> + * @work: Drains @list under amdgpu_svm.svm_lock.
>> + */
>> +struct amdgpu_svm_gc {
>> + struct workqueue_struct *wq;
>> + struct list_head list;
>> + struct work_struct work;
>> +};
>> +
>> +/**
>> + * struct amdgpu_svm - shared virtual memory context
>> + * @gpusvm: Embedded drm_gpusvm base, manages the range/notifier trees.
>> + * @refcount: Reference count guarding the lifetime of this instance.
>> + * @adev: The amdgpu device this SVM context belongs to.
>> + * @vm: Back pointer to the owning amdgpu_vm.
>> + * @attr_tree: Interval tree of SVM attributes.
>> + * @svm_lock: The driver_svm_lock described in the GPU SVM locking section.
>> + * registered by drm_gpusvm_driver_set_lock().
>> + * @work_lock: Protects the deferred work queues such as @gc.list.
>> + * @gc: garbage collector for ranges queued for destruction.
>> + * @exiting: Set once when the context starts tearing down.
>> + * @checkpoint_ts: IH ring timestamp captured on unmap, used to drop stale
>> + * faults.
>> + * @default_granularity: Default range granularity.
>> + * @xnack_enabled: Whether retry (XNACK) faults are enabled.
>> + * @invalidate_ranges: Callback of the MMU notifier invalidate event.
>> + */
>> +struct amdgpu_svm {
>> + struct drm_gpusvm gpusvm;
>> + struct kref refcount;
>> + struct amdgpu_device *adev;
>> + struct amdgpu_vm *vm;
>> + struct amdgpu_svm_attr_tree *attr_tree;
>> + struct rw_semaphore svm_lock;
>> + spinlock_t work_lock;
>> + struct amdgpu_svm_gc gc;
>> + atomic_t exiting;
>
>> + uint64_t checkpoint_ts;
>
> By now we have figured out that TS in faults are not useable for fault handling.
>
> Background is that they reset from time to time because of GFXOFF and may vary depending on the engine who sends the fault.
>
> Adding Timur from Valve on CC, he send out a patch to completely remove the existing timestamp handling from the fault filter.
>
> We need to come up with a different approach here.
Got it, is that valid for you to remove the checkpoint_ts check in this
series?
I check the series of Timur, didn't find speific new approach, can you
please help to point out the new approach.
>
>> + u8 default_granularity;
>
>> + bool xnack_enabled;
>
> It's probably ok to have that here for now, but that will become a VM property in the future I think.
Will try to move this into VM.
>
>> + void (*invalidate_ranges)(struct amdgpu_svm *svm,
>> + struct drm_gpusvm_notifier *notifier,
>> + const struct mmu_notifier_range *mmu_range,
>> + struct drm_gpusvm_range *first,
>> + uint64_t adj_start, uint64_t adj_end);
>
> That looks a bit questionable. Why is that a pointer inside the amdgpu_svm structure?
>
> Apart from those questions that looks rather reasonable.
The invalidate callback is for both xnack-on and xnack-off mode, the
logic of those two modes are different. Differnet callback is set in
different mode.
How about remove this call back then put two modes logic in a fixed
function?
Regards,
Honglei
>
> Regards,
> Christian.
>
>> +};
>> +
>> +static inline struct amdgpu_svm *to_amdgpu_svm(struct drm_gpusvm *gpusvm)
>> +{
>> + return container_of(gpusvm, struct amdgpu_svm, gpusvm);
>> +}
>> +
>> +/*
>> + * Helpers for amdgpu_svm.svm_lock, the driver_svm_lock registered with GPU SVM.
>> + * Hold it in write mode around structural GPU SVM updates, including
>> + * drm_gpusvm_range_find_or_insert() and drm_gpusvm_range_remove().
>> + */
>> +static inline void amdgpu_svm_lock(struct amdgpu_svm *svm)
>> +{
>> + down_write(&svm->svm_lock);
>> +}
>> +
>> +static inline void amdgpu_svm_unlock(struct amdgpu_svm *svm)
>> +{
>> + up_write(&svm->svm_lock);
>> +}
>> +
>> +static inline void amdgpu_svm_assert_locked(struct amdgpu_svm *svm)
>> +{
>> + lockdep_assert_held_write(&svm->svm_lock);
>> +}
>> +
>> +#if IS_ENABLED(CONFIG_DRM_AMDGPU_SVM)
>> +void amdgpu_svm_flush_tlb(struct amdgpu_svm *svm);
>> +
>> +int amdgpu_svm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm);
>> +void amdgpu_svm_close(struct amdgpu_vm *vm);
>> +void amdgpu_svm_fini(struct amdgpu_vm *vm);
>> +
>> +void amdgpu_svm_put(struct amdgpu_svm *svm);
>> +struct amdgpu_svm *amdgpu_svm_lookup_by_pasid(struct amdgpu_device *adev,
>> + uint32_t pasid);
>> +int amdgpu_svm_handle_fault(struct amdgpu_device *adev, uint32_t pasid,
>> + uint64_t fault_page, uint64_t ts,
>> + bool write_fault);
>> +bool amdgpu_svm_is_enabled(struct amdgpu_vm *vm);
>> +
>> +int amdgpu_gem_svm_ioctl(struct drm_device *dev, void *data,
>> + struct drm_file *filp);
>> +void amdgpu_svm_clean_queue(struct amdgpu_svm *svm,
>> + struct list_head *work_list);
>> +void amdgpu_svm_sync_work(struct amdgpu_svm *svm);
>> +int amdgpu_svm_garbage_collector(struct amdgpu_svm *svm);
>> +int amdgpu_svm_apply_attr_change(struct amdgpu_svm *svm,
>> + const struct amdgpu_svm_attrs *old_attrs,
>> + const struct amdgpu_svm_attrs *new_attrs,
>> + unsigned long start_page,
>> + unsigned long last_page);
>> +bool amdgpu_svm_devmem_possible(struct amdgpu_svm *svm);
>> +#else
>> +static inline int amdgpu_svm_init(struct amdgpu_device *adev,
>> + struct amdgpu_vm *vm)
>> +{
>> + return 0;
>> +}
>> +
>> +static inline void amdgpu_svm_close(struct amdgpu_vm *vm)
>> +{
>> +}
>> +
>> +static inline void amdgpu_svm_fini(struct amdgpu_vm *vm)
>> +{
>> +}
>> +
>> +static inline int amdgpu_svm_handle_fault(struct amdgpu_device *adev,
>> + uint32_t pasid,
>> + uint64_t fault_page,
>> + uint64_t ts,
>> + bool write_fault)
>> +{
>> + return -EOPNOTSUPP;
>> +}
>> +
>> +static inline bool amdgpu_svm_is_enabled(struct amdgpu_vm *vm)
>> +{
>> + return false;
>> +}
>> +
>> +static inline int amdgpu_gem_svm_ioctl(struct drm_device *dev, void *data,
>> + struct drm_file *filp)
>> +{
>> + return -EOPNOTSUPP;
>> +}
>> +#endif /* CONFIG_DRM_AMDGPU_SVM */
>> +
>> +#endif /* __AMDGPU_SVM_H__ */
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
>> index 9b07df5a2b816..b435e393be154 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
>> @@ -43,6 +43,7 @@ struct amdgpu_bo_va;
>> struct amdgpu_job;
>> struct amdgpu_bo_list_entry;
>> struct amdgpu_bo_vm;
>> +struct amdgpu_svm;
>>
>> /*
>> * GPUVM handling
>> @@ -381,6 +382,9 @@ struct amdgpu_vm {
>>
>> /* cached fault info */
>> struct amdgpu_vm_fault_info fault_info;
>> +
>> + /* SVM experimental implementation */
>> + struct amdgpu_svm *svm;
>> };
>>
>> struct amdgpu_vm_manager {
>
next prev parent reply other threads:[~2026-11-10 2:52 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-21 2:58 [PATCH v10 00/22] drm/amdgpu: AMDGPU SVM support based on DRM (Phase 1: single GPU, XNACK on) Huang Rui
2026-10-21 2:58 ` [PATCH v10 01/22] drm/amdgpu: add SVM ioctl UAPI definitions Huang Rui
2026-11-09 12:26 ` Christian König
2026-10-21 2:58 ` [PATCH v10 02/22] drm/amdgpu: add SVM core header and VM integration Huang Rui
2026-11-09 12:33 ` Christian König
2026-11-10 2:51 ` Huang, Honglei [this message]
2026-11-10 14:46 ` Kuehling, Felix
2026-10-21 2:58 ` [PATCH v10 03/22] drm/amdgpu: implement SVM attribute tree and helper functions Huang Rui
2026-11-09 12:41 ` Christian König
2026-11-09 16:54 ` Aveline Noir
2026-11-10 2:55 ` Huang, Honglei
2026-10-21 2:58 ` [PATCH v10 04/22] drm/amdgpu: implement SVM attribute set/get/clear operations Huang Rui
2026-11-09 12:52 ` Christian König
2026-11-10 6:23 ` Huang, Honglei
2026-10-21 2:58 ` [PATCH v10 05/22] drm/amdgpu: add SVM range types and work queue interface Huang Rui
2026-11-09 13:48 ` Christian König
2026-11-10 6:44 ` Huang, Honglei
2026-10-21 2:58 ` [PATCH v10 06/22] drm/amdgpu/gmc: add get_svm_pte_flags callback Huang Rui
2026-11-09 13:52 ` Christian König
2026-11-10 6:57 ` Huang, Honglei
2026-11-10 10:01 ` Christian König
2026-11-10 10:24 ` Huang, Honglei
2026-10-21 2:58 ` [PATCH v10 07/22] drm/amdgpu: implement SVM range GPU mapping core Huang Rui
2026-11-09 13:55 ` Christian König
2026-11-10 7:01 ` Huang, Honglei
2026-10-21 2:58 ` [PATCH v10 08/22] drm/amdgpu: implement SVM range notifier and GC helpers Huang Rui
2026-11-09 17:12 ` Aveline Noir
2026-11-10 8:30 ` Huang, Honglei
2026-10-21 2:58 ` [PATCH v10 09/22] drm/amdgpu: add SVM notifier invalidate callback and checkpoint Huang Rui
2026-10-21 2:58 ` [PATCH v10 10/22] drm/amdgpu: implement SVM initialization and lifecycle Huang Rui
2026-11-09 16:59 ` Aveline Noir
2026-11-10 8:48 ` Huang, Honglei
2026-10-21 2:58 ` [PATCH v10 11/22] drm/amdgpu: add SVM ioctl entry and fault handler module Huang Rui
2026-11-09 16:47 ` Aveline Noir
2026-11-10 8:59 ` Huang, Honglei
2026-10-21 2:58 ` [PATCH v10 12/22] drm/amdgpu: integrate SVM into build system and VM fault path Huang Rui
2026-10-21 2:58 ` [PATCH v10 13/22] drm/amdgpu: make VM eviction lock read/write to match notifier lock Huang Rui
2026-10-21 2:58 ` [PATCH v10 14/22] drm/amdgpu: recheck range validity after page table allocation Huang Rui
2026-10-21 2:58 ` [PATCH v10 15/22] drm/amdgpu: use drm_gpusvm notifier lock for VM eviction Huang Rui
2026-10-21 2:58 ` [PATCH v10 16/22] drm/pagemap: fix page undercount for compound src entries Huang Rui
2026-10-21 2:58 ` [PATCH v10 17/22] drm/amdgpu: add VRAM migration infrastructure for drm_pagemap Huang Rui
2026-10-21 2:58 ` [PATCH v10 18/22] drm/amdgpu: implement drm_pagemap SDMA migration callbacks Huang Rui
2026-10-21 2:58 ` [PATCH v10 19/22] drm/amdgpu: implement synchronous TTM eviction for SVM BOs Huang Rui
2026-10-21 2:58 ` [PATCH v10 20/22] drm/amdgpu: hook up ZONE_DEVICE registration in device init and reset Huang Rui
2026-10-21 2:59 ` [PATCH v10 21/22] drm/amdgpu: add SVM range migration helpers for drm_pagemap Huang Rui
2026-10-21 2:59 ` [PATCH v10 22/22] drm/amdgpu: integrate VRAM migration into SVM fault and prefetch paths Huang Rui
2026-11-11 15:08 ` [PATCH v10 00/22] drm/amdgpu: AMDGPU SVM support based on DRM (Phase 1: single GPU, XNACK on) Huang, Honglei
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