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envelope-from=kowal@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, HTML_MESSAGE=0.001, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This is a multi-part message in MIME format. --------------1yMmSQm8nwqg953ZcckMWKiu Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Reviewed-by: Michael Kowal Thanks, MAK On 12/16/2025 9:13 AM, Caleb Schlossin wrote: > - Add support for needed PnvSpi structure variables > > Signed-off-by: Caleb Schlossin > --- > hw/ssi/pnv_spi.c | 27 +++++++++++++++++++++++++++ > 1 file changed, 27 insertions(+) > > diff --git a/hw/ssi/pnv_spi.c b/hw/ssi/pnv_spi.c > index f40e8836b9..389a2cca6b 100644 > --- a/hw/ssi/pnv_spi.c > +++ b/hw/ssi/pnv_spi.c > @@ -13,6 +13,7 @@ > #include "hw/ssi/pnv_spi.h" > #include "hw/ssi/pnv_spi_regs.h" > #include "hw/ssi/ssi.h" > +#include "migration/vmstate.h" > #include > #include "hw/irq.h" > #include "trace.h" > @@ -1199,6 +1200,31 @@ static int pnv_spi_dt_xscom(PnvXScomInterface *dev, void *fdt, > return 0; > } > > +static const VMStateDescription pnv_spi_vmstate = { > + .name = TYPE_PNV_SPI, > + .version_id = 1, > + .fields = (const VMStateField[]) { > + VMSTATE_UINT8(fail_count, PnvSpi), > + VMSTATE_UINT8(transfer_len, PnvSpi), > + VMSTATE_UINT8(responder_select, PnvSpi), > + VMSTATE_BOOL(shift_n1_done, PnvSpi), > + VMSTATE_UINT8(loop_counter_1, PnvSpi), > + VMSTATE_UINT8(loop_counter_2, PnvSpi), > + VMSTATE_UINT8(N1_bits, PnvSpi), > + VMSTATE_UINT8(N2_bits, PnvSpi), > + VMSTATE_UINT8(N1_bytes, PnvSpi), > + VMSTATE_UINT8(N2_bytes, PnvSpi), > + VMSTATE_UINT8(N1_tx, PnvSpi), > + VMSTATE_UINT8(N2_tx, PnvSpi), > + VMSTATE_UINT8(N1_rx, PnvSpi), > + VMSTATE_UINT8(N2_rx, PnvSpi), > + VMSTATE_UINT64_ARRAY(regs, PnvSpi, PNV_SPI_REGS), > + VMSTATE_UINT8_ARRAY(seq_op, PnvSpi, PNV_SPI_REG_SIZE), > + VMSTATE_UINT64(status, PnvSpi), > + VMSTATE_END_OF_LIST(), > + }, > +}; > + > static void pnv_spi_class_init(ObjectClass *klass, const void *data) > { > DeviceClass *dc = DEVICE_CLASS(klass); > @@ -1209,6 +1235,7 @@ static void pnv_spi_class_init(ObjectClass *klass, const void *data) > dc->desc = "PowerNV SPI"; > dc->realize = pnv_spi_realize; > device_class_set_legacy_reset(dc, do_reset); > + dc->vmsd = &pnv_spi_vmstate; > device_class_set_props(dc, pnv_spi_properties); > } > --------------1yMmSQm8nwqg953ZcckMWKiu Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 7bit 

Reviewed-by: Michael Kowal <kowal@linux.ibm.com>

Thanks, MAK


On 12/16/2025 9:13 AM, Caleb Schlossin wrote:
- Add support for needed PnvSpi structure variables

Signed-off-by: Caleb Schlossin <calebs@linux.ibm.com>
---
 hw/ssi/pnv_spi.c | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/hw/ssi/pnv_spi.c b/hw/ssi/pnv_spi.c
index f40e8836b9..389a2cca6b 100644
--- a/hw/ssi/pnv_spi.c
+++ b/hw/ssi/pnv_spi.c
@@ -13,6 +13,7 @@
 #include "hw/ssi/pnv_spi.h"
 #include "hw/ssi/pnv_spi_regs.h"
 #include "hw/ssi/ssi.h"
+#include "migration/vmstate.h"
 #include <libfdt.h>
 #include "hw/irq.h"
 #include "trace.h"
@@ -1199,6 +1200,31 @@ static int pnv_spi_dt_xscom(PnvXScomInterface *dev, void *fdt,
     return 0;
 }
 
+static const VMStateDescription pnv_spi_vmstate = {
+    .name = TYPE_PNV_SPI,
+    .version_id = 1,
+    .fields = (const VMStateField[]) {
+        VMSTATE_UINT8(fail_count, PnvSpi),
+        VMSTATE_UINT8(transfer_len, PnvSpi),
+        VMSTATE_UINT8(responder_select, PnvSpi),
+        VMSTATE_BOOL(shift_n1_done, PnvSpi),
+        VMSTATE_UINT8(loop_counter_1, PnvSpi),
+        VMSTATE_UINT8(loop_counter_2, PnvSpi),
+        VMSTATE_UINT8(N1_bits, PnvSpi),
+        VMSTATE_UINT8(N2_bits, PnvSpi),
+        VMSTATE_UINT8(N1_bytes, PnvSpi),
+        VMSTATE_UINT8(N2_bytes, PnvSpi),
+        VMSTATE_UINT8(N1_tx, PnvSpi),
+        VMSTATE_UINT8(N2_tx, PnvSpi),
+        VMSTATE_UINT8(N1_rx, PnvSpi),
+        VMSTATE_UINT8(N2_rx, PnvSpi),
+        VMSTATE_UINT64_ARRAY(regs, PnvSpi, PNV_SPI_REGS),
+        VMSTATE_UINT8_ARRAY(seq_op, PnvSpi, PNV_SPI_REG_SIZE),
+        VMSTATE_UINT64(status, PnvSpi),
+        VMSTATE_END_OF_LIST(),
+    },
+};
+
 static void pnv_spi_class_init(ObjectClass *klass, const void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
@@ -1209,6 +1235,7 @@ static void pnv_spi_class_init(ObjectClass *klass, const void *data)
     dc->desc = "PowerNV SPI";
     dc->realize = pnv_spi_realize;
     device_class_set_legacy_reset(dc, do_reset);
+    dc->vmsd = &pnv_spi_vmstate;
     device_class_set_props(dc, pnv_spi_properties);
 }
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