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Cc: Jason Cooper , chenxiang , Will Deacon , luojiaxing@huawei.com, linux-kernel@vger.kernel.org, Ming Lei , Zhou Wang , Thomas Gleixner , Robin Murphy , linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: base64 Content-Type: text/plain; charset="utf-8"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org SGkgSm9obiwKCk9uIDIwMjAtMDUtMTQgMTM6MDUsIEpvaG4gR2Fycnkgd3JvdGU6Cj4+IAo+PiAr wqDCoMKgwqDCoMKgIGl0c19pbmNfbHBpX2NvdW50KGQsIGNwdSk7Cj4+ICsKPj4gIMKgwqDCoMKg wqDCoMKgIHJldHVybiBJUlFfU0VUX01BU0tfT0tfRE9ORTsKPj4gIMKgfQo+PiAKPj4gUmVzdWx0 cyBsb29rIG9rOgo+PiAgwqDCoMKgwqBudm1lLnVzZV90aHJlYWRlZF9pbnRlcnJ1cHRzPTHCoMKg wqAgPTAqCj4+IEJlZm9yZcKgwqDCoCA5NTBLIElPUHPCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIDEw MDBLIElPUHMKPj4gQWZ0ZXLCoMKgwqAgMTEwMEsgSU9Qc8KgwqDCoMKgwqDCoMKgwqDCoMKgwqAg MTE1MEsgSU9Qcwo+PiAKPj4gKiBhcyBtZW50aW9uZWQgYmVmb3JlLCB0aGlzIGlzIHF1aXRlIHVu c3RhYmxlIGFuZCBjYXVzZXMgbG9ja3Vwcy4gCj4+IEpGWUksIHRoZXJlIHdhcyBhbiBhdHRlbXB0 IHRvIGZpeCB0aGlzOgo+PiAKPj4gaHR0cHM6Ly9sb3JlLmtlcm5lbC5vcmcvbGludXgtbnZtZS8y MDE5MTIwOTE3NTYyMi4xOTY0LTEta2J1c2NoQGtlcm5lbC5vcmcvCj4+IAo+IAo+IEhpIE1hcmMs Cj4gCj4gSnVzdCB3b25kZXJpbmcgaWYgd2UgY2FuIHRyeSB0byBnZXQgdGhpcyBzZXJpZXMgb3Zl ciB0aGUgbGluZT8KCkFic29sdXRlbHkuIExpZmUgaGFzIGdvdCBpbiB0aGUgd2F5LCBzbyBsZXQg bWUgcGFnZSBpdCBiYWNrIGluLi4uCgo+IFNvIEkgdGVzdGVkIHRoZSBwYXRjaGVzIG9uIHY1Ljct cmM1LCBhbmQgZ2V0IHNpbWlsYXIgcGVyZm9ybWFuY2UKPiBpbXByb3ZlbWVudCB0byBhYm92ZS4K PiAKPiBJIGRpZCBhcHBseSBhIGNvdXBsZSBvZiBwYXRjaGVzLCBiZWxvdywgdG8gcmVtZWR5IHRo ZSBpc3N1ZXMgSQo+IGV4cGVyaWVuY2VkIGZvciBteSBEMDZDUy4KCkNvbW1lbnRzIG9uIHRoYXQg YmVsb3cuCgo+IAo+IFRoYW5rcywKPiBKb2huCj4gCj4gCj4gLS0tLT44Cj4gCj4gCj4gW1BBVENI IDEvMl0gaXJxY2hpcC9naWMtdjMtaXRzOiBEb24ndCBkb3VibGUgYWNjb3VudCBmb3IgdGFyZ2V0 IENQVQo+ICBhc3NpZ25tZW50Cj4gCj4gSW4gaXRzX3NldF9hZmZpbml0eSgpLCB3aGVuIGEgbWFu YWdlZCBpcnEgaXMgYWxyZWFkeSBhc3NpZ25lZCB0byBhIENQVSwKPiB3ZSBtYXkgbmVlZGxlc3Ns eSByZWFzc2lnbiB0aGUgaXJxIHRvIGFub3RoZXIgQ1BVLgo+IAo+IFRoaXMgaXMgYmVjYXVzZSB3 aGVuIHNlbGVjdGluZyB0aGUgdGFyZ2V0IENQVSwgYmVpbmcgdGhlIGxlYXN0IGxvYWRlZAo+IENQ VSBpbiB0aGUgbWFzaywgd2UgYWNjb3VudCBvZiB0aGF0IGlycSBzdGlsbCBiZWluZyBhc3NpZ25l ZCB0byBhIENQVTsKPiB0aGVyZWJ5IHdlIG1heSB1bmZhaXJseSBzZWxlY3QgYW5vdGhlciBDUFUu Cj4gCj4gTW9kaWZ5IHRoaXMgYmVoYXZpb3VyIHRvIHByZS1kZWNyZW1lbnQgdGhlIGN1cnJlbnQg dGFyZ2V0IENQVSBMUEkgY291bnQKPiB3aGVuIGZpbmRpbmcgdGhlIGxlYXN0IGxvYWRlZCBDUFUu Cj4gCj4gQWx0ZXJuYXRpdmVseSB3ZSBtYXkgYmUgYWJsZSB0byBqdXN0IGJhaWwgb3V0IGVhcmx5 IHdoZW4gdGhlIGN1cnJlbnQKPiB0YXJnZXQgQ1BVIGFscmVhZHkgZmFsbHMgd2l0aGluIHRoZSBy ZXF1ZXN0ZWQgbWFzay4KPiAKPiAtLS0KPiAgZHJpdmVycy9pcnFjaGlwL2lycS1naWMtdjMtaXRz LmMgfCA2ICsrKystLQo+ICAxIGZpbGUgY2hhbmdlZCwgNCBpbnNlcnRpb25zKCspLCAyIGRlbGV0 aW9ucygtKQo+IAo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2lycWNoaXAvaXJxLWdpYy12My1pdHMu YyAKPiBiL2RyaXZlcnMvaXJxY2hpcC9pcnEtZ2ljLXYzLWl0cy5jCj4gaW5kZXggNzNmNWMxMi4u MmIxOGZlYiAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL2lycWNoaXAvaXJxLWdpYy12My1pdHMuYwo+ ICsrKyBiL2RyaXZlcnMvaXJxY2hpcC9pcnEtZ2ljLXYzLWl0cy5jCj4gQEAgLTE2MzYsNiArMTYz Niw4IEBAIHN0YXRpYyBpbnQgaXRzX3NldF9hZmZpbml0eShzdHJ1Y3QgaXJxX2RhdGEgKmQsCj4g Y29uc3Qgc3RydWN0IGNwdW1hc2sgKm1hc2tfdmFsLAo+ICAJaWYgKGlycWRfaXNfZm9yd2FyZGVk X3RvX3ZjcHUoZCkpCj4gIAkJcmV0dXJuIC1FSU5WQUw7Cj4gCj4gKwlpdHNfZGVjX2xwaV9jb3Vu dChkLCBpdHNfZGV2LT5ldmVudF9tYXAuY29sX21hcFtpZF0pOwo+ICsKPiAgCWlmICghZm9yY2Up Cj4gIAkJY3B1ID0gaXRzX3NlbGVjdF9jcHUoZCwgbWFza192YWwpOwo+ICAJZWxzZQo+IEBAIC0x NjQ2LDE0ICsxNjQ4LDE0IEBAIHN0YXRpYyBpbnQgaXRzX3NldF9hZmZpbml0eShzdHJ1Y3QgaXJx X2RhdGEKPiAqZCwgY29uc3Qgc3RydWN0IGNwdW1hc2sgKm1hc2tfdmFsLAo+IAo+ICAJLyogZG9u J3Qgc2V0IHRoZSBhZmZpbml0eSB3aGVuIHRoZSB0YXJnZXQgY3B1IGlzIHNhbWUgYXMgY3VycmVu dCBvbmUgCj4gKi8KPiAgCWlmIChjcHUgIT0gaXRzX2Rldi0+ZXZlbnRfbWFwLmNvbF9tYXBbaWRd KSB7Cj4gLQkJaXRzX2luY19scGlfY291bnQoZCwgY3B1KTsKPiAtCQlpdHNfZGVjX2xwaV9jb3Vu dChkLCBpdHNfZGV2LT5ldmVudF9tYXAuY29sX21hcFtpZF0pOwo+ICAJCXRhcmdldF9jb2wgPSAm aXRzX2Rldi0+aXRzLT5jb2xsZWN0aW9uc1tjcHVdOwo+ICAJCWl0c19zZW5kX21vdmkoaXRzX2Rl diwgdGFyZ2V0X2NvbCwgaWQpOwo+ICAJCWl0c19kZXYtPmV2ZW50X21hcC5jb2xfbWFwW2lkXSA9 IGNwdTsKPiAgCQlpcnFfZGF0YV91cGRhdGVfZWZmZWN0aXZlX2FmZmluaXR5KGQsIGNwdW1hc2tf b2YoY3B1KSk7Cj4gIAl9Cj4gCj4gKwlpdHNfaW5jX2xwaV9jb3VudChkLCBjcHUpOwo+ICsKCkkn bSBPSyB3aXRoIHRoYXQgY2hhbmdlLCBhcyBpdCByZW1vdmVzIHVubmVjZXNzYXJ5IGNodXJuLgoK PiAgCXJldHVybiBJUlFfU0VUX01BU0tfT0tfRE9ORTsKPiAgfQo+IAo+IC0tLQo+IAo+IAo+IFtQ QVRDSCAyLzJdIGlycWNoaXAvZ2ljLXYzLWl0czogSGFuZGxlIG5vIG92ZXJsYXAgb2Ygbm9uLW1h bmFnZWQgaXJxCj4gIGFmZmluaXR5IG1hc2sKPiAKPiBJbiBzZWxlY3RpbmcgdGhlIHRhcmdldCBD UFUgZm9yIGEgbm9uLW1hbmFnZWQgaW50ZXJydXB0LCB3ZSBtYXkgc2VsZWN0IAo+IGEKPiB0YXJn ZXQgQ1BVIG91dHNpZGUgdGhlIHJlcXVlc3RlZCBhZmZpbml0eSBtYXNrLgo+IAo+IFRoaXMgaXMg YmVjYXVzZSB0aGVyZSBtYXkgYmUgbm8gb3ZlcmxhcCBvZiB0aGUgSVRTIG5vZGUgbWFzayBhbmQg dGhlCj4gcmVxdWVzdGVkIENQVSBhZmZpbml0eSBtYXNrLiBUaGUgcmVxdWVzdGVkIGFmZmluaXR5 IG1hc2sgbWF5IGJlIGNvbWluZwo+IGZyb20gdXNlcnNwYWNlIG9yIHNvbWUgZHJpdmVycyB3aGlj aCB0cnkgdG8gc2V0IGlycSBhZmZpbml0eSwgc2VlIFswXS4KPiAKPiBJbiB0aGlzIGNhc2UsIGp1 c3QgaWdub3JlIHRoZSBJVFMgbm9kZSBjcHVtYXNrLiBUaGlzIGlzIGEgZGV2aWF0aW9uIAo+IGZy b20KPiB3aGF0IFRob21hcyBkZXNjcmliZWQuIEhhdmluZyBzYWlkIHRoYXQsIEkgYW0gbm90IHN1 cmUgaWYgdGhlCj4gaW50ZXJydXB0IGlzIGV2ZXIgYm91bmQgdG8gYSBub2RlIGZvciB1cy4KPiAK PiBbMF0gCj4gaHR0cHM6Ly9naXQua2VybmVsLm9yZy9wdWIvc2NtL2xpbnV4L2tlcm5lbC9naXQv dG9ydmFsZHMvbGludXguZ2l0L3RyZWUvZHJpdmVycy9wZXJmL2hpc2lsaWNvbi9oaXNpX3VuY29y ZV9wbXUuYyNuNDE3Cj4gCj4gLS0tCj4gIGRyaXZlcnMvaXJxY2hpcC9pcnEtZ2ljLXYzLWl0cy5j IHwgNCAtLS0tCj4gIDEgZmlsZSBjaGFuZ2VkLCA0IGRlbGV0aW9ucygtKQo+IAo+IGRpZmYgLS1n aXQgYS9kcml2ZXJzL2lycWNoaXAvaXJxLWdpYy12My1pdHMuYyAKPiBiL2RyaXZlcnMvaXJxY2hp cC9pcnEtZ2ljLXYzLWl0cy5jCj4gaW5kZXggMmIxOGZlYi4uMTJkNWQ0YjQgMTAwNjQ0Cj4gLS0t IGEvZHJpdmVycy9pcnFjaGlwL2lycS1naWMtdjMtaXRzLmMKPiArKysgYi9kcml2ZXJzL2lycWNo aXAvaXJxLWdpYy12My1pdHMuYwo+IEBAIC0xNTg0LDEwICsxNTg0LDYgQEAgc3RhdGljIGludCBp dHNfc2VsZWN0X2NwdShzdHJ1Y3QgaXJxX2RhdGEgKmQsCj4gIAkJCWNwdW1hc2tfYW5kKHRtcG1h c2ssIGNwdW1hc2tfb2Zfbm9kZShub2RlKSwgYWZmX21hc2spOwo+ICAJCQljcHVtYXNrX2FuZCh0 bXBtYXNrLCB0bXBtYXNrLCBjcHVfb25saW5lX21hc2spOwo+IAo+IC0JCQkvKiBJZiB0aGF0IGRv ZXNuJ3Qgd29yaywgdHJ5IHRoZSBub2RlbWFzayBpdHNlbGYgKi8KPiAtCQkJaWYgKGNwdW1hc2tf ZW1wdHkodG1wbWFzaykpCj4gLQkJCQljcHVtYXNrX2FuZCh0bXBtYXNrLCBjcHVtYXNrX29mX25v ZGUobm9kZSksIGNwdV9vbmxpbmVfbWFzayk7Cj4gLQo+ICAJCQljcHUgPSBjcHVtYXNrX3BpY2tf bGVhc3RfbG9hZGVkKGQsIHRtcG1hc2spOwo+ICAJCQlpZiAoY3B1IDwgbnJfY3B1X2lkcykKPiAg CQkJCWdvdG8gb3V0OwoKSSdtIHJlYWxseSBub3Qgc3VyZS4gU2hvdWxkbid0IHdlIHRoZW4gZHJv cCB0aGUgd2lkZXIgc2VhcmNoIG9uCmNwdV9pbmxpbmVfbWFzaywgYmVjYXVzZSB1c2Vyc3BhY2Ug Y291bGQgaGF2ZSBnaXZlbiB1cyBzb21ldGhpbmcKdGhhdCB3ZSBjYW5ub3QgZGVhbCB3aXRoPwoK V2hhdCB5b3UgYXJlIGFkdm9jYXRpbmcgZm9yIGlzIGEgc3RyaWN0IGFkaGVyZW5jZSB0byB0aGUg cHJvdmlkZWQKbWFzaywgYW5kIGl0IGRvZXNuJ3Qgc2VlbSB0byBiZSB3aGF0IG90aGVyIGFyY2hp dGVjdHVyZXMgYXJlIHByb3ZpZGluZy4KSSBjb25zaWRlciB0aGUgdXNlcnNwYWNlLXByb3ZpZGVk IGFmZmluaXR5IGFzIGEgaGludCBtb3JlIHRoYXQgYW55dGhpbmcKZWxzZSwgYXMgaW4gdGhpcyBj YXNlIHRoZSBrZXJuZWwgZG9lcyBrbm93IGJldHRlciAocm91dGluZyB0aGUgaW50ZXJydXB0CnRv IGEgZm9yZWlnbiBub2RlIG1pZ2h0IGJlIGNvc3RseSwgb3IgZXZlbiBpbXBvc3NpYmxlLCBzZWUg dGhlIFRYMQplcnJhdHVtKS4KCiBGcm9tIHdoYXQgSSByZW1lbWJlciBvZiB0aGUgZWFybGllciBk aXNjdXNzaW9uLCB5b3Ugc2F3IGFuIGlzc3VlIG9uCmEgc3lzdGVtIHdpdGggdHdvIHNvY2tldHMg YW5kIGEgc2luZ2xlIElUUywgd2l0aCB0aGUgbm9kZSBtYXNrIGxpbWl0ZWQKdG8gdGhlIGZpcnN0 IHNvY2tldC4gSXMgdGhhdCBjb3JyZWN0PwoKSSdsbCByZXNwaW4gdGhlIHNlcmllcyB0b2RheSBh bmQgcmVwb3J0IGl0IHdpdGggeW91IGZpcnN0IHBhdGNoCnNxdWFzZWQgaW4uCgpUaGFua3MsCgog ICAgICAgICBNLgotLSAKSmF6eiBpcyBub3QgZGVhZC4gSXQganVzdCBzbWVsbHMgZnVubnkuLi4K Cl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmxpbnV4LWFy bS1rZXJuZWwgbWFpbGluZyBsaXN0CmxpbnV4LWFybS1rZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9y ZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LWFybS1r ZXJuZWwK From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 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(TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1jZXMW-00CX9a-1u; Fri, 15 May 2020 11:14:40 +0100 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Date: Fri, 15 May 2020 11:14:39 +0100 From: Marc Zyngier To: John Garry Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jason Cooper , chenxiang , Robin Murphy , luojiaxing@huawei.com, Ming Lei , Zhou Wang , Thomas Gleixner , Will Deacon Subject: Re: [PATCH v3 0/2] irqchip/gic-v3-its: Balance LPI affinity across CPUs In-Reply-To: <7c05b08b-2edc-7f97-0175-898e9772673e@huawei.com> References: <20200316115433.9017-1-maz@kernel.org> <9171c554-50d2-142b-96ae-1357952fce52@huawei.com> <80b673a7-1097-c5fa-82c0-1056baa5309d@huawei.com> <7c05b08b-2edc-7f97-0175-898e9772673e@huawei.com> User-Agent: Roundcube Webmail/1.4.4 Message-ID: <668f819c8747104814245cd6faebdd9a@kernel.org> X-Sender: maz@kernel.org X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: john.garry@huawei.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, jason@lakedaemon.net, chenxiang66@hisilicon.com, robin.murphy@arm.com, luojiaxing@huawei.com, ming.lei@redhat.com, wangzhou1@hisilicon.com, tglx@linutronix.de, will@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi John, On 2020-05-14 13:05, John Garry wrote: >> >> +       its_inc_lpi_count(d, cpu); >> + >>         return IRQ_SET_MASK_OK_DONE; >>  } >> >> Results look ok: >>     nvme.use_threaded_interrupts=1    =0* >> Before    950K IOPs            1000K IOPs >> After    1100K IOPs            1150K IOPs >> >> * as mentioned before, this is quite unstable and causes lockups. >> JFYI, there was an attempt to fix this: >> >> https://lore.kernel.org/linux-nvme/20191209175622.1964-1-kbusch@kernel.org/ >> > > Hi Marc, > > Just wondering if we can try to get this series over the line? Absolutely. Life has got in the way, so let me page it back in... > So I tested the patches on v5.7-rc5, and get similar performance > improvement to above. > > I did apply a couple of patches, below, to remedy the issues I > experienced for my D06CS. Comments on that below. > > Thanks, > John > > > ---->8 > > > [PATCH 1/2] irqchip/gic-v3-its: Don't double account for target CPU > assignment > > In its_set_affinity(), when a managed irq is already assigned to a CPU, > we may needlessly reassign the irq to another CPU. > > This is because when selecting the target CPU, being the least loaded > CPU in the mask, we account of that irq still being assigned to a CPU; > thereby we may unfairly select another CPU. > > Modify this behaviour to pre-decrement the current target CPU LPI count > when finding the least loaded CPU. > > Alternatively we may be able to just bail out early when the current > target CPU already falls within the requested mask. > > --- > drivers/irqchip/irq-gic-v3-its.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/irqchip/irq-gic-v3-its.c > b/drivers/irqchip/irq-gic-v3-its.c > index 73f5c12..2b18feb 100644 > --- a/drivers/irqchip/irq-gic-v3-its.c > +++ b/drivers/irqchip/irq-gic-v3-its.c > @@ -1636,6 +1636,8 @@ static int its_set_affinity(struct irq_data *d, > const struct cpumask *mask_val, > if (irqd_is_forwarded_to_vcpu(d)) > return -EINVAL; > > + its_dec_lpi_count(d, its_dev->event_map.col_map[id]); > + > if (!force) > cpu = its_select_cpu(d, mask_val); > else > @@ -1646,14 +1648,14 @@ static int its_set_affinity(struct irq_data > *d, const struct cpumask *mask_val, > > /* don't set the affinity when the target cpu is same as current one > */ > if (cpu != its_dev->event_map.col_map[id]) { > - its_inc_lpi_count(d, cpu); > - its_dec_lpi_count(d, its_dev->event_map.col_map[id]); > target_col = &its_dev->its->collections[cpu]; > its_send_movi(its_dev, target_col, id); > its_dev->event_map.col_map[id] = cpu; > irq_data_update_effective_affinity(d, cpumask_of(cpu)); > } > > + its_inc_lpi_count(d, cpu); > + I'm OK with that change, as it removes unnecessary churn. > return IRQ_SET_MASK_OK_DONE; > } > > --- > > > [PATCH 2/2] irqchip/gic-v3-its: Handle no overlap of non-managed irq > affinity mask > > In selecting the target CPU for a non-managed interrupt, we may select > a > target CPU outside the requested affinity mask. > > This is because there may be no overlap of the ITS node mask and the > requested CPU affinity mask. The requested affinity mask may be coming > from userspace or some drivers which try to set irq affinity, see [0]. > > In this case, just ignore the ITS node cpumask. This is a deviation > from > what Thomas described. Having said that, I am not sure if the > interrupt is ever bound to a node for us. > > [0] > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/perf/hisilicon/hisi_uncore_pmu.c#n417 > > --- > drivers/irqchip/irq-gic-v3-its.c | 4 ---- > 1 file changed, 4 deletions(-) > > diff --git a/drivers/irqchip/irq-gic-v3-its.c > b/drivers/irqchip/irq-gic-v3-its.c > index 2b18feb..12d5d4b4 100644 > --- a/drivers/irqchip/irq-gic-v3-its.c > +++ b/drivers/irqchip/irq-gic-v3-its.c > @@ -1584,10 +1584,6 @@ static int its_select_cpu(struct irq_data *d, > cpumask_and(tmpmask, cpumask_of_node(node), aff_mask); > cpumask_and(tmpmask, tmpmask, cpu_online_mask); > > - /* If that doesn't work, try the nodemask itself */ > - if (cpumask_empty(tmpmask)) > - cpumask_and(tmpmask, cpumask_of_node(node), cpu_online_mask); > - > cpu = cpumask_pick_least_loaded(d, tmpmask); > if (cpu < nr_cpu_ids) > goto out; I'm really not sure. Shouldn't we then drop the wider search on cpu_inline_mask, because userspace could have given us something that we cannot deal with? What you are advocating for is a strict adherence to the provided mask, and it doesn't seem to be what other architectures are providing. I consider the userspace-provided affinity as a hint more that anything else, as in this case the kernel does know better (routing the interrupt to a foreign node might be costly, or even impossible, see the TX1 erratum). From what I remember of the earlier discussion, you saw an issue on a system with two sockets and a single ITS, with the node mask limited to the first socket. Is that correct? I'll respin the series today and report it with you first patch squased in. Thanks, M. -- Jazz is not dead. It just smells funny...