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From: Michal Wajdeczko <michal.wajdeczko@intel.com>
To: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>,
	<intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH v3 02/12] drm/gt/guc: extract scheduler-related defines from guc_fwif.h
Date: Thu, 11 Dec 2025 19:20:32 +0100	[thread overview]
Message-ID: <677fa545-802c-4e49-8334-d2138bd185fb@intel.com> (raw)
In-Reply-To: <20251211015700.34266-16-daniele.ceraolospurio@intel.com>



On 12/11/2025 2:57 AM, Daniele Ceraolo Spurio wrote:
> Some upcoming KLVs are sized based on the engine counts, so we need
> those defines to be moved to a separate file to include them from
> guc_klv_abi.h (which is already included by guc_fwif.h).
> Instead of moving just the engine-related defines, it is cleaner to
> move all scheduler-related defines (i.e., everything engine or context
> related). Note that the legacy GuC defines have not been moved and have
> instead been dropped because Xe doesn't support any GuC old enough to
> still use them.
> 
> While at it, struct guc_ctxt_registration_info has been moved to
> guc_submit.c since it doesn't come from the GuC specs (we added it to
> make things simpler in our code).
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>

Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>

with 2 nits below to be fixed later

> ---
>  drivers/gpu/drm/xe/abi/guc_scheduler_abi.h | 48 ++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_guc_capture.h        |  2 +-
>  drivers/gpu/drm/xe/xe_guc_fwif.h           | 52 +---------------------
>  drivers/gpu/drm/xe/xe_guc_submit.c         | 15 +++++++
>  4 files changed, 65 insertions(+), 52 deletions(-)
>  create mode 100644 drivers/gpu/drm/xe/abi/guc_scheduler_abi.h
> 
> diff --git a/drivers/gpu/drm/xe/abi/guc_scheduler_abi.h b/drivers/gpu/drm/xe/abi/guc_scheduler_abi.h
> new file mode 100644
> index 000000000000..db9c171f8b64
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/abi/guc_scheduler_abi.h
> @@ -0,0 +1,48 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#ifndef _ABI_GUC_SCHEDULER_ABI_H
> +#define _ABI_GUC_SCHEDULER_ABI_H
> +
> +/**
> + * Generic defines required for registration with and submissions to the GuC
> + * scheduler. Includes engine class/instance defines and context attributes
> + * (id, priority, etc)
> + */
> +
> +/* Engine classes/instances */
> +#define GUC_RENDER_CLASS		0
> +#define GUC_VIDEO_CLASS			1
> +#define GUC_VIDEOENHANCE_CLASS		2
> +#define GUC_BLITTER_CLASS		3
> +#define GUC_COMPUTE_CLASS		4
> +#define GUC_GSC_OTHER_CLASS		5
> +#define GUC_LAST_ENGINE_CLASS		GUC_GSC_OTHER_CLASS
> +#define GUC_MAX_ENGINE_CLASSES		16
> +#define GUC_MAX_INSTANCES_PER_CLASS	32
> +
> +/* context priority values */
> +#define GUC_CLIENT_PRIORITY_KMD_HIGH	0
> +#define GUC_CLIENT_PRIORITY_HIGH	1
> +#define GUC_CLIENT_PRIORITY_KMD_NORMAL	2
> +#define GUC_CLIENT_PRIORITY_NORMAL	3
> +#define GUC_CLIENT_PRIORITY_NUM		4
> +
> +/* Context registration */
> +#define GUC_ID_MAX			65535
> +#define GUC_ID_UNKNOWN			0xffffffff
> +
> +#define CONTEXT_REGISTRATION_FLAG_KMD	        BIT(0)
> +#define CONTEXT_REGISTRATION_FLAG_TYPE	        GENMASK(2, 1)

nit: we might want to rename it by adding GUC_ prefix like all other defs

> +#define   GUC_CONTEXT_NORMAL			0
> +#define   GUC_CONTEXT_COMPRESSION_SAVE		1
> +#define   GUC_CONTEXT_COMPRESSION_RESTORE	2
> +#define   GUC_CONTEXT_COUNT			(GUC_CONTEXT_COMPRESSION_RESTORE + 1)

nit: candidate to drop, the only use of it can be replaced with FIELD_FIT

> +
> +/* context enable/disable */
> +#define GUC_CONTEXT_DISABLE		0
> +#define GUC_CONTEXT_ENABLE		1
> +
> +#endif
> diff --git a/drivers/gpu/drm/xe/xe_guc_capture.h b/drivers/gpu/drm/xe/xe_guc_capture.h
> index 20a078dc4b85..34d6fdc64f56 100644
> --- a/drivers/gpu/drm/xe/xe_guc_capture.h
> +++ b/drivers/gpu/drm/xe/xe_guc_capture.h
> @@ -8,8 +8,8 @@
>  
>  #include <linux/types.h>
>  #include "abi/guc_capture_abi.h"
> +#include "abi/guc_scheduler_abi.h"
>  #include "xe_guc.h"
> -#include "xe_guc_fwif.h"
>  
>  struct xe_exec_queue;
>  struct xe_guc;
> diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h
> index 7d93c2749485..08149c8159c5 100644
> --- a/drivers/gpu/drm/xe/xe_guc_fwif.h
> +++ b/drivers/gpu/drm/xe/xe_guc_fwif.h
> @@ -10,6 +10,7 @@
>  
>  #include "abi/guc_capture_abi.h"
>  #include "abi/guc_klvs_abi.h"
> +#include "abi/guc_scheduler_abi.h"
>  #include "xe_hw_engine_types.h"
>  
>  #define G2H_LEN_DW_SCHED_CONTEXT_MODE_SET	4
> @@ -17,57 +18,6 @@
>  #define G2H_LEN_DW_TLB_INVALIDATE		3
>  #define G2H_LEN_DW_G2G_NOTIFY_MIN		3
>  
> -#define GUC_ID_MAX			65535
> -#define GUC_ID_UNKNOWN			0xffffffff
> -
> -#define GUC_CONTEXT_DISABLE		0
> -#define GUC_CONTEXT_ENABLE		1
> -
> -#define GUC_CLIENT_PRIORITY_KMD_HIGH	0
> -#define GUC_CLIENT_PRIORITY_HIGH	1
> -#define GUC_CLIENT_PRIORITY_KMD_NORMAL	2
> -#define GUC_CLIENT_PRIORITY_NORMAL	3
> -#define GUC_CLIENT_PRIORITY_NUM		4
> -
> -#define GUC_RENDER_ENGINE		0
> -#define GUC_VIDEO_ENGINE		1
> -#define GUC_BLITTER_ENGINE		2
> -#define GUC_VIDEOENHANCE_ENGINE		3
> -#define GUC_VIDEO_ENGINE2		4
> -#define GUC_MAX_ENGINES_NUM		(GUC_VIDEO_ENGINE2 + 1)
> -
> -#define GUC_RENDER_CLASS		0
> -#define GUC_VIDEO_CLASS			1
> -#define GUC_VIDEOENHANCE_CLASS		2
> -#define GUC_BLITTER_CLASS		3
> -#define GUC_COMPUTE_CLASS		4
> -#define GUC_GSC_OTHER_CLASS		5
> -#define GUC_LAST_ENGINE_CLASS		GUC_GSC_OTHER_CLASS
> -#define GUC_MAX_ENGINE_CLASSES		16
> -#define GUC_MAX_INSTANCES_PER_CLASS	32
> -
> -#define GUC_CONTEXT_NORMAL			0
> -#define GUC_CONTEXT_COMPRESSION_SAVE		1
> -#define GUC_CONTEXT_COMPRESSION_RESTORE	2
> -#define GUC_CONTEXT_COUNT			(GUC_CONTEXT_COMPRESSION_RESTORE + 1)
> -
> -/* Helper for context registration H2G */
> -struct guc_ctxt_registration_info {
> -	u32 flags;
> -	u32 context_idx;
> -	u32 engine_class;
> -	u32 engine_submit_mask;
> -	u32 wq_desc_lo;
> -	u32 wq_desc_hi;
> -	u32 wq_base_lo;
> -	u32 wq_base_hi;
> -	u32 wq_size;
> -	u32 hwlrca_lo;
> -	u32 hwlrca_hi;
> -};
> -#define CONTEXT_REGISTRATION_FLAG_KMD	BIT(0)
> -#define CONTEXT_REGISTRATION_FLAG_TYPE	GENMASK(2, 1)
> -
>  /* 32-bit KLV structure as used by policy updates and others */
>  struct guc_klv_generic_dw_t {
>  	u32 kl;
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> index bf289c480cd2..0fd08d59b644 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> @@ -568,6 +568,21 @@ static void set_min_preemption_timeout(struct xe_guc *guc, struct xe_exec_queue
>  		       __guc_exec_queue_policy_action_size(&policy), 0, 0);
>  }
>  
> +/* Helper for context registration H2G */
> +struct guc_ctxt_registration_info {
> +	u32 flags;
> +	u32 context_idx;
> +	u32 engine_class;
> +	u32 engine_submit_mask;
> +	u32 wq_desc_lo;
> +	u32 wq_desc_hi;
> +	u32 wq_base_lo;
> +	u32 wq_base_hi;
> +	u32 wq_size;
> +	u32 hwlrca_lo;
> +	u32 hwlrca_hi;
> +};
> +
>  #define parallel_read(xe_, map_, field_) \
>  	xe_map_rd_field(xe_, &map_, 0, struct guc_submit_parallel_scratch, \
>  			field_)


  reply	other threads:[~2025-12-11 18:20 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-11  1:56 [PATCH v3 00/12] Introduce SRIOV scheduler groups Daniele Ceraolo Spurio
2025-12-11  1:57 ` [PATCH v3 01/12] drm/xe/gt: Add engine masks for each class Daniele Ceraolo Spurio
2025-12-11 18:19   ` Michal Wajdeczko
2025-12-11  1:57 ` [PATCH v3 02/12] drm/gt/guc: extract scheduler-related defines from guc_fwif.h Daniele Ceraolo Spurio
2025-12-11 18:20   ` Michal Wajdeczko [this message]
2025-12-11  1:57 ` [PATCH v3 03/12] drm/xe/sriov: Initialize scheduler groups Daniele Ceraolo Spurio
2025-12-11 18:52   ` Michal Wajdeczko
2025-12-11 22:55     ` Daniele Ceraolo Spurio
2025-12-11  1:57 ` [PATCH v3 04/12] drm/xe/sriov: Add support for enabling " Daniele Ceraolo Spurio
2025-12-11 18:59   ` Michal Wajdeczko
2025-12-11 23:00     ` Daniele Ceraolo Spurio
2025-12-11  1:57 ` [PATCH v3 05/12] drm/xe/sriov: Scheduler groups are incompatible with multi-lrc Daniele Ceraolo Spurio
2025-12-11 19:05   ` Michal Wajdeczko
2025-12-11  1:57 ` [PATCH v3 06/12] drm/xe/sriov: Add handling for MLRC adverse event threshold Daniele Ceraolo Spurio
2025-12-11 23:19   ` Michal Wajdeczko
2025-12-11  1:57 ` [PATCH v3 07/12] drm/xe/sriov: Add debugfs to enable scheduler groups Daniele Ceraolo Spurio
2025-12-11 21:07   ` Michal Wajdeczko
2025-12-11  1:57 ` [PATCH v3 08/12] drm/xe/sriov: Add debugfs with scheduler groups information Daniele Ceraolo Spurio
2025-12-11 22:40   ` Michal Wajdeczko
2025-12-11 22:44     ` Daniele Ceraolo Spurio
2025-12-11  1:57 ` [PATCH v3 09/12] drm/xe/sriov: Prep for multiple exec quantums and preemption timeouts Daniele Ceraolo Spurio
2025-12-11 22:41   ` Michal Wajdeczko
2025-12-11  1:57 ` [PATCH v3 10/12] drm/xe/sriov: Add functions to set exec quantums for each group Daniele Ceraolo Spurio
2025-12-11 22:47   ` Michal Wajdeczko
2025-12-11  1:57 ` [PATCH v3 11/12] drm/xe/sriov: Add functions to set preempt timeouts " Daniele Ceraolo Spurio
2025-12-11 22:49   ` Michal Wajdeczko
2025-12-11  1:57 ` [PATCH v3 12/12] drm/xe/sriov: Add debugfs to set EQ and PT for scheduler groups Daniele Ceraolo Spurio
2025-12-11 23:07   ` Michal Wajdeczko
2025-12-11  2:31 ` ✗ CI.checkpatch: warning for Introduce SRIOV scheduler groups (rev3) Patchwork
2025-12-11  2:32 ` ✓ CI.KUnit: success " Patchwork
2025-12-11  3:34 ` ✓ Xe.CI.BAT: " Patchwork
2025-12-11 10:47 ` ✗ Xe.CI.Full: failure " Patchwork

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