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From: Dan Williams <dan.j.williams@intel.com>
To: Alexey Kardashevskiy <aik@amd.com>,
	Dan Williams <dan.j.williams@intel.com>,
	<linux-coco@lists.linux.dev>
Cc: Lukas Wunner <lukas@wunner.de>, Samuel Ortiz <sameo@rivosinc.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	Xu Yilun <yilun.xu@linux.intel.com>, <linux-pci@vger.kernel.org>,
	<gregkh@linuxfoundation.org>
Subject: Re: [PATCH 05/11] PCI/TSM: Authenticate devices via platform TSM
Date: Fri, 21 Feb 2025 12:42:26 -0800	[thread overview]
Message-ID: <67b8e5328fd41_2d2c294e5@dwillia2-xfh.jf.intel.com.notmuch> (raw)
In-Reply-To: <efc5ba59-964d-4988-a412-47f5297fedd3@amd.com>

Alexey Kardashevskiy wrote:
> On 6/12/24 09:23, Dan Williams wrote:
> > The PCIe 6.1 specification, section 11, introduces the Trusted Execution
> > Environment (TEE) Device Interface Security Protocol (TDISP).  This
> > interface definition builds upon Component Measurement and
> > Authentication (CMA), and link Integrity and Data Encryption (IDE). It
> > adds support for assigning devices (PCI physical or virtual function) to
> > a confidential VM such that the assigned device is enabled to access
> > guest private memory protected by technologies like Intel TDX, AMD
> > SEV-SNP, RISCV COVE, or ARM CCA.
> > 
> > The "TSM" (TEE Security Manager) is a concept in the TDISP specification
> > of an agent that mediates between a "DSM" (Device Security Manager) and
> > system software in both a VMM and a confidential VM. A VMM uses TSM ABIs
> > to setup link security and assign devices. A confidential VM uses TSM
> > ABIs to transition an assigned device into the TDISP "RUN" state and
> > validate its configuration. From a Linux perspective the TSM abstracts
> > many of the details of TDISP, IDE, and CMA. Some of those details leak
> > through at times, but for the most part TDISP is an internal
> > implementation detail of the TSM.
> > 
> > CONFIG_PCI_TSM adds an "authenticated" attribute and "tsm/" subdirectory
> > to pci-sysfs. The work in progress CONFIG_PCI_CMA (software
> > kernel-native PCI authentication) that can depend on a local to the PCI
> > core implementation, CONFIG_PCI_TSM needs to be prepared for late
> > loading of the platform TSM driver. Consider that the TSM driver may
> > itself be a PCI driver. Userspace can watch /sys/class/tsm/tsm0/uevent
> > to know when the PCI core has TSM services enabled.
> > 
> > The common verbs that the low-level TSM drivers implement are defined by
> > 'struct pci_tsm_ops'. For now only 'connect' and 'disconnect' are
> > defined for secure session and IDE establishment. The 'probe' and
> > 'remove' operations setup per-device context representing the device's
> > security manager (DSM). Note that there is only one DSM expected per
> > physical PCI function, and that coordinates a variable number of
> > assignable interfaces to CVMs.
> > 
> > The locking allows for multiple devices to be executing commands
> > simultaneously, one outstanding command per-device and an rwsem flushes
> > all in-flight commands when a TSM low-level driver/device is removed.
> > 
> > Thanks to Wu Hao for his work on an early draft of this support.
> > 
> > Cc: Lukas Wunner <lukas@wunner.de>
> > Cc: Samuel Ortiz <sameo@rivosinc.com>
> > Cc: Alexey Kardashevskiy <aik@amd.com>
> > Acked-by: Bjorn Helgaas <bhelgaas@google.com>
> > Co-developed-by: Xu Yilun <yilun.xu@linux.intel.com>
> > Signed-off-by: Xu Yilun <yilun.xu@linux.intel.com>
> > Signed-off-by: Dan Williams <dan.j.williams@intel.com>
> > ---
> >   Documentation/ABI/testing/sysfs-bus-pci |   42 ++++
> >   MAINTAINERS                             |    2
> >   drivers/pci/Kconfig                     |   13 +
> >   drivers/pci/Makefile                    |    1
> >   drivers/pci/pci-sysfs.c                 |    4
> >   drivers/pci/pci.h                       |   10 +
> >   drivers/pci/probe.c                     |    1
> >   drivers/pci/remove.c                    |    3
> >   drivers/pci/tsm.c                       |  293 +++++++++++++++++++++++++++++++
> >   drivers/virt/coco/host/tsm-core.c       |   19 ++
> 
> It is sooo small, make me wonder why we need it at all...

I expect it to grow as more common cross-vendor host TSM functionality
is added.

> > +static int pci_tsm_connect(struct pci_dev *pdev)
> > +{
> > +	struct pci_tsm *pci_tsm = pdev->tsm;
> > +	int rc;
> > +
> > +	lockdep_assert_held(&pci_tsm_rwsem);
> > +	if_not_guard(mutex_intr, &pci_tsm->lock)
> > +		return -EINTR;
> > +
> > +	if (pci_tsm->state >= PCI_TSM_CONNECT)
> > +		return 0;
> > +	if (pci_tsm->state < PCI_TSM_INIT)
> > +		return -ENXIO;
> > +
> > +	rc = tsm_ops->connect(pdev);
> 
> I thought ages ago it was suggested that DOE/SPDM loop happens in a 
> common place and not in the platform driver implementing 
> tsm_ops->connect() (but I may have missed the point then).

That's still the plan, but I would expect that to be a common helper
that TSM drivers can use and does not need to be enforced as a midlayer
detail in pci/tsm.c. We can add that to pci/doe.c or somewhere more
appropriate for SPDM transport helpers.

[..]
> > diff --git a/include/linux/pci-tsm.h b/include/linux/pci-tsm.h
> > new file mode 100644
> > index 000000000000..beb0d68129bc
> > --- /dev/null
> > +++ b/include/linux/pci-tsm.h
> > @@ -0,0 +1,83 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +#ifndef __PCI_TSM_H
> > +#define __PCI_TSM_H
> > +#include <linux/mutex.h>
> > +
> > +struct pci_dev;
> > +
> > +/**
> > + * struct pci_dsm - Device Security Manager context
> > + * @pdev: physical device back pointer
> > + */
> > +struct pci_dsm {
> > +	struct pci_dev *pdev;
> > +};
> > +
> > +enum pci_tsm_state {
> > +	PCI_TSM_ERR = -1,
> > +	PCI_TSM_INIT,
> > +	PCI_TSM_CONNECT,
> > +};
> > +
> > +/**
> > + * struct pci_tsm - Platform TSM transport context
> > + * @state: reflect device initialized, connected, or bound
> > + * @lock: protect @state vs pci_tsm_ops invocation
> > + * @doe_mb: PCIe Data Object Exchange mailbox
> > + * @dsm: TSM driver device context established by pci_tsm_ops.probe
> > + */
> > +struct pci_tsm {
> > +	enum pci_tsm_state state;
> > +	struct mutex lock;
> > +	struct pci_doe_mb *doe_mb;
> > +	struct pci_dsm *dsm;
> > +};
> 
> doe_mb and state look are device's attribures so will look more 
> appropriate in pci_dsm ("d" from "dsm" is "device"), and pci_tsm would 
> be some intimate knowledge of the ccp.ko (==PSP) about PCI PFs ("t" == 
> "TEE" == TCB == PSP). Or I got it all wrong?

I typed up a long reply only to realize I think this can be made simpler
by only having one common context and drop this subtle 'struct pci_dsm'
distinction.

So, 'struct pci_tsm' is just the common core context / handle for
drivers/pci/tsm.c to communicate with low level TSM driver
implementation. It is allocated by pci_tsm_ops->probe() and freed by
pci_tsm_ops->remove().

A low-level TSM driver can optionally wrap that core context with its
own data, i.e. enforce a container_of() relationship between the core
context and the low level context.

[..]
> > diff --git a/include/linux/pci.h b/include/linux/pci.h
> > index 50811b7655dd..a0900e7d2012 100644
> > --- a/include/linux/pci.h
> > +++ b/include/linux/pci.h
> > @@ -535,6 +535,9 @@ struct pci_dev {
> >   	u16		ide_cap;	/* Link Integrity & Data Encryption */
> >   	u16		sel_ide_cap;	/* - Selective Stream register block */
> >   	int		nr_ide_mem;	/* - Address range limits for streams */
> > +#endif
> > +#ifdef CONFIG_PCI_TSM
> > +	struct pci_tsm *tsm;		/* TSM operation state */
> >   #endif
> >   	u16		acs_cap;	/* ACS Capability offset */
> >   	u8		supported_speeds; /* Supported Link Speeds Vector */
> > diff --git a/include/linux/tsm.h b/include/linux/tsm.h
> > index 1a97459fc23e..46b9a0c6ea4e 100644
> > --- a/include/linux/tsm.h
> > +++ b/include/linux/tsm.h
> > @@ -111,7 +111,9 @@ struct tsm_report_ops {
> >   int tsm_report_register(const struct tsm_report_ops *ops, void *priv);
> >   int tsm_report_unregister(const struct tsm_report_ops *ops);
> >   struct tsm_subsys;
> > +struct pci_tsm_ops;
> >   struct tsm_subsys *tsm_register(struct device *parent,
> > -				const struct attribute_group **groups);
> > +				const struct attribute_group **groups,
> > +				const struct pci_tsm_ops *ops);
> >   void tsm_unregister(struct tsm_subsys *subsys);
> >   #endif /* __TSM_H */
> > diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
> > index 9635b27d2485..19bba65a262c 100644
> > --- a/include/uapi/linux/pci_regs.h
> > +++ b/include/uapi/linux/pci_regs.h
> > @@ -499,6 +499,7 @@
> >   #define  PCI_EXP_DEVCAP_PWR_VAL	0x03fc0000 /* Slot Power Limit Value */
> >   #define  PCI_EXP_DEVCAP_PWR_SCL	0x0c000000 /* Slot Power Limit Scale */
> >   #define  PCI_EXP_DEVCAP_FLR     0x10000000 /* Function Level Reset */
> > +#define  PCI_EXP_DEVCAP_TEE     0x40000000 /* TEE I/O (TDISP) Support */
> >   #define PCI_EXP_DEVCTL		0x08	/* Device Control */
> >   #define  PCI_EXP_DEVCTL_CERE	0x0001	/* Correctable Error Reporting En. */
> >   #define  PCI_EXP_DEVCTL_NFERE	0x0002	/* Non-Fatal Error Reporting Enable */
> > 
> 
> 
> I am trying to wrap my head around your tsm. here is what I got in my tree:
> https://github.com/aik/linux/blob/tsm/include/linux/tsm.h
> 
> Shortly:
> 
> drivers/virt/coco/tsm.ko does sysfs (including "connect" and "bind" to 
> control and "certs"/"report" to attest) and implements tsm_dev/tsm_tdi, 
> it does not know pci_dev;
> 
> drivers/pci/tsm-pci.ko creates/destroys tsm_dev/tsm_dev using tsm.ko;
> 
> drivers/crypto/ccp/ccp.ko (the PSP guy) registers:
> - tsm_subsys in tsm.ko (which does "connect" and "bind" and
> - tsm_bus_subsys in tsm-pci.ko (which does "spdm_forward")
> ccp.ko knows about pci_dev and whatever else comes in the future, and 
> ccp.ko's "connect" implementation calls the IDE library (I am adopting 
> yours now, with some tweaks).
> 
> tsm-dev and tsm-tdi embed struct dev each and are added as children to 
> PCI devices: no hide/show attrs, no additional TSM pointer in struct 
> device or pci_dev, looks like:

The motivation for building awareness of device-security properties
natively into 'struct pci_dev' is the recognition that TSM-based
security is not the only model that Linux needs to contend. The TSM
flow is a superset of PCI-CMA and maybe PCI-IDE in the future (although
Intel seems to be the only architecture that has a concept of allowing
IDE establishment without a TSM).

I understand your motivations to make all of TSM functionality bolted
onto the side of the PCI core. It has some nice properties. However, I
think that is a SEV-TIO centric view of the world. PCI device security
attributes are PCI device attributes and have reason to exist with and
without a TSM. In other words, certificates and measurements should not
be placed behind a TSM ABI because certificates and measurements are
expected to have a native PCI-CMA ABI.

It would be a useful property if software written to retrieve
measurement and certificate chains did that relative to the PCI dev
independent of TSM presence.

> aik@sc ~> ls  /sys/bus/pci/devices/0000:e1:04.0/tsm-tdi/tdi:0000:e1:04.0/
> device  power  subsystem  tsm_report  tsm_report_user  tsm_tdi_bind 
> tsm_tdi_status  tsm_tdi_status_user  uevent
> 
> aik@sc ~> ls  /sys/bus/pci/devices/0000:e1:04.0/tsm_dev/
> device  power  subsystem  tsm_certs  tsm_cert_slot  tsm_certs_user 
> tsm_dev_connect  tsm_dev_status  tsm_meas  tsm_meas_user  uevent
> 
> aik@sc ~> ls /sys/class/tsm/tsm0/
> device  power  stream0:0000:e1:00.0  subsystem  uevent
> 
> aik@sc ~> ls /sys/class/tsm-dev/
> tdev:0000:c0:01.1  tdev:0000:e0:01.1  tdev:0000:e1:00.0
> 
> aik@sc ~> ls /sys/class/tsm-tdi/
> tdi:0000:c0:01.1  tdi:0000:e0:01.1  tdi:0000:e1:00.0  tdi:0000:e1:04.0 
> tdi:0000:e1:04.1  tdi:0000:e1:04.2  tdi:0000:e1:04.3

Right, so I remain unconvinced that Linux needs to contend with new "tsm"
class devs vs PCI device objects with security properties especially
when those security properties have a "TSM" and non-"TSM" flavor.

  parent reply	other threads:[~2025-02-21 20:42 UTC|newest]

Thread overview: 125+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-05 22:23 [PATCH 00/11] PCI/TSM: Core infrastructure for PCI device security (TDISP) Dan Williams
2024-12-05 22:23 ` [PATCH 01/11] configfs-tsm: Namespace TSM report symbols Dan Williams
2024-12-10  6:08   ` Alexey Kardashevskiy
2024-12-11 13:55   ` Suzuki K Poulose
2024-12-05 22:23 ` [PATCH 02/11] coco/guest: Move shared guest CC infrastructure to drivers/virt/coco/guest/ Dan Williams
2024-12-10  6:09   ` Alexey Kardashevskiy
2024-12-05 22:23 ` [PATCH 03/11] coco/tsm: Introduce a class device for TEE Security Managers Dan Williams
2025-01-28 12:17   ` Jonathan Cameron
2025-02-25 21:08     ` Dan Williams
2024-12-05 22:23 ` [PATCH 04/11] PCI/IDE: Selective Stream IDE enumeration Dan Williams
2024-12-10  3:08   ` Aneesh Kumar K.V
2024-12-12  6:32     ` Xu Yilun
2025-02-22  0:42       ` Dan Williams
2025-02-20  3:17     ` Dan Williams
2024-12-10  6:18   ` Alexey Kardashevskiy
2025-02-20  3:59     ` Dan Williams
2024-12-10  7:05   ` Alexey Kardashevskiy
2024-12-12  6:06     ` Xu Yilun
2024-12-18 10:35       ` Alexey Kardashevskiy
2025-02-22  0:30       ` Dan Williams
2025-02-20 18:07     ` Dan Williams
2025-02-21  0:53       ` Alexey Kardashevskiy
2025-02-27 23:46         ` Dan Williams
2024-12-10 19:24   ` Bjorn Helgaas
2025-02-22  0:13     ` Dan Williams
2025-01-30 10:45   ` Jonathan Cameron
2025-02-26  0:21     ` Dan Williams
2024-12-05 22:23 ` [PATCH 05/11] PCI/TSM: Authenticate devices via platform TSM Dan Williams
2024-12-10 10:18   ` Alexey Kardashevskiy
2025-02-21  8:13     ` Aneesh Kumar K.V
2025-02-25  7:17       ` Xu Yilun
2025-02-26 12:10         ` Aneesh Kumar K.V
2025-02-26 12:13           ` [RFC PATCH 1/7] tsm: Select PCI_DOE which is required for PCI_TSM Aneesh Kumar K.V (Arm)
2025-02-26 12:13             ` [RFC PATCH 2/7] tsm: Move tsm core outside the host directory Aneesh Kumar K.V (Arm)
2025-02-26 12:13             ` [RFC PATCH 3/7] tsm: vfio: Add tsm bind/unbind support Aneesh Kumar K.V (Arm)
2025-02-26 12:13             ` [RFC PATCH 4/7] tsm: Allow tsm ops function to be called for multi-function devices Aneesh Kumar K.V (Arm)
2025-02-26 12:13             ` [RFC PATCH 5/7] tsm: Don't error out for doe mailbox failure Aneesh Kumar K.V (Arm)
2025-02-26 12:13             ` [RFC PATCH 6/7] tsm: Allow tsm connect ops to be used for multiple operations Aneesh Kumar K.V (Arm)
2025-02-26 12:13             ` [RFC PATCH 7/7] tsm: Add secure SPDM support Aneesh Kumar K.V (Arm)
2025-02-27  6:50               ` Xu Yilun
2025-02-27  6:35           ` [PATCH 05/11] PCI/TSM: Authenticate devices via platform TSM Xu Yilun
2025-02-27 13:57             ` Aneesh Kumar K.V
2025-02-28  1:26               ` Xu Yilun
2025-02-28  9:48                 ` Aneesh Kumar K.V
2025-03-01  7:50                   ` Xu Yilun
2025-03-07  3:07                   ` Alexey Kardashevskiy
2025-02-27 19:53           ` Dan Williams
2025-02-28 10:06             ` Aneesh Kumar K.V
2025-02-21 20:42     ` Dan Williams [this message]
2025-02-25  4:45       ` Alexey Kardashevskiy
2025-02-28  3:09         ` Dan Williams
2024-12-10 18:52   ` Bjorn Helgaas
2025-02-21 22:32     ` Dan Williams
2024-12-12  9:50   ` Xu Yilun
2025-02-22  1:15     ` Dan Williams
2025-02-24 11:02       ` Xu Yilun
2025-02-28  0:15         ` Dan Williams
2025-02-28  9:39           ` Xu Yilun
2025-01-30 11:45   ` Jonathan Cameron
2025-02-26  0:50     ` Dan Williams
2024-12-05 22:23 ` [PATCH 06/11] samples/devsec: PCI device-security bus / endpoint sample Dan Williams
2024-12-06  4:23   ` kernel test robot
2024-12-09  3:40   ` kernel test robot
2025-01-30 13:21   ` Jonathan Cameron
2025-02-26  2:00     ` Dan Williams
2024-12-05 22:23 ` [PATCH 07/11] PCI: Add PCIe Device 3 Extended Capability enumeration Dan Williams
2024-12-09 13:17   ` Ilpo Järvinen
2025-02-20  3:05     ` Dan Williams
2025-02-20  3:09       ` Dan Williams
2024-12-10 19:21   ` Bjorn Helgaas
2024-12-11 13:22     ` Ilpo Järvinen
2025-02-22  0:15       ` Dan Williams
2025-02-24 15:09         ` Ilpo Järvinen
2025-02-28  0:29           ` Dan Williams
2025-02-21 23:34     ` Dan Williams
2025-02-25  2:25       ` Alexey Kardashevskiy
2024-12-05 22:24 ` [PATCH 08/11] PCI/IDE: Add IDE establishment helpers Dan Williams
2024-12-10  3:19   ` Aneesh Kumar K.V
2024-12-10  3:37     ` Aneesh Kumar K.V
2025-02-20  3:39       ` Dan Williams
2025-02-21 15:53         ` Aneesh Kumar K.V
2025-02-25  0:46           ` Dan Williams
2025-01-07 20:19     ` Xu Yilun
2025-01-10 13:25       ` Aneesh Kumar K.V
2025-02-24 22:31         ` Dan Williams
2025-02-25  2:29           ` Alexey Kardashevskiy
2025-02-20  3:28     ` Dan Williams
2024-12-10  7:07   ` Alexey Kardashevskiy
2025-02-20 21:44     ` Dan Williams
2024-12-10 18:47   ` Bjorn Helgaas
2025-02-21 22:02     ` Dan Williams
2024-12-12 10:50   ` Xu Yilun
2024-12-19  7:25   ` Alexey Kardashevskiy
2024-12-19 10:05     ` Alexey Kardashevskiy
2025-01-07 20:00       ` Xu Yilun
2025-01-09  2:35         ` Alexey Kardashevskiy
2025-01-09 21:28           ` Xu Yilun
2025-01-15  0:20             ` Alexey Kardashevskiy
2025-02-25  0:06               ` Dan Williams
2025-02-25  3:39                 ` Alexey Kardashevskiy
2025-02-28  2:26                   ` Dan Williams
2025-03-04  0:03                     ` Alexey Kardashevskiy
2025-03-04  0:57                       ` Dan Williams
2025-03-04  1:31                         ` Alexey Kardashevskiy
2025-03-04 17:59                           ` Dan Williams
2025-02-20  4:19             ` Alexey Kardashevskiy
2025-02-24 22:24         ` Dan Williams
2025-02-25  2:45           ` Xu Yilun
2025-02-24 20:28       ` Dan Williams
2025-02-26  1:54         ` Alexey Kardashevskiy
2025-02-24 20:24     ` Dan Williams
2025-02-25  5:01       ` Xu Yilun
2024-12-05 22:24 ` [PATCH 09/11] PCI/IDE: Report available IDE streams Dan Williams
2024-12-06  0:12   ` kernel test robot
2024-12-06  0:43   ` kernel test robot
2025-02-11  6:10   ` Alexey Kardashevskiy
2025-02-27 23:35     ` Dan Williams
2024-12-05 22:24 ` [PATCH 10/11] PCI/TSM: Report active " Dan Williams
2024-12-10 18:49   ` Bjorn Helgaas
2025-02-21 22:28     ` Dan Williams
2024-12-05 22:24 ` [PATCH 11/11] samples/devsec: Add sample IDE establishment Dan Williams
2025-01-30 13:39   ` Jonathan Cameron
2025-02-27 23:27     ` Dan Williams
2024-12-06  6:05 ` [PATCH 00/11] PCI/TSM: Core infrastructure for PCI device security (TDISP) Greg KH
2024-12-06  8:44   ` Dan Williams

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