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[93.34.88.225]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a88c7ec6aesm2009045f8f.5.2025.06.27.01.20.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Jun 2025 01:20:22 -0700 (PDT) Message-ID: <685e5446.df0a0220.369e9e.8cb1@mx.google.com> X-Google-Original-Message-ID: Date: Fri, 27 Jun 2025 10:20:16 +0200 From: Christian Marangi To: Krzysztof Kozlowski Cc: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Felix Fietkau , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 06/10] dt-bindings: clock: airoha: Document new property airoha,chip-scu References: <20250617130455.32682-1-ansuelsmth@gmail.com> <20250617130455.32682-7-ansuelsmth@gmail.com> <20250627-determined-helpful-rabbit-be2dfe@krzk-bin> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250627-determined-helpful-rabbit-be2dfe@krzk-bin> On Fri, Jun 27, 2025 at 09:59:34AM +0200, Krzysztof Kozlowski wrote: > On Tue, Jun 17, 2025 at 03:04:49PM +0200, Christian Marangi wrote: > > Document new property airoha,chip-scu used on new Airoha SoC to > > reference the Chip SCU syscon node used for PCIe configuration. > > > > Signed-off-by: Christian Marangi > > --- > > .../devicetree/bindings/clock/airoha,en7523-scu.yaml | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml b/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml > > index fe2c5c1baf43..bce77a14c938 100644 > > --- a/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml > > +++ b/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml > > @@ -49,6 +49,11 @@ properties: > > description: ID of the controller reset line > > const: 1 > > > > + airoha,chip-scu: > > So the scu has phandle to scu... That's not what we discussed. Your > changelog also is very vague here, no links to previous discussions does > not make reviewing it easier. > Do you think it might be better to add to the changlog link to the previous version? > You clearly said you have SCU node wich clocks and now you claim you > have here some different device thus you need phandle. This is what your > schema says. > There is "SCU" and "Chip SCU". This new schema is to keep consistency with an7581 as MFD is quite problematic. Also I implemented the current mdio schema with 2 line with compatible and reg from suggestion of Rob review. > No. > > Where is the DTS with COMPLETE picture? > > Here the current DTS [1]. Nothing is stable for this and we can change it but I want to stress that the current HW block are VERY CONFUSING and SCRAMBELED. So it's really a matter of finding the least bad solution. In SCU there are: - PART fot the clock register - 2 MDIO controller register In chip SCU: - Other part of the clock register - Thermal driver register - PART of the pinctrl register [1] https://github.com/Ansuel/openwrt/blob/openwrt-24.10-airoha-an7581-stable/target/linux/airoha/dts/an7583.dtsi#L361 -- Ansuel