From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Return-path: Date: Mon, 23 Nov 2015 08:09:45 +0000 (GMT) From: MyungJoo Ham Subject: Re: [PATCH 1/2] clk: rockchip: dmc: support rk3399 dmc clock driver To: Lin Huang , "heiko@sntech.de" , "dianders@chromium.org" , "mturquette@baylibre.com" , =?utf-8?Q?=EB=B0=95=EA=B2=BD=EB=AF=BC?= Cc: "linux-clk@vger.kernel.org" , "sboyd@codeaurora.org" , "dbasehore@chromium.org" , "linux-rockchip@lists.infradead.org" , "linux-kernel@vger.kernel.org" Reply-to: myungjoo.ham@samsung.com MIME-version: 1.0 Content-type: text/plain; charset=utf-8 MIME-version: 1.0 Message-id: <68719599.130141448266183403.JavaMail.weblogic@epmlwas06a> List-ID: PiArc3RhdGljIHVuc2lnbmVkIGxvbmcgcmszMzk5X2RtY2Nsa19yZWNhbGNfcmF0ZShzdHJ1Y3Qg Y2xrX2h3ICpodywNCj4gKwkJCQkJICAgICAgIHVuc2lnbmVkIGxvbmcgcGFyZW50X3JhdGUpDQo+ ICt7DQo+ICsJc3RydWN0IHJrMzM5OV9kbWNjbGsgKmRtYyA9IHRvX3JrMzM5OV9kbWNjbGsoJmh3 KTsNCj4gKwl1MzIgdmFsOw0KPiArDQo+ICsJLyoNCj4gKwkgKiBHZXQgcGFyZW50IHJhdGUgc2lu Y2UgaXQgY2hhbmdlZCBpbiB0aGlzIGNsa3Mgc2V0X3JhdGUgb3AuIFRoZSBwYXJlbnQNCj4gKwkg KiByYXRlIHBhc3NlZCBpbnRvIHRoaXMgZnVuY3Rpb24gaXMgY2FjaGVkIGJlZm9yZSBzZXRfcmF0 ZSBpcyBjYWxsZWQgaW4NCj4gKwkgKiB0aGUgY29tbW9uIGNsayBjb2RlLCBzbyB3ZSBoYXZlIHRv IGdldCBpdCBoZXJlLg0KPiArCSAqLw0KPiArCXBhcmVudF9yYXRlID0gY2xrX2dldF9yYXRlKGNs a19nZXRfcGFyZW50KGh3LT5jbGspKTsNCj4gKw0KPiArCXZhbCA9IHJlYWRsKGRtYy0+Y3J1ICsg Q1JVX0NMS1NFTDZfQ09OKTsNCj4gKwl2YWwgPSAodmFsID4+IENMS19ERFJDX0RJVl9DT05fU0hJ RlQpICYgQ0xLX0REUkNfRElWX0NPTl9NQVNLOw0KPiArDQo+ICsJcmV0dXJuIHBhcmVudF9yYXRl IC8gKHZhbCArIDEpOw0KPiArfQ0KPiArDQo+ICsvKg0KPiArICogVE9ETzogc2V0IGRkciBmcmVx dWNuZXkgaW4gZGNmIHdoaWNoIHJ1biBpbiBBVEYNCj4gKyAqLw0KPiArc3RhdGljIGludCByazMz OTlfZG1jY2xrX3NldF9yYXRlKHN0cnVjdCBjbGtfaHcgKmh3LCB1bnNpZ25lZCBsb25nIHJhdGUs DQo+ICsJCQkJICB1bnNpZ25lZCBsb25nIHBhcmVudF9yYXRlKQ0KPiArew0KPiArCXJldHVybiAw Ow0KPiArfQ0KDQpJcyBpdCBjb3JyZWN0IHRoYXQgeW91IGRpZG4ndCBmaWxsIHRoaXMgdXAgYmVj YXVzZSB5b3VyDQpUcnVzdHpvbmUgZHJpdmVyIChTTUMpIGlzIG5vdCByZWFkeSB5ZXQ/DQoNClRo ZW4sIHdoeSBkb24ndCB5b3UgZmlsbCB0aGF0IGZ1bmN0aW9uIGFzc3VtaW5nIHRoYXQgVHJ1c3Ra b25lIGlzIG5vdCBhY3RpdmF0ZWQNCmFuZCBhZGQgU01DIGNhbGwgZnVuY3Rpb25zIHdpdGggaWYg b3IgI2lmIGFmdGVyIGl0cyBUcnVzdFpvbmUgZHJpdmVyIGlzIHJlYWR5Pw0KDQpPciBkb2VzIHlv dXIgU29DIG1hbmRhdGUgdGhlIHVzYWdlIG90IFRydXN0Wm9uZSwgcmVzdHJpY3RpbmcgdGhlIHVz YWdlDQpvZiBDUlVfQ0xLU0VMNl9DT04gd3JpdGU/IChJIGRvbid0IHNlZSB3aHkgU29DIHZlbmRv cnMgd2lsbCBkbyB0aGlzLi4pDQoNCg0KSSdsbCBiZSByZWFkeSB0byBtZXJnZSB0aGUgUkszMzk5 IGRldmZyZXEgZHJpdmVyIGlmIHlvdQ0KZmlsbCB0aGlzIHVwIChhc3N1bWluZyB0aGF0IFRaIGlz IG5vdCBlbmFibGVkKSBvcg0KYWRkIFRaIGRyaXZlciBhbmQgU01DIGNhbGxzLg0KDQoNCkNoZWVy cywNCk15dW5nSm9vDQpwcy4gYWNjb3JkaW5nIHRvIHJrMzM5X2RtY2Nsa19yZWNhbGNfcmF0ZSgp LCBmaWxsaW5nIHJrMzM5X2RtY2Nsa19zZXRfcmF0ZQ0KYXNzdW1pbmcgdGhhdCBUWiBpcyBub3Qg ZW5hYmxlZCBzZWVtcyB0cml2aWFsLg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: MyungJoo Ham Subject: Re: [PATCH 1/2] clk: rockchip: dmc: support rk3399 dmc clock driver Date: Mon, 23 Nov 2015 08:09:45 +0000 (GMT) Message-ID: <68719599.130141448266183403.JavaMail.weblogic@epmlwas06a> Reply-To: myungjoo.ham@samsung.com Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: base64 Return-path: MIME-version: 1.0 Sender: linux-clk-owner@vger.kernel.org To: Lin Huang , "heiko@sntech.de" , "dianders@chromium.org" , "mturquette@baylibre.com" , =?utf-8?Q?=EB=B0=95=EA=B2=BD=EB=AF=BC?= Cc: "linux-clk@vger.kernel.org" , "sboyd@codeaurora.org" , "dbasehore@chromium.org" , "linux-rockchip@lists.infradead.org" , "linux-kernel@vger.kernel.org" List-Id: linux-rockchip.vger.kernel.org PiArc3RhdGljIHVuc2lnbmVkIGxvbmcgcmszMzk5X2RtY2Nsa19yZWNhbGNfcmF0ZShzdHJ1Y3Qg Y2xrX2h3ICpodywNCj4gKwkJCQkJICAgICAgIHVuc2lnbmVkIGxvbmcgcGFyZW50X3JhdGUpDQo+ ICt7DQo+ICsJc3RydWN0IHJrMzM5OV9kbWNjbGsgKmRtYyA9IHRvX3JrMzM5OV9kbWNjbGsoJmh3 KTsNCj4gKwl1MzIgdmFsOw0KPiArDQo+ICsJLyoNCj4gKwkgKiBHZXQgcGFyZW50IHJhdGUgc2lu Y2UgaXQgY2hhbmdlZCBpbiB0aGlzIGNsa3Mgc2V0X3JhdGUgb3AuIFRoZSBwYXJlbnQNCj4gKwkg KiByYXRlIHBhc3NlZCBpbnRvIHRoaXMgZnVuY3Rpb24gaXMgY2FjaGVkIGJlZm9yZSBzZXRfcmF0 ZSBpcyBjYWxsZWQgaW4NCj4gKwkgKiB0aGUgY29tbW9uIGNsayBjb2RlLCBzbyB3ZSBoYXZlIHRv IGdldCBpdCBoZXJlLg0KPiArCSAqLw0KPiArCXBhcmVudF9yYXRlID0gY2xrX2dldF9yYXRlKGNs a19nZXRfcGFyZW50KGh3LT5jbGspKTsNCj4gKw0KPiArCXZhbCA9IHJlYWRsKGRtYy0+Y3J1ICsg Q1JVX0NMS1NFTDZfQ09OKTsNCj4gKwl2YWwgPSAodmFsID4+IENMS19ERFJDX0RJVl9DT05fU0hJ RlQpICYgQ0xLX0REUkNfRElWX0NPTl9NQVNLOw0KPiArDQo+ICsJcmV0dXJuIHBhcmVudF9yYXRl IC8gKHZhbCArIDEpOw0KPiArfQ0KPiArDQo+ICsvKg0KPiArICogVE9ETzogc2V0IGRkciBmcmVx dWNuZXkgaW4gZGNmIHdoaWNoIHJ1biBpbiBBVEYNCj4gKyAqLw0KPiArc3RhdGljIGludCByazMz OTlfZG1jY2xrX3NldF9yYXRlKHN0cnVjdCBjbGtfaHcgKmh3LCB1bnNpZ25lZCBsb25nIHJhdGUs DQo+ICsJCQkJICB1bnNpZ25lZCBsb25nIHBhcmVudF9yYXRlKQ0KPiArew0KPiArCXJldHVybiAw Ow0KPiArfQ0KDQpJcyBpdCBjb3JyZWN0IHRoYXQgeW91IGRpZG4ndCBmaWxsIHRoaXMgdXAgYmVj YXVzZSB5b3VyDQpUcnVzdHpvbmUgZHJpdmVyIChTTUMpIGlzIG5vdCByZWFkeSB5ZXQ/DQoNClRo ZW4sIHdoeSBkb24ndCB5b3UgZmlsbCB0aGF0IGZ1bmN0aW9uIGFzc3VtaW5nIHRoYXQgVHJ1c3Ra b25lIGlzIG5vdCBhY3RpdmF0ZWQNCmFuZCBhZGQgU01DIGNhbGwgZnVuY3Rpb25zIHdpdGggaWYg b3IgI2lmIGFmdGVyIGl0cyBUcnVzdFpvbmUgZHJpdmVyIGlzIHJlYWR5Pw0KDQpPciBkb2VzIHlv dXIgU29DIG1hbmRhdGUgdGhlIHVzYWdlIG90IFRydXN0Wm9uZSwgcmVzdHJpY3RpbmcgdGhlIHVz YWdlDQpvZiBDUlVfQ0xLU0VMNl9DT04gd3JpdGU/IChJIGRvbid0IHNlZSB3aHkgU29DIHZlbmRv cnMgd2lsbCBkbyB0aGlzLi4pDQoNCg0KSSdsbCBiZSByZWFkeSB0byBtZXJnZSB0aGUgUkszMzk5 IGRldmZyZXEgZHJpdmVyIGlmIHlvdQ0KZmlsbCB0aGlzIHVwIChhc3N1bWluZyB0aGF0IFRaIGlz IG5vdCBlbmFibGVkKSBvcg0KYWRkIFRaIGRyaXZlciBhbmQgU01DIGNhbGxzLg0KDQoNCkNoZWVy cywNCk15dW5nSm9vDQpwcy4gYWNjb3JkaW5nIHRvIHJrMzM5X2RtY2Nsa19yZWNhbGNfcmF0ZSgp LCBmaWxsaW5nIHJrMzM5X2RtY2Nsa19zZXRfcmF0ZQ0KYXNzdW1pbmcgdGhhdCBUWiBpcyBub3Qg ZW5hYmxlZCBzZWVtcyB0cml2aWFsLg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753599AbbKWIJu (ORCPT ); Mon, 23 Nov 2015 03:09:50 -0500 Received: from mailout2.samsung.com ([203.254.224.25]:40594 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753449AbbKWIJt (ORCPT ); Mon, 23 Nov 2015 03:09:49 -0500 X-AuditID: cbfee68d-f79286d000007523-3d-5652c9cb01e5 Date: Mon, 23 Nov 2015 08:09:47 +0000 (GMT) From: MyungJoo Ham Subject: Re: [PATCH 1/2] clk: rockchip: dmc: support rk3399 dmc clock driver To: Lin Huang , "heiko@sntech.de" , "dianders@chromium.org" , "mturquette@baylibre.com" , =?utf-8?Q?=EB=B0=95=EA=B2=BD=EB=AF=BC?= Cc: "linux-clk@vger.kernel.org" , "sboyd@codeaurora.org" , "dbasehore@chromium.org" , "linux-rockchip@lists.infradead.org" , "linux-kernel@vger.kernel.org" Reply-to: myungjoo.ham@samsung.com MIME-version: 1.0 X-MTR: 20151123080839884@myungjoo.ham Msgkey: 20151123080839884@myungjoo.ham X-EPLocale: ko_KR.utf-8 X-Priority: 3 X-EPWebmail-Msg-Type: personal X-EPWebmail-Reply-Demand: 0 X-EPApproval-Locale: X-EPHeader: ML X-MLAttribute: X-RootMTR: 20151123080839884@myungjoo.ham X-ParentMTR: X-ArchiveUser: X-CPGSPASS: N X-ConfirmMail: N,general Content-type: text/plain; charset=utf-8 MIME-version: 1.0 Message-id: <68719599.130141448266183403.JavaMail.weblogic@epmlwas06a> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrCIsWRmVeSWpSXmKPExsWyRsSkRPf0yaAwg38zNSwu75rD5sDo8XmT XABjFJdNSmpOZllqkb5dAlfGzXPn2QseCFT8efKetYFxiUAXIyeHkIC6xKIlJ9lAbAkBE4kb H+dD2WISF+6tZ4OoWcoo8egTK0zN3mUv2bsYuYDicxglFry7xw6SYBFQlXj0tZmli5GDg01A T2Lm52SQsLCAj8TO/g8sIPUiAn8ZJTr2vGMGcZgF1jNJnH27lBVig5LEmn2vWEBsXgFBiZMz n7BAbFOVeHX0AVRcTWLG9k52iLi4xIW5l6BsXokZ7U+h6uUkpn1dwwxhS0ucn7WBEeabxd8f Q8X5JY7d3sEEYQtITD1zEKpGS6Jh7kmoOJ/EmoVvWWDqd51azgyz6/6WuVA1EhJbW56A3c8s oCgxpfshO8jzzAKaEut36aN7hVfATeLLwaVgv0sITOWQ2PDkH9sERqVZSOpmIRk1C2EUspIF jCyrGEVTC5ILipPSiwz1ihNzi0vz0vWS83M3MQITw+l/z3p3MN4+YH2IUYCDUYmHV0M/KEyI NbGsuDL3EKMpMJomMkuJJucD009eSbyhsZmRhamJqbGRuaWZkjivotTPYCGB9MSS1OzU1ILU ovii0pzU4kOMTBycUg2Ml18/e7/00NNlm/1+dofbnXw/1eT3lf1W1Utv8q9Jy5vO/kL7fAvP ev2oq7PFJvo9Cnuu6Lv4/PGbS5J7nsvW3GFVrnh01+OZg12ErNjUd8qc7rz7XF9+n2v175vW PiufKqGod1VulbJPP6zP5eJ9OTNj8Spe755prm/35p3w+Dr9fe4t3hxhayWW4oxEQy3mouJE AOxUJREHAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrGKsWRmVeSWpSXmKPExsVy+t/tXt3TJ4PCDFZdVrS4vGsOmwOjx+dN cgGMUWk2GamJKalFCql5yfkpmXnptkrewfHO8aZmBoa6hpYW5koKeYm5qbZKLj4Bum6ZOUBD lRTKEnNKgUIBicXFSvp2NkX5pSWpChn5xSW2StGG5kZ6RgZ6pkZ6hsaxVoYGBkamQDUJaRk3 z51nL3ggUPHnyXvWBsYlAl2MnBxCAuoSi5acZAOxJQRMJPYue8kOYYtJXLi3HijOBVQzh1Fi wbt7YAkWAVWJR1+bWboYOTjYBPQkZn5OBgkLC/hI7Oz/wAJSLyLwl1GiY887ZhCHWWA9k8TZ t0tZIbYpSazZ94oFxOYVEJQ4OfMJC8Q2VYlXRx9AxdUkZmzvhLpCXOLC3EtQNq/EjPanUPVy EtO+rmGGsKUlzs/awAhz9eLvj6Hi/BLHbu9ggrAFJKaeOQhVoyXRMPckVJxPYs3Ctyww9btO LWeG2XV/y1yoGgmJrS1PwO5nFlCUmNL9kB3keWYBTYn1u/TRvcIr4Cbx5eBS5gmMsrOQpGYh 6Z6F0I2sZAEjyypG0dSC5ILipPQKE73ixNzi0rx0veT83E2M4DT0bMkOxoYL1ocYBTgYlXh4 NfSDwoRYE8uKK3MPMUpwMCuJ8B7ZChTiTUmsrEotyo8vKs1JLT7EaAqMtInMUqLJ+cAUmVcS b2hsbGJmYmppYmFgaq4kznt7n1+YkEB6YklqdmpqQWoRTB8TB6dUA6OQRrXX7+srZxx4frmq /ez5R38e+viqN99jfnjB0fngx7rV51bWztyU/Pbeo9Abxk88eg+K1S7IKvm5z+esVEVxeNZx tUfG5y3mPj80pzLvYfyFzL6U7LA9pwM+Xutua6p+4W3rtuhs+s4svhZ+ea0sZ789JfyrAlbt 5Z1q/1XmI4dvdrjvFxYlluKMREMt5qLiRABlO+DqWQMAAA== DLP-Filter: Pass X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id tAN89t4w010739 > +static unsigned long rk3399_dmcclk_recalc_rate(struct clk_hw *hw, > + unsigned long parent_rate) > +{ > + struct rk3399_dmcclk *dmc = to_rk3399_dmcclk(&hw); > + u32 val; > + > + /* > + * Get parent rate since it changed in this clks set_rate op. The parent > + * rate passed into this function is cached before set_rate is called in > + * the common clk code, so we have to get it here. > + */ > + parent_rate = clk_get_rate(clk_get_parent(hw->clk)); > + > + val = readl(dmc->cru + CRU_CLKSEL6_CON); > + val = (val >> CLK_DDRC_DIV_CON_SHIFT) & CLK_DDRC_DIV_CON_MASK; > + > + return parent_rate / (val + 1); > +} > + > +/* > + * TODO: set ddr frequcney in dcf which run in ATF > + */ > +static int rk3399_dmcclk_set_rate(struct clk_hw *hw, unsigned long rate, > + unsigned long parent_rate) > +{ > + return 0; > +} Is it correct that you didn't fill this up because your Trustzone driver (SMC) is not ready yet? Then, why don't you fill that function assuming that TrustZone is not activated and add SMC call functions with if or #if after its TrustZone driver is ready? Or does your SoC mandate the usage ot TrustZone, restricting the usage of CRU_CLKSEL6_CON write? (I don't see why SoC vendors will do this..) I'll be ready to merge the RK3399 devfreq driver if you fill this up (assuming that TZ is not enabled) or add TZ driver and SMC calls. Cheers, MyungJoo ps. according to rk339_dmcclk_recalc_rate(), filling rk339_dmcclk_set_rate assuming that TZ is not enabled seems trivial.{.n++%ݶw{.n+{G{ayʇڙ,jfhz_(階ݢj"mG?&~iOzv^m ?I