From: abhinavk-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
To: Sean Paul <seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-msm-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
robdclark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
jsanka-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
hoegsberg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org
Subject: Re: [DPU PATCH] drm/msm: dpu: Fix build warnings
Date: Fri, 20 Apr 2018 14:18:27 -0700 [thread overview]
Message-ID: <68d3f73fbd275fa07a2c9c6f5b9222eb@codeaurora.org> (raw)
In-Reply-To: <20180420160719.54461-1-seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
On 2018-04-20 09:07, Sean Paul wrote:
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
> ---
> .../gpu/drm/msm/disp/dpu1/dpu_color_processing.c | 5 +++--
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_reg_dma_v1.c | 14 +++++++-------
> drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 9 +++++----
> drivers/gpu/drm/msm/dpu_dbg.c | 14 ++++++++------
> drivers/gpu/drm/msm/dsi/dsi_manager.c | 2 +-
> 6 files changed, 26 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_color_processing.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_color_processing.c
> index c6fc0a28d76f..f13d1cc8f635 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_color_processing.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_color_processing.c
> @@ -244,7 +244,8 @@ static int dpu_cp_handle_range_property(struct
> dpu_cp_node *prop_node,
> return 0;
> }
>
> - ret = copy_from_user(blob_ptr->data, (void *)val, blob_ptr->length);
> + ret = copy_from_user(blob_ptr->data, u64_to_user_ptr(val),
> + blob_ptr->length);
> if (ret) {
> DRM_ERROR("failed to get the property info ret %d", ret);
> ret = -EFAULT;
> @@ -910,7 +911,7 @@ int dpu_cp_crtc_set_property(struct drm_crtc *crtc,
> */
> if (!dpu_crtc->num_mixers ||
> dpu_crtc->num_mixers > ARRAY_SIZE(dpu_crtc->mixers)) {
> - DRM_ERROR("Invalid mixer config act cnt %d max cnt %ld\n",
> + DRM_ERROR("Invalid mixer config act cnt %d max cnt %zd\n",
> dpu_crtc->num_mixers, ARRAY_SIZE(dpu_crtc->mixers));
> return -EINVAL;
> }
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> index 631ba7ebf596..f7ac9c85c336 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> @@ -3366,11 +3366,11 @@ static int dpu_crtc_atomic_set_property(struct
> drm_crtc *crtc,
> switch (idx) {
> case CRTC_PROP_DIM_LAYER_V1:
> _dpu_crtc_set_dim_layer_v1(cstate,
> - (void __user *)val);
> + u64_to_user_ptr(val));
> break;
> case CRTC_PROP_DEST_SCALER:
> ret = _dpu_crtc_set_dest_scaler(dpu_crtc,
> - cstate, (void __user *)val);
> + cstate, u64_to_user_ptr(val));
> break;
> case CRTC_PROP_DEST_SCALER_LUT_ED:
> case CRTC_PROP_DEST_SCALER_LUT_CIR:
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_reg_dma_v1.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_reg_dma_v1.c
> index e0d46c545c14..7c2772f7219f 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_reg_dma_v1.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_reg_dma_v1.c
> @@ -171,7 +171,7 @@ static void get_decode_sel(unsigned long blk, u32
> *decode_sel)
> *decode_sel |= BIT(21);
> break;
> default:
> - DRM_ERROR("block not supported %zx\n", BIT(i));
> + DRM_ERROR("block not supported %lx\n", BIT(i));
> break;
> }
> }
> @@ -275,7 +275,7 @@ static int validate_write_multi_lut_reg(struct
> dpu_reg_dma_setup_ops_cfg *cfg)
> return rc;
>
> if (cfg->wrap_size < WRAP_MIN_SIZE || cfg->wrap_size > WRAP_MAX_SIZE)
> {
> - DRM_ERROR("invalid wrap sz %d min %d max %zd\n",
> + DRM_ERROR("invalid wrap sz %d min %d max %ld\n",
> cfg->wrap_size, WRAP_MIN_SIZE, WRAP_MAX_SIZE);
> rc = -EINVAL;
> }
> @@ -302,7 +302,7 @@ static int validate_write_reg(struct
> dpu_reg_dma_setup_ops_cfg *cfg)
> }
> if ((SIZE_DWORD(cfg->data_size)) > MAX_DWORDS_SZ ||
> NOT_WORD_ALIGNED(cfg->data_size)) {
> - DRM_ERROR("Invalid data size %d max %zd align %x\n",
> + DRM_ERROR("Invalid data size %d max %ld align %x\n",
> cfg->data_size, MAX_DWORDS_SZ,
> NOT_WORD_ALIGNED(cfg->data_size));
> return -EINVAL;
> @@ -310,7 +310,7 @@ static int validate_write_reg(struct
> dpu_reg_dma_setup_ops_cfg *cfg)
>
> if (cfg->blk_offset > MAX_RELATIVE_OFF ||
> NOT_WORD_ALIGNED(cfg->blk_offset)) {
> - DRM_ERROR("invalid offset %d max %zd align %x\n",
> + DRM_ERROR("invalid offset %d max %ld align %x\n",
> cfg->blk_offset, MAX_RELATIVE_OFF,
> NOT_WORD_ALIGNED(cfg->blk_offset));
> return -EINVAL;
> @@ -374,7 +374,7 @@ static int validate_dma_cfg(struct
> dpu_reg_dma_setup_ops_cfg *cfg)
> }
>
> if (cfg->dma_buf->iova & GUARD_BYTES || !cfg->dma_buf->vaddr) {
> - DRM_ERROR("iova not aligned to %zx iova %llx kva %pK",
> + DRM_ERROR("iova not aligned to %lx iova %llx kva %pK",
> ADDR_ALIGN, cfg->dma_buf->iova,
> cfg->dma_buf->vaddr);
> return -EINVAL;
> @@ -433,7 +433,7 @@ static int validate_kick_off_v1(struct
> dpu_reg_dma_kickoff_cfg *cfg)
> (WRITE_TRIGGER);
>
> if (cfg->dma_buf->iova & GUARD_BYTES) {
> - DRM_ERROR("Address is not aligned to %zx iova %llx", ADDR_ALIGN,
> + DRM_ERROR("Address is not aligned to %lx iova %llx", ADDR_ALIGN,
> cfg->dma_buf->iova);
> return -EINVAL;
> }
> @@ -445,7 +445,7 @@ static int validate_kick_off_v1(struct
> dpu_reg_dma_kickoff_cfg *cfg)
>
> if (SIZE_DWORD(cfg->dma_buf->index) > MAX_DWORDS_SZ ||
> !cfg->dma_buf->index) {
> - DRM_ERROR("invalid dword size %zd max %zd\n",
> + DRM_ERROR("invalid dword size %zd max %ld\n",
> SIZE_DWORD(cfg->dma_buf->index), MAX_DWORDS_SZ);
> return -EINVAL;
> }
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> index e5051b9920a7..d87f752f786a 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> @@ -2641,19 +2641,20 @@ static int
> dpu_plane_atomic_set_property(struct drm_plane *plane,
> property);
> switch (idx) {
> case PLANE_PROP_CSC_V1:
> - _dpu_plane_set_csc_v1(pdpu, (void *)val);
> + _dpu_plane_set_csc_v1(pdpu,
> + u64_to_user_ptr(val));
> break;
> case PLANE_PROP_SCALER_V1:
> _dpu_plane_set_scaler_v1(pdpu, pstate,
> - (void *)val);
> + u64_to_user_ptr(val));
> break;
> case PLANE_PROP_SCALER_V2:
> _dpu_plane_set_scaler_v2(pdpu, pstate,
> - (void *)val);
> + u64_to_user_ptr(val));
> break;
> case PLANE_PROP_EXCL_RECT_V1:
> _dpu_plane_set_excl_rect_v1(pdpu, pstate,
> - (void *)val);
> + u64_to_user_ptr(val));
> break;
> default:
> /* nothing to do */
> diff --git a/drivers/gpu/drm/msm/dpu_dbg.c
> b/drivers/gpu/drm/msm/dpu_dbg.c
> index 341b5964ca18..54ea631ee6b3 100644
> --- a/drivers/gpu/drm/msm/dpu_dbg.c
> +++ b/drivers/gpu/drm/msm/dpu_dbg.c
> @@ -2048,8 +2048,9 @@ static void _dpu_dump_reg(const char *dump_name,
> u32 reg_dump_flag,
> return;
>
> if (in_log)
> - dev_info(dpu_dbg_base.dev, "%s: start_offset 0x%lx len 0x%zx\n",
> - dump_name, addr - base_addr, len_bytes);
> + dev_info(dpu_dbg_base.dev, "%s: start_offset %p len 0x%zx\n",
> + dump_name, (void*)(addr - base_addr),
> + len_bytes);
>
> len_align = (len_bytes + REG_DUMP_ALIGN - 1) / REG_DUMP_ALIGN;
> len_padded = len_align * REG_DUMP_ALIGN;
> @@ -2065,9 +2066,9 @@ static void _dpu_dump_reg(const char *dump_name,
> u32 reg_dump_flag,
> if (dump_mem && *dump_mem) {
> dump_addr = *dump_mem;
> dev_info(dpu_dbg_base.dev,
> - "%s: start_addr:0x%pK len:0x%x reg_offset=0x%lx\n",
> + "%s: start_addr:0x%pK len:0x%x reg_offset=%p\n",
> dump_name, dump_addr, len_padded,
> - addr - base_addr);
> + (void*)(addr - base_addr));
> } else {
> in_mem = 0;
> pr_err("dump_mem: kzalloc fails!\n");
> @@ -2087,8 +2088,9 @@ static void _dpu_dump_reg(const char *dump_name,
> u32 reg_dump_flag,
>
> if (in_log)
> dev_info(dpu_dbg_base.dev,
> - "0x%lx : %08x %08x %08x %08x\n",
> - addr - base_addr, x0, x4, x8, xc);
> + "%p : %08x %08x %08x %08x\n",
> + (void*)(addr - base_addr), x0, x4, x8,
> + xc);
>
> if (dump_addr) {
> dump_addr[i * 4] = x0;
> diff --git a/drivers/gpu/drm/msm/dsi/dsi_manager.c
> b/drivers/gpu/drm/msm/dsi/dsi_manager.c
> index 2a11f820f35a..000721fe5ab4 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_manager.c
> +++ b/drivers/gpu/drm/msm/dsi/dsi_manager.c
> @@ -311,7 +311,7 @@ static int dsi_mgr_connector_get_modes(struct
> drm_connector *connector)
> int id = dsi_mgr_connector_get_id(connector);
> struct msm_dsi *msm_dsi = dsi_mgr_get_dsi(id);
> struct drm_panel *panel = msm_dsi->panel;
> - int ret, num;
> + int num;
>
> if (!panel)
> return 0;
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next prev parent reply other threads:[~2018-04-20 21:18 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-20 16:07 [DPU PATCH] drm/msm: dpu: Fix build warnings Sean Paul
[not found] ` <20180420160719.54461-1-seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2018-04-20 21:18 ` abhinavk-sgV2jX0FEOL9JmXXK+q4OQ [this message]
2018-04-21 2:00 ` Jeykumar Sankaran
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