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X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH7PR03MB7833 X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean X-BeenThere: u-boot@lists.u-boot-project.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: U-Boot discussion List-Archive: List-Post: List-Help: List-Subscribe: , X-Spam-Status: No, score=-17.3 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_FAIL, SPF_HELO_NONE,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 On 16/10/2026 12:40 pm, Chen Huei Lok wrote: > From: Tien Fong Chee > > Fix a typo in the calibration-result debug log messages. > > Signed-off-by: Tien Fong Chee > Signed-off-by: Chen Huei Lok > --- > drivers/ddr/altera/sdram_n5x.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/ddr/altera/sdram_n5x.c b/drivers/ddr/altera/sdram_n5x.c > index d1f0a0d312e..244bf8ccb8c 100644 > --- a/drivers/ddr/altera/sdram_n5x.c > +++ b/drivers/ddr/altera/sdram_n5x.c > @@ -2341,7 +2341,7 @@ static void set_cal_res_to_rankctrl(u32 reg_addr, u16 update_value, > > debug("max value divided by 2 is 0x%x\n", update_value); > debug("umclt2 register 0x%x value is 0%x before ", reg_addr, reg); > - debug("update with train result\n"); > + debug("updating with train result\n"); > > value = (reg & mask) >> shift; > > @@ -2362,7 +2362,7 @@ static void set_cal_res_to_rankctrl(u32 reg_addr, u16 update_value, > > reg = readl((uintptr_t)reg_addr); > debug("umclt2 register 0x%x value is 0%x before ", reg_addr, reg); > - debug("update with train result\n"); > + debug("updating with train result\n"); > } > > /* helper function for updating train result to register */ > @@ -2375,7 +2375,7 @@ static void set_cal_res_to_reg(u32 reg_addr, u16 update_value, u32 mask, > > debug("max value divided by 2 is 0x%x\n", update_value); > debug("umclt2 register 0x%x value is 0%x before ", reg_addr, reg); > - debug("update with train result\n"); > + debug("updating with train result\n"); > > value = (reg & mask) >> shift; > > @@ -2386,7 +2386,7 @@ static void set_cal_res_to_reg(u32 reg_addr, u16 update_value, u32 mask, > > reg = readl((uintptr_t)reg_addr); > debug("umclt2 register 0x%x value is 0%x before ", reg_addr, reg); > - debug("update with train result\n"); > + debug("updating with train result\n"); > } > > static u16 get_max_txdqsdlytg0_ux_p0(struct ddr_handoff *handoff, u32 reg, Reviewed-by: Tien Fong Chee Best regards, Tien Fong