Re: [PATCH] net: dsa: qca8k: Disable mgmt Ethernet for qca8327

[Christian Marangi <ansuelsmth@gmail.com>]

On Wed, Aug 12, 2026 at 11:14:28AM +0200, Michał Kępień wrote:
> > > I came across this while migrating an AR9344-based router with a QCA8327
> > > rev. 4 switch to a DSA-aware driver.  This glitch is a pain in the neck
> > > to troubleshoot any further as it occurs randomly, anywhere between a
> > > minute to an hour after the switch is set up; traffic load exerted on
> > > the switch does not seem to matter as the problem can be triggered on a
> > > virtually idle device.  Previously working links are reported as going
> > > down (one by one, not all at once), even though port LEDs still blink;
> > > no traffic is forwarded; reloading qca8k does not alleviate the problem,
> > > only power cycling seems to help.  Nothing like this happens when only
> > > MDIO is used.  However, qca8k currently only uses MDIO as a fallback.  I
> > > figured that simpler is better and that mgmt Ethernet should simply be
> > > disabled for the qca8327, but I would be happy to work on some
> > > configurable solution if that would be preferable.
> > >
> > 
> > This is a long standing issue and it seems to me disabling mgmt is just a
> > big workaround to a real problem.
> 
> Understood.  Is it a long-standing issue for the QCA mgmt Ethernet code
> in general or for a specific subset of switches (or devices)?
>

specific subset of switches. On ipq806x the 8337 is mounted and mgmt works
correctly without issue.

One thing I notice on a different vendor (Airoha) is that sometimes using
these indirect way to access the Switch register might introduce
interesting HW bug.

One bug that was there was that when PBUS was used to access single port
PHY register (instead of direct MDIO) the link up/down was broken. My
theory was that the Switch chip had some latch logic that was only
triggered with MDIO. Using PBUS didn't trigger such thing.

Could be that the QCA 8327 switch also have some kind of HW bug where specific
register needs to go with MDIO or some refresh/latch logic are not
correctly triggered.

An idea might be to limit the mgmt to vlan and fdb and see if the problem
is still there. (after all those are the path where mgmt would benefit due
to the multiple register access required)
 
> > Long time ago it was reported that there seems to be a problem with the
> > mdio master register for external and internall access and how mgmt was
> > actually sending mdio command... just done by the switch. Could the 2 issue
> > related?
> 
> This thread?
> 
> https://lore.kernel.org/netdev/20250425151309.30493-1-kabel@kernel.org/
> 
> If so, that was for QCA8337, on a board where the external MDIO bus has
> an extra PHY attached, so it did not look like a match for my case.  Of
> course, it _might_ be related to the issue I'm running into, it just did
> not seem to be at first glance.
> 
> > One idea might be to verify that stuff gets actually written... as Andrew
> > said to verify if some packets doesn't get lost or just ignored.
> 
> Ack.
> 
> > Also as Andrew said I would still save this for the MIB part as the 2 thing
> > should be unrelated.
> 
> Got it, I'll play around with it and see what I can find out, thanks.
> 
> -- 
> Best regards,
> Michał Kępień

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