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[80.180.152.220]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a18bf1358asm352928215e9.4.2026.10.13.01.44.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 13 Oct 2026 01:44:47 -0700 (PDT) Message-ID: <6b222f11-e8f8-4df6-9caa-8e894d8fcc3c@gmail.com> Date: Tue, 13 Oct 2026 10:44:46 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] toradex: {aquila, smarc, verdin}-imx95: Enable caches in SPL To: ye.li@oss.nxp.com, festevam@gmail.com, u-boot@lists.u-boot-project.org, francesco.dolcini@toradex.com, emanuele.ghidoli@toradex.com Cc: peng.fan@nxp.com, uboot-imx@nxp.com, alice.guo@nxp.com, ye.li@nxp.com References: <20261010075951.3939861-1-ye.li@oss.nxp.com> <20261010075951.3939861-2-ye.li@oss.nxp.com> Content-Language: en-US From: Emanuele Ghidoli In-Reply-To: <20261010075951.3939861-2-ye.li@oss.nxp.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.u-boot-project.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.u-boot-project.org On 10/10/26 09:59, ye.li@oss.nxp.com wrote: > From: Ye Li > > To enable icache and dcache in SPL, add the definition of secure DDR > space which could be accessed by SPL and move arch_cpu_init before > spl_early_init. > > Signed-off-by: Ye Li > --- > board/toradex/aquila-imx95/spl.c | 4 ++-- > board/toradex/smarc-imx95/spl.c | 4 ++-- > board/toradex/verdin-imx95/spl.c | 4 ++-- > include/configs/aquila-imx95.h | 2 +- > include/configs/toradex-smarc-imx95.h | 3 +++ > include/configs/verdin-imx95.h | 3 +++ > 6 files changed, 13 insertions(+), 7 deletions(-) > > diff --git a/board/toradex/aquila-imx95/spl.c b/board/toradex/aquila-imx95/spl.c > [...] Hello Ye, Nit: spaces instead of tabs after the added #defines in toradex-smarc-imx95.h and verdin-imx95.h. Reviewed-by: Emanuele Ghidoli Tested-by: Emanuele Ghidoli