From: Krzysztof Kozlowski <krzk@kernel.org>
To: Fei Shao <fshao@chromium.org>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>
Cc: "Bjorn Helgaas" <bhelgaas@google.com>,
"Conor Dooley" <conor+dt@kernel.org>,
"Jianjun Wang" <jianjun.wang@mediatek.com>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Lorenzo Bianconi" <lorenzo@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
"Rob Herring" <robh@kernel.org>,
"Ryder Lee" <ryder.lee@mediatek.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org,
linux-pci@vger.kernel.org
Subject: Re: [PATCH 2/6] dt-bindings: PCI: mediatek-gen3: Allow exact number of clocks only
Date: Wed, 25 Sep 2024 15:59:13 +0200 [thread overview]
Message-ID: <6b5b463a-cf01-4e02-bb4e-292f5bd8b7f2@kernel.org> (raw)
In-Reply-To: <20240925110044.3678055-3-fshao@chromium.org>
On 25/09/2024 12:57, Fei Shao wrote:
> In MediaTek PCIe gen3 bindings, "clocks" accepts a range of 1-6 clocks
> across all SoCs. But in practice, each SoC requires a particular number
> of clocks as defined in "clock-names", and the length of "clocks" and
> "clock-names" can be inconsistent with current bindings.
>
> For example:
> - MT8188, MT8192 and MT8195 all require 6 clocks, while the bindings
> accept 4-6 clocks.
> - MT7986 requires 4 clocks, while the bindings accept 4-6 clocks.
>
> Update minItems and maxItems properties for individual SoCs as needed to
> only accept the correct number of clocks.
>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Best regards,
Krzysztof
next prev parent reply other threads:[~2024-09-25 14:00 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-25 10:57 [PATCH 0/6] MT8188 DT and binding fixes Fei Shao
2024-09-25 10:57 ` Fei Shao
2024-09-25 10:57 ` [PATCH 1/6] dt-bindings: power: mediatek: Add another nested power-domain layer Fei Shao
2024-09-25 10:57 ` Fei Shao
2024-09-25 10:57 ` [PATCH 2/6] dt-bindings: PCI: mediatek-gen3: Allow exact number of clocks only Fei Shao
2024-09-25 10:57 ` Fei Shao
2024-09-25 13:59 ` Krzysztof Kozlowski [this message]
2024-10-01 19:53 ` Bjorn Helgaas
2024-10-02 3:35 ` Fei Shao
2024-10-02 20:31 ` Bjorn Helgaas
2024-09-25 10:57 ` [PATCH 3/6] arm64: dts: mediatek: mt8188: Define CPU big core cluster Fei Shao
2024-09-25 10:57 ` Fei Shao
2024-09-26 8:33 ` AngeloGioacchino Del Regno
2024-09-26 10:41 ` Fei Shao
2024-09-25 10:57 ` [PATCH 4/6] arm64: dts: mediatek: mt8188: Add missing dma-ranges to soc node Fei Shao
2024-09-25 10:57 ` Fei Shao
2024-09-26 8:33 ` AngeloGioacchino Del Regno
2024-09-25 10:57 ` [PATCH 5/6] arm64: dts: mediatek: mt8188: Move vdec1 power domain under vdec0 Fei Shao
2024-09-25 10:57 ` Fei Shao
2024-09-26 8:33 ` AngeloGioacchino Del Regno
2024-09-26 10:42 ` Fei Shao
2024-09-30 9:35 ` Fei Shao
2024-09-25 10:57 ` [PATCH 6/6] arm64: dts: mediatek: mt8188: Update vppsys node names to syscon Fei Shao
2024-09-25 10:57 ` Fei Shao
2024-09-26 8:33 ` AngeloGioacchino Del Regno
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