From: Nicola Vetrini <nicola.vetrini@bugseng.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: sstabellini@kernel.org, michal.orzel@amd.com,
xenia.ragiadakou@amd.com, ayan.kumar.halder@amd.com,
consulting@bugseng.com, andrew.cooper3@citrix.com,
roger.pau@citrix.com,
Simone Ballarin <simone.ballarin@bugseng.com>,
Doug Goldstein <cardoe@cardoe.com>,
George Dunlap <george.dunlap@citrix.com>,
Julien Grall <julien@xen.org>, Wei Liu <wl@xen.org>,
xen-devel@lists.xenproject.org
Subject: Re: [XEN PATCH][for-4.19 v3 1/8] xen/include: add macro LOWEST_BIT
Date: Mon, 23 Oct 2023 15:19:35 +0200 [thread overview]
Message-ID: <6d113a237846c7a41aa083e806f172e7@bugseng.com> (raw)
In-Reply-To: <f23a1f95916bd61ddcd5002428d8876c@bugseng.com>
On 23/10/2023 11:19, Nicola Vetrini wrote:
> On 23/10/2023 09:48, Jan Beulich wrote:
>> On 20.10.2023 17:28, Nicola Vetrini wrote:
>>> --- a/automation/eclair_analysis/ECLAIR/deviations.ecl
>>> +++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
>>> @@ -246,6 +246,12 @@ constant expressions are required.\""
>>> "any()"}
>>> -doc_end
>>>
>>> +-doc_begin="The macro LOWEST_BIT encapsulates a well-known pattern
>>> to obtain the value
>>> +2^ffs(x) for unsigned integers on two's complement architectures
>>> +(all the architectures supported by Xen satisfy this requirement)."
>>> +-config=MC3R1.R10.1,reports+={safe,
>>> "any_area(any_loc(any_exp(macro(^LOWEST_BIT$))))"}
>>> +-doc_end
>>
>> This being deviated this way (rather than by SAF-* comments) wants
>> justifying in the description. You did reply to my respective
>> comment on v2, but such then (imo) needs propagating into the actual
>> patch as well.
>>
>
> Sure, will do.
>
>>> --- a/docs/misra/deviations.rst
>>> +++ b/docs/misra/deviations.rst
>>> @@ -192,6 +192,13 @@ Deviations related to MISRA C:2012 Rules:
>>> See automation/eclair_analysis/deviations.ecl for the full
>>> explanation.
>>> - Tagged as `safe` for ECLAIR.
>>>
>>> + * - R10.1
>>> + - The well-known pattern (x & -x) applied to unsigned integer
>>> values on 2's
>>> + complement architectures (i.e., all architectures supported
>>> by Xen), used
>>> + to obtain the value 2^ffs(x), where ffs(x) is the position of
>>> the first
>>> + bit set. If no bits are set, zero is returned.
>>> + - Tagged as `safe` for ECLAIR.
>>
>> In such an explanation there shall not be any ambiguity. Here I see
>> an issue with ffs() returning 1-based bit position numbers, which
>> isn't in line with the use in 2^ffs(x). (Arguably use of ^ itself is
>> also problematic, as that's XOR in C, not POW. I'd suggest 2^^ffs(x)
>> or 2**ffs(x).)
>>
>
> Makes sense, I think I'll use an plain english explanation to avoid
> any confusion
> about notation.
>
>>> --- a/xen/include/xen/macros.h
>>> +++ b/xen/include/xen/macros.h
>>> @@ -8,8 +8,11 @@
>>> #define DIV_ROUND(n, d) (((n) + (d) / 2) / (d))
>>> #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
>>>
>>> -#define MASK_EXTR(v, m) (((v) & (m)) / ((m) & -(m)))
>>> -#define MASK_INSR(v, m) (((v) * ((m) & -(m))) & (m))
>>> +/* Returns the 2^ffs(x) or 0, where ffs(x) is the index of the
>>> lowest set bit */
>>> +#define LOWEST_BIT(x) ((x) & -(x))
>>
>> I'm afraid my concern regarding this new macro's name (voiced on v2)
>> hasn't
>> been addressed (neither verbally nor by finding a more suitable name).
>>
>> Jan
>
> I didn't come up with much better names, so I left it as is. Here's a
> few ideas:
>
> - LOWEST_SET
> - MASK_LOWEST_SET
> - MASK_LOWEST_BIT
> - MASK_FFS_0
> - LOWEST_ONE
>
> and also yours, included here for convenience, even though you felt it
> was too long:
>
> - ISOLATE_LOW_BIT()
>
> All maintainers from THE REST are CC-ed, so we can see if anyone has
> any suggestion.
There's also LOWEST_BIT_MASK as another possible name.
--
Nicola Vetrini, BSc
Software Engineer, BUGSENG srl (https://bugseng.com)
next prev parent reply other threads:[~2023-10-23 13:20 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-20 15:28 [XEN PATCH][for-4.19 v3 0/8] address violations of MISRA C:2012 Rule 10.1 Nicola Vetrini
2023-10-20 15:28 ` [XEN PATCH][for-4.19 v3 1/8] xen/include: add macro LOWEST_BIT Nicola Vetrini
2023-10-20 17:03 ` Julien Grall
2023-10-23 7:31 ` Nicola Vetrini
2023-10-23 7:48 ` Jan Beulich
2023-10-23 9:19 ` Nicola Vetrini
2023-10-23 13:19 ` Nicola Vetrini [this message]
2023-10-23 13:45 ` Jan Beulich
2023-10-23 20:44 ` Stefano Stabellini
2023-10-24 6:14 ` Jan Beulich
2023-10-25 14:50 ` Nicola Vetrini
2023-10-25 15:33 ` Jan Beulich
2023-10-25 22:38 ` Stefano Stabellini
2023-10-26 6:52 ` Jan Beulich
2023-10-26 10:32 ` Nicola Vetrini
2023-10-26 11:37 ` Julien Grall
2023-10-26 23:02 ` Stefano Stabellini
2023-10-20 15:28 ` [XEN PATCH][for-4.19 v3 2/8] arm/bitops: encapsulate violation of MISRA C:2012 Rule 10.1 Nicola Vetrini
2023-10-20 15:28 ` [XEN PATCH][for-4.19 v3 3/8] xen/pdx: amend definition of PDX_GROUP_COUNT Nicola Vetrini
2023-10-20 15:28 ` [XEN PATCH][for-4.19 v3 4/8] x86_64/mm: express macro CNT using LOWEST_BIT Nicola Vetrini
2023-10-20 15:28 ` [XEN PATCH][for-4.19 v3 5/8] x86/io_apic: address violation of MISRA C:2012 Rule 10.1 Nicola Vetrini
2023-10-23 15:39 ` Jan Beulich
2023-10-20 15:28 ` [XEN PATCH][for-4.19 v3 6/8] x86/mce: Move MC_NCLASSES into the enum mctelem_class Nicola Vetrini
2023-10-20 15:28 ` [XEN PATCH][for-4.19 v3 7/8] xen/types: address Rule 10.1 for DECLARE_BITMAP use Nicola Vetrini
2023-10-23 22:55 ` Stefano Stabellini
2023-10-20 15:28 ` [XEN PATCH][for-4.19 v3 8/8] xen/compat: use BUILD_BUG_ON in CHECK_SIZE macros Nicola Vetrini
2023-10-23 13:19 ` Jan Beulich
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