From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?Q?Pawe=c5=82_Jarosz?= Date: Wed, 7 Jun 2017 17:07:36 +0200 Subject: [U-Boot] [PATCH 01/13] rockchip: rk3066: add grf header file In-Reply-To: References: Message-ID: <6f005b9d-3325-0677-3b65-9df005e2f6e7@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit To: u-boot@lists.denx.de Hi Simon W dniu 06.06.2017 o 23:09, Simon Glass pisze: > Hi Pawel, > > On 6 June 2017 at 12:48, Paweł Jarosz wrote: >> grf is needed by various drivers for rk3066 soc. >> >> Signed-off-by: Paweł Jarosz >> --- >> arch/arm/include/asm/arch-rockchip/grf_rk3066.h | 621 ++++++++++++++++++++++++ >> 1 file changed, 621 insertions(+) >> create mode 100644 arch/arm/include/asm/arch-rockchip/grf_rk3066.h >> >> diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3066.h b/arch/arm/include/asm/arch-rockchip/grf_rk3066.h >> new file mode 100644 >> index 0000000..96b4ca6 >> --- /dev/null >> +++ b/arch/arm/include/asm/arch-rockchip/grf_rk3066.h >> @@ -0,0 +1,621 @@ >> +/* >> + * Copyright (c) 2017 Paweł Jarosz >> + * >> + * SPDX-License-Identifier: GPL-2.0 >> + */ >> + >> +#ifndef _ASM_ARCH_GRF_RK3066_H >> +#define _ASM_ARCH_GRF_RK3066_H >> + >> +struct rk3066_grf_gpio_lh { >> + u32 l; >> + u32 h; >> +}; >> + >> +struct rk3066_grf { >> + struct rk3066_grf_gpio_lh gpio_dir[7]; >> + struct rk3066_grf_gpio_lh gpio_do[7]; >> + struct rk3066_grf_gpio_lh gpio_en[7]; >> + >> + u32 gpio0a_iomux; >> + u32 gpio0b_iomux; >> + u32 gpio0c_iomux; >> + u32 gpio0d_iomux; >> + >> + u32 gpio1a_iomux; >> + u32 gpio1b_iomux; >> + u32 gpio1c_iomux; >> + u32 gpio1d_iomux; >> + >> + u32 gpio2a_iomux; >> + u32 gpio2b_iomux; >> + u32 gpio2c_iomux; >> + u32 gpio2d_iomux; >> + >> + u32 gpio3a_iomux; >> + u32 gpio3b_iomux; >> + u32 gpio3c_iomux; >> + u32 gpio3d_iomux; >> + >> + u32 gpio4a_iomux; >> + u32 gpio4b_iomux; >> + u32 gpio4c_iomux; >> + u32 gpio4d_iomux; >> + >> + u32 reserved0[5]; >> + >> + u32 gpio6b_iomux; >> + >> + u32 reserved1[2]; >> + >> + struct rk3066_grf_gpio_lh gpio_pull[7]; >> + >> + u32 soc_con0; >> + u32 soc_con1; >> + u32 soc_con2; >> + >> + u32 soc_status0; >> + >> + u32 dmac1_con[3]; >> + u32 dmac2_con[4]; >> + >> + u32 uoc0_con[3]; >> + u32 uoc1_con[4]; >> + u32 ddrc_con; >> + u32 ddrc_stat; >> + >> + u32 reserved2[10]; >> + >> + u32 os_reg[4]; >> +}; >> +check_member(rk3066_grf, os_reg[3], 0x01d4); >> + >> +/* GRF_GPIO0A_IOMUX */ >> +enum { >> + GPIO0A6_SHIFT = 12, >> + GPIO0A6_MASK = 1, > Can you please use shifted masks for these values? > > GPIO0A6_MASK = 1 << GPIO0A6_SHIFT, I will do that in the next version. Regards Paweł