From: Jan Beulich <jbeulich@suse.com>
To: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Cc: "Romain Caritey" <Romain.Caritey@microchip.com>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Connor Davis" <connojdavis@gmail.com>,
"Andrew Cooper" <andrew.cooper3@citrix.com>,
"Anthony PERARD" <anthony.perard@vates.tech>,
"Michal Orzel" <michal.orzel@amd.com>,
"Julien Grall" <julien@xen.org>,
"Roger Pau Monné" <roger.pau@citrix.com>,
"Stefano Stabellini" <sstabellini@kernel.org>,
xen-devel@lists.xenproject.org
Subject: Re: [PATCH v4 07/11] xen/riscv: add Linux kernel loading support
Date: Wed, 6 May 2026 17:00:21 +0200 [thread overview]
Message-ID: <70979a5b-e66f-45f9-8557-eecd7113d7b7@suse.com> (raw)
In-Reply-To: <082f5c79-0cf9-4eef-b80c-e5e9b594576d@gmail.com>
On 06.05.2026 16:53, Oleksii Kurochko wrote:
>
>
> On 5/4/26 4:05 PM, Jan Beulich wrote:
>>> --- a/xen/include/xen/fdt-kernel.h
>>> +++ b/xen/include/xen/fdt-kernel.h
>>> @@ -59,8 +59,15 @@ struct kernel_info {
>>> struct {
>>> paddr_t kernel_addr;
>>> paddr_t len;
>>> -#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV_64)
>>> - paddr_t text_offset; /* 64-bit Image only */
>>> +#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV)
>>> + /*
>>> + * ARM: 64-bit Image only.
>>> + * RISC-V: both 32-bit and 64-bit Images.
>>> + */
>>> + paddr_t text_offset;
>>> +#endif
>>> +#if defined(CONFIG_RISCV)
>>> + uint64_t image_size; /* Effective size of Image */
>> As this (apparently) is for both RV64 and RV32 - can the latter really have
>> wider than 32-bit image sizes? If not - use size_t or unsigned long here?
>
> It seems like we want to have uint64_t as it is explicitly mentioned in
> image header:
>
> https://elixir.bootlin.com/linux/v7.0.1/source/arch/riscv/include/asm/image.h#L57
>
> and also it is used .dword here:
>
> https://elixir.bootlin.com/linux/v7.0.1/source/arch/riscv/kernel/head.S#L55
Well. The image header having a 64-bit wide field still raises the
question how the value being wider than 32 bits would work on RV32. IOW
for Xen internal purposes I expect unsigned long or size_t would be more
appropriate. When that value is taken from the image header and copied
into the internal struct, it would need checking for absence of
truncation.
Jan
next prev parent reply other threads:[~2026-05-06 15:00 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-28 14:33 [PATCH v4 00/11] RISCV: enable DOMAIN_BUILD_HELPERS Oleksii Kurochko
2026-04-28 14:33 ` [PATCH v4 01/11] xen: arm: fix len type for guest copy functions Oleksii Kurochko
2026-04-29 10:08 ` Luca Fancellu
2026-05-04 5:30 ` Jan Beulich
2026-05-05 8:27 ` Luca Fancellu
2026-05-05 9:05 ` Jan Beulich
2026-05-05 10:07 ` Luca Fancellu
2026-05-05 10:13 ` Jan Beulich
2026-05-05 10:16 ` Luca Fancellu
2026-04-28 14:33 ` [PATCH v4 02/11] xen/dom0less: rename kernel_zimage_probe() to kernel_image_probe() Oleksii Kurochko
2026-04-29 10:59 ` Luca Fancellu
2026-05-06 9:48 ` Oleksii Kurochko
2026-04-28 14:33 ` [PATCH v4 03/11] xen: move declaration of fw_unreserved_regions() to common header Oleksii Kurochko
2026-04-29 15:01 ` Luca Fancellu
2026-04-28 14:33 ` [PATCH v4 04/11] xen: introduce domain-layout.h with common domain_use_host_layout() Oleksii Kurochko
2026-04-29 15:10 ` Luca Fancellu
2026-05-06 10:26 ` Oleksii Kurochko
2026-05-04 12:59 ` Jan Beulich
2026-05-06 15:47 ` Oleksii Kurochko
2026-05-07 7:25 ` Jan Beulich
2026-05-07 7:37 ` Oleksii Kurochko
2026-04-28 14:33 ` [PATCH v4 05/11] xen: rename p2m_ipa_bits to p2m_gpa_bits Oleksii Kurochko
2026-04-29 15:15 ` Luca Fancellu
2026-05-06 10:32 ` Oleksii Kurochko
2026-04-28 14:33 ` [PATCH v4 06/11] xen/riscv: implement copy_to_guest_phys() Oleksii Kurochko
2026-04-28 14:33 ` [PATCH v4 07/11] xen/riscv: add Linux kernel loading support Oleksii Kurochko
2026-05-04 14:05 ` Jan Beulich
2026-05-06 11:57 ` Oleksii Kurochko
2026-05-06 12:45 ` Jan Beulich
2026-05-06 13:43 ` Oleksii Kurochko
2026-05-06 14:02 ` Jan Beulich
2026-05-06 14:53 ` Oleksii Kurochko
2026-05-06 15:00 ` Jan Beulich [this message]
2026-04-28 14:33 ` [PATCH v4 08/11] xen/riscv: rework G-stage mode handling Oleksii Kurochko
2026-05-04 14:23 ` Jan Beulich
2026-05-06 14:03 ` Oleksii Kurochko
2026-04-28 14:33 ` [PATCH v4 09/11] xen/riscv: introduce p2m_gpa_bits Oleksii Kurochko
2026-04-28 14:33 ` [PATCH v4 10/11] xen/riscv: add definition of guest RAM banks Oleksii Kurochko
2026-04-28 14:33 ` [PATCH v4 11/11] xen/riscv: enable DOMAIN_BUILD_HELPERS Oleksii Kurochko
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=70979a5b-e66f-45f9-8557-eecd7113d7b7@suse.com \
--to=jbeulich@suse.com \
--cc=Romain.Caritey@microchip.com \
--cc=alistair.francis@wdc.com \
--cc=andrew.cooper3@citrix.com \
--cc=anthony.perard@vates.tech \
--cc=connojdavis@gmail.com \
--cc=julien@xen.org \
--cc=michal.orzel@amd.com \
--cc=oleksii.kurochko@gmail.com \
--cc=roger.pau@citrix.com \
--cc=sstabellini@kernel.org \
--cc=xen-devel@lists.xenproject.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.