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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <6a54806f-061b-4b76-b42d-6fa5b54581e4@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1788864945-7468B4E9-0B25B350/0/0 X-purgate-type: clean X-purgate-size: 3748 On 08.09.2026 12:08, Andrew Cooper wrote: > On 08/09/2026 7:26 am, Jan Beulich wrote: >> On 07.09.2026 23:32, Andrew Cooper wrote: >>> @@ -273,6 +274,44 @@ static bool microcode_fits_cpu(const struct microcode_patch *mc) >>> return false; >>> } >>> >>> +static bool microcode_safe_to_load(const struct microcode_patch *mc) >>> +{ >>> + struct cpu_signature *cpu_sig = &this_cpu(cpu_sig); >>> + >>> + /* >>> + * Treat pre-production as always safe - anyone using pre-production >>> + * microcode knows what they are doing, and can keep any resulting pieces. >>> + */ >>> + if ( (int)cpu_sig->rev < 0 || mc->rev < 0 ) >>> + return true; >>> + >>> + /* >>> + * GNR98 states that Granite Rapids systems hang when loading new ucode on >>> + * sufficiently old firmware. GNR101 retroactively declares that one >>> + * ucode had incorrect min_rev fields, in light of discovering GNR98. >> We still have no min_rev field, so imo a reference to it wants some >> clarification. > > No, I don't think so.  The fact Xen has no min_rev field (yet) has no > baring on the wording of GNR101. The wording there is "Minimum Runtime Microcode Update Revision". As long as we don't have a field of the name, how can such a comment be unambiguous? >>> + * Both are incomplete statements of the problem. >>> + * >>> + * At the time of writing (August 2026), the believed safe sequence is: >>> + * 0x01000370 -> [0x01000380...0x010003f3] -> 0x01000405 -> any later >>> + * >>> + * Disallow known-unsafe loads while permitting believed-safe loads. For >>> + * GNR, this allows multi-hop loading to get up to the latest. >>> + */ >>> + if ( boot_cpu_data.vfm == INTEL_GRANITERAPIDS_X && >>> + boot_cpu_data.stepping == 1 && (cpu_sig->pf & 0x95) && >>> + ((cpu_sig->rev < 0x01000380 && mc->rev >= 0x01000405) || >> This is odd: The lhs of && uses the lower bound of the inner permitted >> range, while the rhs of the && doesn't use the upper one. If it's intended >> that way, I think this also needs clarifying in the comment. Otherwise imo >> lhs and rhs better would be consistent in this regard. > > It is intentional.  Furthermore, it is the only coherent way of > expressing the sequence as given. > > I'm not writing a comment explaining why it's a good idea to use the > same boundary numerals between the comment and the code.  It goes > without saying. But that's the problem - code and comment are not (obviously) in sync. > I'm also not interested about pureness concerns about inner vs outer > bounds.  I can't see a change here that won't make it worse. So why are ((cpu_sig->rev <= 0x01000370 && mc->rev >= 0x01000405) || and ((cpu_sig->rev < 0x01000380 && mc->rev > 0x010003f3) || both worse? Both 0x01000370 ... 0x01000380 and 0x010003f3 ... 0x01000405 are discontiguous, which is bad enough. If then you pick apparently randomly (and in any event inconsistently) from the possible boundaries, how can that help the situation (and be "the only coherent way of expressing the sequence as given")? Even if it's merely a matter of us disagreeing on what "consistent" or "coherent" would be here, doesn't me as the first reader not easily spotting the "coherency" you claim already indicate there is a (possible) issue? (For context: Whichever way the expressions are going to end up, they'll make implicit statements on the gaps, i.e. on the non-public 0x01000371 ... 0x0100037f and 0x010003f4 ... 0x01000404. You may say that doesn't matter, because of their non-publicness, but that won't make that implicit statement go away.) Jan