From mboxrd@z Thu Jan 1 00:00:00 1970 From: vnkgutta@codeaurora.org Subject: Re: [PATCH v2 4/4] dt-bindigs: msm: Update documentation of qcom,llcc Date: Wed, 22 Aug 2018 14:46:32 -0700 Message-ID: <713d4db0899096456befe8dbe94a4997@codeaurora.org> References: <1534550915-18230-1-git-send-email-vnkgutta@codeaurora.org> <1534550915-18230-5-git-send-email-vnkgutta@codeaurora.org> <20180820195341.GA3358@bogus> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20180820195341.GA3358@bogus> Sender: linux-kernel-owner@vger.kernel.org To: Rob Herring Cc: mchehab@kernel.org, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Gross , David Brown , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, tsoni@codeaurora.org, ckadabi@codeaurora.org, rishabhb@codeaurora.org, bp@alien8.de, evgreen@chromium.org List-Id: linux-arm-msm@vger.kernel.org On 2018-08-20 12:53, Rob Herring wrote: > On Fri, Aug 17, 2018 at 05:08:35PM -0700, Venkata Narendra Kumar Gutta > wrote: >> Add reg-names and interrupts for LLCC documentation and the usage >> examples. llcc broadcast base is added in addition to llcc base, >> which is used for llcc broadcast writes. > > Typo in the subject. > > This binding just landed recently and it's already being updated? Sigh. > Bindings should be complete from the start. Technically, you can't add > new required properties. Sure, I'll correct the typo. llcc broadcast base was being computed from the number of banks which was incorrect, so we have to add this property. And the interrupt is needed for EDAC functionality. > >> >> Signed-off-by: Venkata Narendra Kumar Gutta >> --- >> Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt | 15 >> ++++++++++++++- >> 1 file changed, 14 insertions(+), 1 deletion(-) >> >> diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt >> b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt >> index 5e85749..b4b1c86 100644 >> --- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt >> +++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt >> @@ -18,9 +18,22 @@ Properties: >> Value Type: >> Definition: Start address and the the size of the register region. >> >> +- reg-names: >> + Usage: required >> + Value Type: >> + Definition: Register region names. Must be "llcc_base", >> "llcc_bcast_base". > > reg needs to be updated that there are 2 entries. Ok, I'll update this in the next version. > >> + >> +- interrupts: >> + Usage: required >> + Definition: The interrupt is associated with the llcc edac device. >> + It's used for llcc cache single and double bit error detection >> + and reporting. >> + >> Example: >> >> cache-controller@1100000 { >> compatible = "qcom,sdm845-llcc"; >> - reg = <0x1100000 0x250000>; >> + reg = <0x1100000 0x200000>, <0x1300000 0x50000> ; >> + reg-names = "llcc_base", "llcc_bcast_base"; >> + interrupts = ; >> }; >> -- >> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora >> Forum, >> a Linux Foundation Collaborative Project >> From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [v2,4/4] dt-bindigs: msm: Update documentation of qcom,llcc From: Venkata Narendra Kumar Gutta Message-Id: <713d4db0899096456befe8dbe94a4997@codeaurora.org> Date: Wed, 22 Aug 2018 14:46:32 -0700 To: Rob Herring Cc: mchehab@kernel.org, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Gross , David Brown , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, tsoni@codeaurora.org, ckadabi@codeaurora.org, rishabhb@codeaurora.org, bp@alien8.de, evgreen@chromium.org List-ID: T24gMjAxOC0wOC0yMCAxMjo1MywgUm9iIEhlcnJpbmcgd3JvdGU6Cj4gT24gRnJpLCBBdWcgMTcs IDIwMTggYXQgMDU6MDg6MzVQTSAtMDcwMCwgVmVua2F0YSBOYXJlbmRyYSBLdW1hciBHdXR0YSAK PiB3cm90ZToKPj4gQWRkIHJlZy1uYW1lcyBhbmQgaW50ZXJydXB0cyBmb3IgTExDQyBkb2N1bWVu dGF0aW9uIGFuZCB0aGUgdXNhZ2UKPj4gZXhhbXBsZXMuIGxsY2MgYnJvYWRjYXN0IGJhc2UgaXMg YWRkZWQgaW4gYWRkaXRpb24gdG8gbGxjYyBiYXNlLAo+PiB3aGljaCBpcyB1c2VkIGZvciBsbGNj IGJyb2FkY2FzdCB3cml0ZXMuCj4gCj4gVHlwbyBpbiB0aGUgc3ViamVjdC4KPiAKPiBUaGlzIGJp bmRpbmcganVzdCBsYW5kZWQgcmVjZW50bHkgYW5kIGl0J3MgYWxyZWFkeSBiZWluZyB1cGRhdGVk PyBTaWdoLgo+IEJpbmRpbmdzIHNob3VsZCBiZSBjb21wbGV0ZSBmcm9tIHRoZSBzdGFydC4gVGVj aG5pY2FsbHksIHlvdSBjYW4ndCBhZGQKPiBuZXcgcmVxdWlyZWQgcHJvcGVydGllcy4KClN1cmUs IEknbGwgY29ycmVjdCB0aGUgdHlwby4KCmxsY2MgYnJvYWRjYXN0IGJhc2Ugd2FzIGJlaW5nIGNv bXB1dGVkIGZyb20gdGhlIG51bWJlciBvZiBiYW5rcyB3aGljaCAKd2FzIGluY29ycmVjdCwKc28g d2UgaGF2ZSB0byBhZGQgdGhpcyBwcm9wZXJ0eS4KCkFuZCB0aGUgaW50ZXJydXB0IGlzIG5lZWRl ZCBmb3IgRURBQyBmdW5jdGlvbmFsaXR5LgoKPiAKPj4gCj4+IFNpZ25lZC1vZmYtYnk6IFZlbmth dGEgTmFyZW5kcmEgS3VtYXIgR3V0dGEgPHZua2d1dHRhQGNvZGVhdXJvcmEub3JnPgo+PiAtLS0K Pj4gIERvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9hcm0vbXNtL3Fjb20sbGxjYy50 eHQgfCAxNSAKPj4gKysrKysrKysrKysrKystCj4+ICAxIGZpbGUgY2hhbmdlZCwgMTQgaW5zZXJ0 aW9ucygrKSwgMSBkZWxldGlvbigtKQo+PiAKPj4gZGlmZiAtLWdpdCBhL0RvY3VtZW50YXRpb24v ZGV2aWNldHJlZS9iaW5kaW5ncy9hcm0vbXNtL3Fjb20sbGxjYy50eHQgCj4+IGIvRG9jdW1lbnRh dGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL2FybS9tc20vcWNvbSxsbGNjLnR4dAo+PiBpbmRleCA1 ZTg1NzQ5Li5iNGIxYzg2IDEwMDY0NAo+PiAtLS0gYS9Eb2N1bWVudGF0aW9uL2RldmljZXRyZWUv YmluZGluZ3MvYXJtL21zbS9xY29tLGxsY2MudHh0Cj4+ICsrKyBiL0RvY3VtZW50YXRpb24vZGV2 aWNldHJlZS9iaW5kaW5ncy9hcm0vbXNtL3Fjb20sbGxjYy50eHQKPj4gQEAgLTE4LDkgKzE4LDIy IEBAIFByb3BlcnRpZXM6Cj4+ICAJVmFsdWUgVHlwZTogPHByb3AtZW5jb2RlZC1hcnJheT4KPj4g IAlEZWZpbml0aW9uOiBTdGFydCBhZGRyZXNzIGFuZCB0aGUgdGhlIHNpemUgb2YgdGhlIHJlZ2lz dGVyIHJlZ2lvbi4KPj4gCj4+ICstIHJlZy1uYW1lczoKPj4gKyAgICAgICAgVXNhZ2U6IHJlcXVp cmVkCj4+ICsgICAgICAgIFZhbHVlIFR5cGU6IDxzdHJpbmdsaXN0Pgo+PiArICAgICAgICBEZWZp bml0aW9uOiBSZWdpc3RlciByZWdpb24gbmFtZXMuIE11c3QgYmUgImxsY2NfYmFzZSIsIAo+PiAi bGxjY19iY2FzdF9iYXNlIi4KPiAKPiByZWcgbmVlZHMgdG8gYmUgdXBkYXRlZCB0aGF0IHRoZXJl IGFyZSAyIGVudHJpZXMuCgpPaywgSSdsbCB1cGRhdGUgdGhpcyBpbiB0aGUgbmV4dCB2ZXJzaW9u LgoKPiAKPj4gKwo+PiArLSBpbnRlcnJ1cHRzOgo+PiArCVVzYWdlOiByZXF1aXJlZAo+PiArCURl ZmluaXRpb246IFRoZSBpbnRlcnJ1cHQgaXMgYXNzb2NpYXRlZCB3aXRoIHRoZSBsbGNjIGVkYWMg ZGV2aWNlLgo+PiArCQkJSXQncyB1c2VkIGZvciBsbGNjIGNhY2hlIHNpbmdsZSBhbmQgZG91Ymxl IGJpdCBlcnJvciBkZXRlY3Rpb24KPj4gKwkJCWFuZCByZXBvcnRpbmcuCj4+ICsKPj4gIEV4YW1w bGU6Cj4+IAo+PiAgCWNhY2hlLWNvbnRyb2xsZXJAMTEwMDAwMCB7Cj4+ICAJCWNvbXBhdGlibGUg PSAicWNvbSxzZG04NDUtbGxjYyI7Cj4+IC0JCXJlZyA9IDwweDExMDAwMDAgMHgyNTAwMDA+Owo+ PiArCQlyZWcgPSA8MHgxMTAwMDAwIDB4MjAwMDAwPiwgPDB4MTMwMDAwMCAweDUwMDAwPiA7Cj4+ ICsJCXJlZy1uYW1lcyA9ICJsbGNjX2Jhc2UiLCAibGxjY19iY2FzdF9iYXNlIjsKPj4gKwkJaW50 ZXJydXB0cyA9IDxHSUNfU1BJIDU4MiBJUlFfVFlQRV9MRVZFTF9ISUdIPjsKPj4gIAl9Owo+PiAt LQo+PiBUaGUgUXVhbGNvbW0gSW5ub3ZhdGlvbiBDZW50ZXIsIEluYy4gaXMgYSBtZW1iZXIgb2Yg dGhlIENvZGUgQXVyb3JhIAo+PiBGb3J1bSwKPj4gYSBMaW51eCBGb3VuZGF0aW9uIENvbGxhYm9y YXRpdmUgUHJvamVjdAo+Pgo=