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From: Vadim Fedorenko <vadim.fedorenko@linux.dev>
To: Ivan Vecera <ivecera@redhat.com>, netdev@vger.kernel.org
Cc: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
	Jakub Kicinski <kuba@kernel.org>, Jiri Pirko <jiri@resnulli.us>,
	Min Li <min.li@microchip.com>, Paolo Abeni <pabeni@redhat.com>,
	Petr Oros <poros@redhat.com>,
	Richard Cochran <richardcochran@gmail.com>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next v7 1/3] dpll: zl3073x: scale poll interval proportionally to timeout
Date: Wed, 12 Aug 2026 11:05:46 +0100	[thread overview]
Message-ID: <7178de38-aede-48d2-b6d4-031ce09a21d1@linux.dev> (raw)
In-Reply-To: <20260811134700.1211010-2-ivecera@redhat.com>

On 11/08/2026 14:46, Ivan Vecera wrote:
> Replace the fixed 10 us poll sleep in zl3073x_poll_zero_u8() with
> timeout_us / 50, scaling the sleep interval proportionally to the
> timeout for all callers.
> 
> Testing showed that existing callers (mailbox, HWREG, DF read,
> frequency measurement and phase error polls with 25-50 ms timeouts)
> typically completed in low hundreds of sleep cycles with the fixed
> 10 us interval. With the scaled interval the cycle count drops to
> single digits. The longer PTP-related timeouts (up to 3000 ms for
> phase step) added in the following patches benefit most, avoiding
> on the order of 10^5 bus transactions per wait.
> 
> Signed-off-by: Ivan Vecera <ivecera@redhat.com>
> ---
>   drivers/dpll/zl3073x/core.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/dpll/zl3073x/core.c b/drivers/dpll/zl3073x/core.c
> index 5b2d77f2c2288e..2e8b52c8de5e26 100644
> --- a/drivers/dpll/zl3073x/core.c
> +++ b/drivers/dpll/zl3073x/core.c
> @@ -322,7 +322,7 @@ int zl3073x_write_u48(struct zl3073x_dev *zldev, unsigned int reg, u64 val)
>   int zl3073x_poll_zero_u8(struct zl3073x_dev *zldev, unsigned int reg,
>   			 u8 mask, unsigned int timeout_us)
>   {
> -#define ZL_POLL_SLEEP_US 10
> +	unsigned int sleep_us = timeout_us / 50;
>   	unsigned int val;
>   
>   	/* Check the register is 8bit */
> @@ -336,7 +336,7 @@ int zl3073x_poll_zero_u8(struct zl3073x_dev *zldev, unsigned int reg,
>   	reg = ZL_REG_ADDR(reg) + ZL_RANGE_OFFSET;
>   
>   	return regmap_read_poll_timeout(zldev->regmap, reg, val, !(val & mask),
> -					ZL_POLL_SLEEP_US, timeout_us);
> +					sleep_us, timeout_us);
>   }
>   
>   int zl3073x_mb_op(struct zl3073x_dev *zldev, unsigned int op_reg, u8 op_val,

Reviewed-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>

  reply	other threads:[~2026-08-12 10:05 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-11 13:46 [PATCH net-next v7 0/3] dpll: zl3073x: add PTP clock support Ivan Vecera
2026-08-11 13:46 ` [PATCH net-next v7 1/3] dpll: zl3073x: scale poll interval proportionally to timeout Ivan Vecera
2026-08-12 10:05   ` Vadim Fedorenko [this message]
2026-08-11 13:46 ` [PATCH net-next v7 2/3] dpll: zl3073x: add channel ToD, phase step and TIE operations Ivan Vecera
2026-08-12  6:57   ` Ivan Vecera
2026-08-12 10:04     ` Vadim Fedorenko
2026-08-12 11:00       ` Ivan Vecera
2026-08-11 13:47 ` [PATCH net-next v7 3/3] dpll: zl3073x: add PTP clock support Ivan Vecera
2026-08-12  6:58   ` Ivan Vecera

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