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b=NISHE6MXoK8tfRV9S8pt+leeucFZ70wxemyKXKi9pRF+a6WzkAGIquNAVMhKf2cnG YN5MOUGglqn76zKkmoH/lrTvgp8y8TAQJXrZIOd3X/VQwwzBZWwBnHnDKY54P56KGx XcB6sQ8EvgaaZQZkMHg5IsZzaH4wlCvxsA87d9poVrwV3A8tkMtbM4j6rgTVkkVLdi TNjJawi4Hvre/DNptnvZk6d650ymJ9y+B5x7pjivv+j2W/GEJ6aEu2cemVW7T2VGaX WTpk7L2R3bDnuaKMlcpG8Ff9O4/81GyOFLTUht1LMBFiTKMMjYE7AOQxcDFQzKDG2D 8CH2GwMt2fcoA== Received: from [192.168.72.167] (210-10-213-150.per.static-ipl.aapt.com.au [210.10.213.150]) by mail.codeconstruct.com.au (Postfix) with ESMTPSA id 3163E6002E; Tue, 31 Mar 2026 15:17:28 +0800 (AWST) Message-ID: <72517fcf99a7453841ee75243dc54e735c10238f.camel@codeconstruct.com.au> Subject: Re: [PATCH v28 2/4] dt-bindings: i2c: ast2600-i2c.yaml: Add global-regs and enable-dma properties From: Jeremy Kerr To: Ryan Chen , Krzysztof Kozlowski Cc: "andriy.shevchenko@linux.intel.com" , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , Benjamin Herrenschmidt , Philipp Zabel , "linux-i2c@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-aspeed@lists.ozlabs.org" , "linux-kernel@vger.kernel.org" , "openbmc@lists.ozlabs.org" Date: Tue, 31 Mar 2026 15:17:28 +0800 In-Reply-To: References: <20260330-upstream_i2c-v28-0-17bdae39c5cb@aspeedtech.com> <20260330-upstream_i2c-v28-2-17bdae39c5cb@aspeedtech.com> <20260331-fanatic-certain-bustard-fb13bc@quoll> <09cbc12bea5707f794e139ea1bfafac82c2d2c12.camel@codeconstruct.com.au> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.46.4-2+deb12u1 X-Mailing-List: linux-aspeed@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 Hi Ryan, > > Sounds reasonable, but before you do so, how are you planning to manage= the > > allocation of DMA channels across multiple i2c peripherals? > >=20 > The AST2600 I2C hardware has only one can use DMA at a time. > To avoid the complexity of managing DMA channel contention, > I plan to use buffer mode by default for all controllers, which still pro= vides > better performance than byte mode without requiring DMA channel allocatio= n. OK, but your wording there ("by default") implies that DMA is still selectable for one controller peripheral. In which case: you still have the problem of managing DMA channel contention, but now it's at runtime instead. So my question still stands: how are you planning to enforce that DMA is only enabled for one controller? Or are you planning to disable I2C DMA entirely on AST2600? Cheers, Jeremy