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decoding support From: Paul Kocialkowski To: Maxime Ripard , hans.verkuil@cisco.com, acourbot@chromium.org, sakari.ailus@linux.intel.com, Laurent Pinchart Date: Wed, 10 Apr 2019 15:45:07 +0200 In-Reply-To: <157519b5571e24c9ef4189d30f8434b5b61121b1.1554382670.git-series.maxime.ripard@bootlin.com> References: <157519b5571e24c9ef4189d30f8434b5b61121b1.1554382670.git-series.maxime.ripard@bootlin.com> Organization: Bootlin User-Agent: Evolution 3.32.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190410_064513_200304_5E047B1D X-CRM114-Status: GOOD ( 19.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jernej Skrabec , jonas@kwiboo.se, jenskuske@gmail.com, linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org, jernej.skrabec@gmail.com, tfiga@chromium.org, Chen-Yu Tsai , posciak@chromium.org, Thomas Petazzoni , nicolas.dufresne@collabora.com, ezequiel@collabora.com, linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org SGksCgpMZSBqZXVkaSAwNCBhdnJpbCAyMDE5IMOgIDE0OjU5ICswMjAwLCBNYXhpbWUgUmlwYXJk IGEgw6ljcml0IDoKPiBJbnRyb2R1Y2Ugc29tZSBiYXNpYyBIMjY0IGRlY29kaW5nIHN1cHBvcnQg aW4gY2VkcnVzLiBTbyBmYXIsIG9ubHkgdGhlCj4gYmFzZWxpbmUgcHJvZmlsZSB2aWRlb3MgaGF2 ZSBiZWVuIHRlc3RlZCwgYW5kIHNvbWUgbW9yZSBhZHZhbmNlZCBmZWF0dXJlcwo+IHVzZWQgaW4g aGlnaGVyIHByb2ZpbGVzIGFyZSBub3QgZXZlbiBpbXBsZW1lbnRlZC4KCldpdGggdGhlIGNoYW5n ZSB0byByZW5hbWUgVjRMMl9QSVhfRk1UX0gyNjRfU0xJQ0VfUkFXIGFuZCBtYWtlIGl0CnByaXZh dGUsIHRoaXMgaXM6CgpSZXZpZXdlZC1ieTogUGF1bCBLb2NpYWxrb3dza2kgPHBhdWwua29jaWFs a293c2tpQGJvb3RsaW4uY29tPgoKQ2hlZXJzLAoKUGF1bAoKPiBSZXZpZXdlZC1ieTogSmVybmVq IFNrcmFiZWMgPGplcm5lai5za3JhYmVjQHNpb2wubmV0Pgo+IFNpZ25lZC1vZmYtYnk6IE1heGlt ZSBSaXBhcmQgPG1heGltZS5yaXBhcmRAYm9vdGxpbi5jb20+Cj4gLS0tCj4gIGRyaXZlcnMvc3Rh Z2luZy9tZWRpYS9zdW54aS9jZWRydXMvTWFrZWZpbGUgICAgICAgfCAgIDMgKy0KPiAgZHJpdmVy cy9zdGFnaW5nL21lZGlhL3N1bnhpL2NlZHJ1cy9jZWRydXMuYyAgICAgICB8ICAzMSArLQo+ICBk cml2ZXJzL3N0YWdpbmcvbWVkaWEvc3VueGkvY2VkcnVzL2NlZHJ1cy5oICAgICAgIHwgIDM4ICst Cj4gIGRyaXZlcnMvc3RhZ2luZy9tZWRpYS9zdW54aS9jZWRydXMvY2VkcnVzX2RlYy5jICAgfCAg MTMgKy0KPiAgZHJpdmVycy9zdGFnaW5nL21lZGlhL3N1bnhpL2NlZHJ1cy9jZWRydXNfaDI2NC5j ICB8IDU3NCArKysrKysrKysrKysrKystCj4gIGRyaXZlcnMvc3RhZ2luZy9tZWRpYS9zdW54aS9j ZWRydXMvY2VkcnVzX2h3LmMgICAgfCAgIDQgKy0KPiAgZHJpdmVycy9zdGFnaW5nL21lZGlhL3N1 bnhpL2NlZHJ1cy9jZWRydXNfcmVncy5oICB8ICA5MSArKy0KPiAgZHJpdmVycy9zdGFnaW5nL21l ZGlhL3N1bnhpL2NlZHJ1cy9jZWRydXNfdmlkZW8uYyB8ICAgOSArLQo+ICA4IGZpbGVzIGNoYW5n ZWQsIDc2MSBpbnNlcnRpb25zKCspLCAyIGRlbGV0aW9ucygtKQo+ICBjcmVhdGUgbW9kZSAxMDA2 NDQgZHJpdmVycy9zdGFnaW5nL21lZGlhL3N1bnhpL2NlZHJ1cy9jZWRydXNfaDI2NC5jCj4gCj4g ZGlmZiAtLWdpdCBhL2RyaXZlcnMvc3RhZ2luZy9tZWRpYS9zdW54aS9jZWRydXMvTWFrZWZpbGUg Yi9kcml2ZXJzL3N0YWdpbmcvbWVkaWEvc3VueGkvY2VkcnVzL01ha2VmaWxlCj4gaW5kZXggODA4 ODQyZjAxMTllLi5jODVhYzZkYjAzMDIgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9zdGFnaW5nL21l ZGlhL3N1bnhpL2NlZHJ1cy9NYWtlZmlsZQo+ICsrKyBiL2RyaXZlcnMvc3RhZ2luZy9tZWRpYS9z dW54aS9jZWRydXMvTWFrZWZpbGUKPiBAQCAtMSw0ICsxLDUgQEAKPiAgIyBTUERYLUxpY2Vuc2Ut SWRlbnRpZmllcjogR1BMLTIuMAo+ICBvYmotJChDT05GSUdfVklERU9fU1VOWElfQ0VEUlVTKSAr PSBzdW54aS1jZWRydXMubwo+ICAKPiAtc3VueGktY2VkcnVzLXkgPSBjZWRydXMubyBjZWRydXNf dmlkZW8ubyBjZWRydXNfaHcubyBjZWRydXNfZGVjLm8gY2VkcnVzX21wZWcyLm8KPiArc3VueGkt Y2VkcnVzLXkgPSBjZWRydXMubyBjZWRydXNfdmlkZW8ubyBjZWRydXNfaHcubyBjZWRydXNfZGVj Lm8gXAo+ICsJCSBjZWRydXNfbXBlZzIubyBjZWRydXNfaDI2NC5vCj4gZGlmZiAtLWdpdCBhL2Ry aXZlcnMvc3RhZ2luZy9tZWRpYS9zdW54aS9jZWRydXMvY2VkcnVzLmMgYi9kcml2ZXJzL3N0YWdp bmcvbWVkaWEvc3VueGkvY2VkcnVzL2NlZHJ1cy5jCj4gaW5kZXggYjk4YWRkM2NkZWRkLi5kNjEz ZjVjMjRhMmYgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9zdGFnaW5nL21lZGlhL3N1bnhpL2NlZHJ1 cy9jZWRydXMuYwo+ICsrKyBiL2RyaXZlcnMvc3RhZ2luZy9tZWRpYS9zdW54aS9jZWRydXMvY2Vk cnVzLmMKPiBAQCAtNDAsNiArNDAsMzYgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBjZWRydXNfY29u dHJvbCBjZWRydXNfY29udHJvbHNbXSA9IHsKPiAgCQkuY29kZWMJCT0gQ0VEUlVTX0NPREVDX01Q RUcyLAo+ICAJCS5yZXF1aXJlZAk9IGZhbHNlLAo+ICAJfSwKPiArCXsKPiArCQkuaWQJCT0gVjRM Ml9DSURfTVBFR19WSURFT19IMjY0X0RFQ09ERV9QQVJBTVMsCj4gKwkJLmVsZW1fc2l6ZQk9IHNp emVvZihzdHJ1Y3QgdjRsMl9jdHJsX2gyNjRfZGVjb2RlX3BhcmFtcyksCj4gKwkJLmNvZGVjCQk9 IENFRFJVU19DT0RFQ19IMjY0LAo+ICsJCS5yZXF1aXJlZAk9IHRydWUsCj4gKwl9LAo+ICsJewo+ ICsJCS5pZAkJPSBWNEwyX0NJRF9NUEVHX1ZJREVPX0gyNjRfU0xJQ0VfUEFSQU1TLAo+ICsJCS5l bGVtX3NpemUJPSBzaXplb2Yoc3RydWN0IHY0bDJfY3RybF9oMjY0X3NsaWNlX3BhcmFtcyksCj4g KwkJLmNvZGVjCQk9IENFRFJVU19DT0RFQ19IMjY0LAo+ICsJCS5yZXF1aXJlZAk9IHRydWUsCj4g Kwl9LAo+ICsJewo+ICsJCS5pZAkJPSBWNEwyX0NJRF9NUEVHX1ZJREVPX0gyNjRfU1BTLAo+ICsJ CS5lbGVtX3NpemUJPSBzaXplb2Yoc3RydWN0IHY0bDJfY3RybF9oMjY0X3NwcyksCj4gKwkJLmNv ZGVjCQk9IENFRFJVU19DT0RFQ19IMjY0LAo+ICsJCS5yZXF1aXJlZAk9IHRydWUsCj4gKwl9LAo+ ICsJewo+ICsJCS5pZAkJPSBWNEwyX0NJRF9NUEVHX1ZJREVPX0gyNjRfUFBTLAo+ICsJCS5lbGVt X3NpemUJPSBzaXplb2Yoc3RydWN0IHY0bDJfY3RybF9oMjY0X3BwcyksCj4gKwkJLmNvZGVjCQk9 IENFRFJVU19DT0RFQ19IMjY0LAo+ICsJCS5yZXF1aXJlZAk9IHRydWUsCj4gKwl9LAo+ICsJewo+ ICsJCS5pZAkJPSBWNEwyX0NJRF9NUEVHX1ZJREVPX0gyNjRfU0NBTElOR19NQVRSSVgsCj4gKwkJ LmVsZW1fc2l6ZQk9IHNpemVvZihzdHJ1Y3QgdjRsMl9jdHJsX2gyNjRfc2NhbGluZ19tYXRyaXgp LAo+ICsJCS5jb2RlYwkJPSBDRURSVVNfQ09ERUNfSDI2NCwKPiArCQkucmVxdWlyZWQJPSB0cnVl LAo+ICsJfSwKPiAgfTsKPiAgCj4gICNkZWZpbmUgQ0VEUlVTX0NPTlRST0xTX0NPVU5UCUFSUkFZ X1NJWkUoY2VkcnVzX2NvbnRyb2xzKQo+IEBAIC0yNzgsNiArMzA4LDcgQEAgc3RhdGljIGludCBj ZWRydXNfcHJvYmUoc3RydWN0IHBsYXRmb3JtX2RldmljZSAqcGRldikKPiAgCX0KPiAgCj4gIAlk ZXYtPmRlY19vcHNbQ0VEUlVTX0NPREVDX01QRUcyXSA9ICZjZWRydXNfZGVjX29wc19tcGVnMjsK PiArCWRldi0+ZGVjX29wc1tDRURSVVNfQ09ERUNfSDI2NF0gPSAmY2VkcnVzX2RlY19vcHNfaDI2 NDsKPiAgCj4gIAltdXRleF9pbml0KCZkZXYtPmRldl9tdXRleCk7Cj4gIAo+IGRpZmYgLS1naXQg YS9kcml2ZXJzL3N0YWdpbmcvbWVkaWEvc3VueGkvY2VkcnVzL2NlZHJ1cy5oIGIvZHJpdmVycy9z dGFnaW5nL21lZGlhL3N1bnhpL2NlZHJ1cy9jZWRydXMuaAo+IGluZGV4IGM1N2MwNGI0MWQyZS4u YmVmNzlmNjMwNTIwIDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvc3RhZ2luZy9tZWRpYS9zdW54aS9j ZWRydXMvY2VkcnVzLmgKPiArKysgYi9kcml2ZXJzL3N0YWdpbmcvbWVkaWEvc3VueGkvY2VkcnVz L2NlZHJ1cy5oCj4gQEAgLTMyLDcgKzMyLDcgQEAKPiAgCj4gIGVudW0gY2VkcnVzX2NvZGVjIHsK PiAgCUNFRFJVU19DT0RFQ19NUEVHMiwKPiAtCj4gKwlDRURSVVNfQ09ERUNfSDI2NCwKPiAgCUNF RFJVU19DT0RFQ19MQVNULAo+ICB9Owo+ICAKPiBAQCAtNDIsNiArNDIsMTIgQEAgZW51bSBjZWRy dXNfaXJxX3N0YXR1cyB7Cj4gIAlDRURSVVNfSVJRX09LLAo+ICB9Owo+ICAKPiArZW51bSBjZWRy dXNfaDI2NF9waWNfdHlwZSB7Cj4gKwlDRURSVVNfSDI2NF9QSUNfVFlQRV9GUkFNRQk9IDAsCj4g KwlDRURSVVNfSDI2NF9QSUNfVFlQRV9GSUVMRCwKPiArCUNFRFJVU19IMjY0X1BJQ19UWVBFX01C QUZGLAo+ICt9Owo+ICsKPiAgc3RydWN0IGNlZHJ1c19jb250cm9sIHsKPiAgCXUzMgkJCWlkOwo+ ICAJdTMyCQkJZWxlbV9zaXplOwo+IEBAIC00OSw2ICs1NSwxNCBAQCBzdHJ1Y3QgY2VkcnVzX2Nv bnRyb2wgewo+ICAJdW5zaWduZWQgY2hhcgkJcmVxdWlyZWQ6MTsKPiAgfTsKPiAgCj4gK3N0cnVj dCBjZWRydXNfaDI2NF9ydW4gewo+ICsJY29uc3Qgc3RydWN0IHY0bDJfY3RybF9oMjY0X2RlY29k ZV9wYXJhbXMJKmRlY29kZV9wYXJhbXM7Cj4gKwljb25zdCBzdHJ1Y3QgdjRsMl9jdHJsX2gyNjRf cHBzCQkJKnBwczsKPiArCWNvbnN0IHN0cnVjdCB2NGwyX2N0cmxfaDI2NF9zY2FsaW5nX21hdHJp eAkqc2NhbGluZ19tYXRyaXg7Cj4gKwljb25zdCBzdHJ1Y3QgdjRsMl9jdHJsX2gyNjRfc2xpY2Vf cGFyYW1zCSpzbGljZV9wYXJhbXM7Cj4gKwljb25zdCBzdHJ1Y3QgdjRsMl9jdHJsX2gyNjRfc3Bz CQkJKnNwczsKPiArfTsKPiArCj4gIHN0cnVjdCBjZWRydXNfbXBlZzJfcnVuIHsKPiAgCWNvbnN0 IHN0cnVjdCB2NGwyX2N0cmxfbXBlZzJfc2xpY2VfcGFyYW1zCSpzbGljZV9wYXJhbXM7Cj4gIAlj b25zdCBzdHJ1Y3QgdjRsMl9jdHJsX21wZWcyX3F1YW50aXphdGlvbgkqcXVhbnRpemF0aW9uOwo+ IEBAIC01OSwxMiArNzMsMjAgQEAgc3RydWN0IGNlZHJ1c19ydW4gewo+ICAJc3RydWN0IHZiMl92 NGwyX2J1ZmZlcgkqZHN0Owo+ICAKPiAgCXVuaW9uIHsKPiArCQlzdHJ1Y3QgY2VkcnVzX2gyNjRf cnVuCWgyNjQ7Cj4gIAkJc3RydWN0IGNlZHJ1c19tcGVnMl9ydW4JbXBlZzI7Cj4gIAl9Owo+ICB9 Owo+ICAKPiAgc3RydWN0IGNlZHJ1c19idWZmZXIgewo+ICAJc3RydWN0IHY0bDJfbTJtX2J1ZmZl ciAgICAgICAgICBtMm1fYnVmOwo+ICsKPiArCXVuaW9uIHsKPiArCQlzdHJ1Y3Qgewo+ICsJCQl1 bnNpZ25lZCBpbnQJCQlwb3NpdGlvbjsKPiArCQkJZW51bSBjZWRydXNfaDI2NF9waWNfdHlwZQlw aWNfdHlwZTsKPiArCQl9IGgyNjQ7Cj4gKwl9IGNvZGVjOwo+ICB9Owo+ICAKPiAgc3RydWN0IGNl ZHJ1c19jdHggewo+IEBAIC03OSw2ICsxMDEsMTkgQEAgc3RydWN0IGNlZHJ1c19jdHggewo+ICAJ c3RydWN0IHY0bDJfY3RybAkJKipjdHJsczsKPiAgCj4gIAlzdHJ1Y3QgdmIyX2J1ZmZlcgkJKmRz dF9idWZzW1ZJREVPX01BWF9GUkFNRV07Cj4gKwo+ICsJdW5pb24gewo+ICsJCXN0cnVjdCB7Cj4g KwkJCXZvaWQJCSptdl9jb2xfYnVmOwo+ICsJCQlkbWFfYWRkcl90CW12X2NvbF9idWZfZG1hOwo+ ICsJCQlzc2l6ZV90CQltdl9jb2xfYnVmX2ZpZWxkX3NpemU7Cj4gKwkJCXNzaXplX3QJCW12X2Nv bF9idWZfc2l6ZTsKPiArCQkJdm9pZAkJKnBpY19pbmZvX2J1ZjsKPiArCQkJZG1hX2FkZHJfdAlw aWNfaW5mb19idWZfZG1hOwo+ICsJCQl2b2lkCQkqbmVpZ2hib3JfaW5mb19idWY7Cj4gKwkJCWRt YV9hZGRyX3QJbmVpZ2hib3JfaW5mb19idWZfZG1hOwo+ICsJCX0gaDI2NDsKPiArCX0gY29kZWM7 Cj4gIH07Cj4gIAo+ICBzdHJ1Y3QgY2VkcnVzX2RlY19vcHMgewo+IEBAIC0xMjEsNiArMTU2LDcg QEAgc3RydWN0IGNlZHJ1c19kZXYgewo+ICB9Owo+ICAKPiAgZXh0ZXJuIHN0cnVjdCBjZWRydXNf ZGVjX29wcyBjZWRydXNfZGVjX29wc19tcGVnMjsKPiArZXh0ZXJuIHN0cnVjdCBjZWRydXNfZGVj X29wcyBjZWRydXNfZGVjX29wc19oMjY0Owo+ICAKPiAgc3RhdGljIGlubGluZSB2b2lkIGNlZHJ1 c193cml0ZShzdHJ1Y3QgY2VkcnVzX2RldiAqZGV2LCB1MzIgcmVnLCB1MzIgdmFsKQo+ICB7Cj4g ZGlmZiAtLWdpdCBhL2RyaXZlcnMvc3RhZ2luZy9tZWRpYS9zdW54aS9jZWRydXMvY2VkcnVzX2Rl Yy5jIGIvZHJpdmVycy9zdGFnaW5nL21lZGlhL3N1bnhpL2NlZHJ1cy9jZWRydXNfZGVjLmMKPiBp bmRleCA0ZDZkNjAyY2RkZTYuLmJkYWQ4N2ViOWQ3OSAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL3N0 YWdpbmcvbWVkaWEvc3VueGkvY2VkcnVzL2NlZHJ1c19kZWMuYwo+ICsrKyBiL2RyaXZlcnMvc3Rh Z2luZy9tZWRpYS9zdW54aS9jZWRydXMvY2VkcnVzX2RlYy5jCj4gQEAgLTQ2LDYgKzQ2LDE5IEBA IHZvaWQgY2VkcnVzX2RldmljZV9ydW4odm9pZCAqcHJpdikKPiAgCQkJVjRMMl9DSURfTVBFR19W SURFT19NUEVHMl9RVUFOVElaQVRJT04pOwo+ICAJCWJyZWFrOwo+ICAKPiArCWNhc2UgVjRMMl9Q SVhfRk1UX0gyNjRfU0xJQ0VfUkFXOgo+ICsJCXJ1bi5oMjY0LmRlY29kZV9wYXJhbXMgPSBjZWRy dXNfZmluZF9jb250cm9sX2RhdGEoY3R4LAo+ICsJCQlWNEwyX0NJRF9NUEVHX1ZJREVPX0gyNjRf REVDT0RFX1BBUkFNUyk7Cj4gKwkJcnVuLmgyNjQucHBzID0gY2VkcnVzX2ZpbmRfY29udHJvbF9k YXRhKGN0eCwKPiArCQkJVjRMMl9DSURfTVBFR19WSURFT19IMjY0X1BQUyk7Cj4gKwkJcnVuLmgy NjQuc2NhbGluZ19tYXRyaXggPSBjZWRydXNfZmluZF9jb250cm9sX2RhdGEoY3R4LAo+ICsJCQlW NEwyX0NJRF9NUEVHX1ZJREVPX0gyNjRfU0NBTElOR19NQVRSSVgpOwo+ICsJCXJ1bi5oMjY0LnNs aWNlX3BhcmFtcyA9IGNlZHJ1c19maW5kX2NvbnRyb2xfZGF0YShjdHgsCj4gKwkJCVY0TDJfQ0lE X01QRUdfVklERU9fSDI2NF9TTElDRV9QQVJBTVMpOwo+ICsJCXJ1bi5oMjY0LnNwcyA9IGNlZHJ1 c19maW5kX2NvbnRyb2xfZGF0YShjdHgsCj4gKwkJCVY0TDJfQ0lEX01QRUdfVklERU9fSDI2NF9T UFMpOwo+ICsJCWJyZWFrOwo+ICsKPiAgCWRlZmF1bHQ6Cj4gIAkJYnJlYWs7Cj4gIAl9Cj4gZGlm ZiAtLWdpdCBhL2RyaXZlcnMvc3RhZ2luZy9tZWRpYS9zdW54aS9jZWRydXMvY2VkcnVzX2gyNjQu YyBiL2RyaXZlcnMvc3RhZ2luZy9tZWRpYS9zdW54aS9jZWRydXMvY2VkcnVzX2gyNjQuYwo+IG5l dyBmaWxlIG1vZGUgMTAwNjQ0Cj4gaW5kZXggMDAwMDAwMDAwMDAwLi4yYzk4YTNlNDZkMmIKPiAt LS0gL2Rldi9udWxsCj4gKysrIGIvZHJpdmVycy9zdGFnaW5nL21lZGlhL3N1bnhpL2NlZHJ1cy9j ZWRydXNfaDI2NC5jCj4gQEAgLTAsMCArMSw1NzQgQEAKPiArLy8gU1BEWC1MaWNlbnNlLUlkZW50 aWZpZXI6IEdQTC0yLjAtb3ItbGF0ZXIKPiArLyoKPiArICogQ2VkcnVzIFZQVSBkcml2ZXIKPiAr ICoKPiArICogQ29weXJpZ2h0IChjKSAyMDEzIEplbnMgS3Vza2UgPGplbnNrdXNrZUBnbWFpbC5j b20+Cj4gKyAqIENvcHlyaWdodCAoYykgMjAxOCBCb290bGluCj4gKyAqLwo+ICsKPiArI2luY2x1 ZGUgPGxpbnV4L3R5cGVzLmg+Cj4gKwo+ICsjaW5jbHVkZSA8bWVkaWEvdmlkZW9idWYyLWRtYS1j b250aWcuaD4KPiArCj4gKyNpbmNsdWRlICJjZWRydXMuaCIKPiArI2luY2x1ZGUgImNlZHJ1c19o dy5oIgo+ICsjaW5jbHVkZSAiY2VkcnVzX3JlZ3MuaCIKPiArCj4gK2VudW0gY2VkcnVzX2gyNjRf c3JhbV9vZmYgewo+ICsJQ0VEUlVTX1NSQU1fSDI2NF9QUkVEX1dFSUdIVF9UQUJMRQk9IDB4MDAw LAo+ICsJQ0VEUlVTX1NSQU1fSDI2NF9GUkFNRUJVRkZFUl9MSVNUCT0gMHgxMDAsCj4gKwlDRURS VVNfU1JBTV9IMjY0X1JFRl9MSVNUXzAJCT0gMHgxOTAsCj4gKwlDRURSVVNfU1JBTV9IMjY0X1JF Rl9MSVNUXzEJCT0gMHgxOTksCj4gKwlDRURSVVNfU1JBTV9IMjY0X1NDQUxJTkdfTElTVF84eDhf MAk9IDB4MjAwLAo+ICsJQ0VEUlVTX1NSQU1fSDI2NF9TQ0FMSU5HX0xJU1RfOHg4XzEJPSAweDIx MCwKPiArCUNFRFJVU19TUkFNX0gyNjRfU0NBTElOR19MSVNUXzR4NAk9IDB4MjIwLAo+ICt9Owo+ ICsKPiArc3RydWN0IGNlZHJ1c19oMjY0X3NyYW1fcmVmX3BpYyB7Cj4gKwlfX2xlMzIJdG9wX2Zp ZWxkX29yZGVyX2NudDsKPiArCV9fbGUzMglib3R0b21fZmllbGRfb3JkZXJfY250Owo+ICsJX19s ZTMyCWZyYW1lX2luZm87Cj4gKwlfX2xlMzIJbHVtYV9wdHI7Cj4gKwlfX2xlMzIJY2hyb21hX3B0 cjsKPiArCV9fbGUzMgltdl9jb2xfdG9wX3B0cjsKPiArCV9fbGUzMgltdl9jb2xfYm90X3B0cjsK PiArCV9fbGUzMglyZXNlcnZlZDsKPiArfSBfX3BhY2tlZDsKPiArCj4gKyNkZWZpbmUgQ0VEUlVT X0gyNjRfRlJBTUVfTlVNCQkxOAo+ICsKPiArI2RlZmluZSBDRURSVVNfTkVJR0hCT1JfSU5GT19C VUZfU0laRQkoMTYgKiBTWl8xSykKPiArI2RlZmluZSBDRURSVVNfUElDX0lORk9fQlVGX1NJWkUJ KDEyOCAqIFNaXzFLKQo+ICsKPiArc3RhdGljIHZvaWQgY2VkcnVzX2gyNjRfd3JpdGVfc3JhbShz dHJ1Y3QgY2VkcnVzX2RldiAqZGV2LAo+ICsJCQkJICAgZW51bSBjZWRydXNfaDI2NF9zcmFtX29m ZiBvZmYsCj4gKwkJCQkgICBjb25zdCB2b2lkICpkYXRhLCBzaXplX3QgbGVuKQo+ICt7Cj4gKwlj b25zdCB1MzIgKmJ1ZmZlciA9IGRhdGE7Cj4gKwlzaXplX3QgY291bnQgPSBESVZfUk9VTkRfVVAo bGVuLCA0KTsKPiArCj4gKwljZWRydXNfd3JpdGUoZGV2LCBWRV9BVkNfU1JBTV9QT1JUX09GRlNF VCwgb2ZmIDw8IDIpOwo+ICsKPiArCXdoaWxlIChjb3VudC0tKQo+ICsJCWNlZHJ1c193cml0ZShk ZXYsIFZFX0FWQ19TUkFNX1BPUlRfREFUQSwgKmJ1ZmZlcisrKTsKPiArfQo+ICsKPiArc3RhdGlj IGRtYV9hZGRyX3QgY2VkcnVzX2gyNjRfbXZfY29sX2J1Zl9hZGRyKHN0cnVjdCBjZWRydXNfY3R4 ICpjdHgsCj4gKwkJCQkJICAgICAgdW5zaWduZWQgaW50IHBvc2l0aW9uLAo+ICsJCQkJCSAgICAg IHVuc2lnbmVkIGludCBmaWVsZCkKPiArewo+ICsJZG1hX2FkZHJfdCBhZGRyID0gY3R4LT5jb2Rl Yy5oMjY0Lm12X2NvbF9idWZfZG1hOwo+ICsKPiArCS8qIEFkanVzdCBmb3IgdGhlIHBvc2l0aW9u ICovCj4gKwlhZGRyICs9IHBvc2l0aW9uICogY3R4LT5jb2RlYy5oMjY0Lm12X2NvbF9idWZfZmll bGRfc2l6ZSAqIDI7Cj4gKwo+ICsJLyogQWRqdXN0IGZvciB0aGUgZmllbGQgKi8KPiArCWFkZHIg Kz0gZmllbGQgKiBjdHgtPmNvZGVjLmgyNjQubXZfY29sX2J1Zl9maWVsZF9zaXplOwo+ICsKPiAr CXJldHVybiBhZGRyOwo+ICt9Cj4gKwo+ICtzdGF0aWMgdm9pZCBjZWRydXNfZmlsbF9yZWZfcGlj KHN0cnVjdCBjZWRydXNfY3R4ICpjdHgsCj4gKwkJCQlzdHJ1Y3QgY2VkcnVzX2J1ZmZlciAqYnVm LAo+ICsJCQkJdW5zaWduZWQgaW50IHRvcF9maWVsZF9vcmRlcl9jbnQsCj4gKwkJCQl1bnNpZ25l ZCBpbnQgYm90dG9tX2ZpZWxkX29yZGVyX2NudCwKPiArCQkJCXN0cnVjdCBjZWRydXNfaDI2NF9z cmFtX3JlZl9waWMgKnBpYykKPiArewo+ICsJc3RydWN0IHZiMl9idWZmZXIgKnZidWYgPSAmYnVm LT5tMm1fYnVmLnZiLnZiMl9idWY7Cj4gKwl1bnNpZ25lZCBpbnQgcG9zaXRpb24gPSBidWYtPmNv ZGVjLmgyNjQucG9zaXRpb247Cj4gKwo+ICsJcGljLT50b3BfZmllbGRfb3JkZXJfY250ID0gdG9w X2ZpZWxkX29yZGVyX2NudDsKPiArCXBpYy0+Ym90dG9tX2ZpZWxkX29yZGVyX2NudCA9IGJvdHRv bV9maWVsZF9vcmRlcl9jbnQ7Cj4gKwlwaWMtPmZyYW1lX2luZm8gPSBidWYtPmNvZGVjLmgyNjQu cGljX3R5cGUgPDwgODsKPiArCj4gKwlwaWMtPmx1bWFfcHRyID0gY2VkcnVzX2J1Zl9hZGRyKHZi dWYsICZjdHgtPmRzdF9mbXQsIDApOwo+ICsJcGljLT5jaHJvbWFfcHRyID0gY2VkcnVzX2J1Zl9h ZGRyKHZidWYsICZjdHgtPmRzdF9mbXQsIDEpOwo+ICsJcGljLT5tdl9jb2xfdG9wX3B0ciA9IGNl ZHJ1c19oMjY0X212X2NvbF9idWZfYWRkcihjdHgsIHBvc2l0aW9uLCAwKTsKPiArCXBpYy0+bXZf Y29sX2JvdF9wdHIgPSBjZWRydXNfaDI2NF9tdl9jb2xfYnVmX2FkZHIoY3R4LCBwb3NpdGlvbiwg MSk7Cj4gK30KPiArCj4gK3N0YXRpYyB2b2lkIGNlZHJ1c193cml0ZV9mcmFtZV9saXN0KHN0cnVj dCBjZWRydXNfY3R4ICpjdHgsCj4gKwkJCQkgICAgc3RydWN0IGNlZHJ1c19ydW4gKnJ1bikKPiAr ewo+ICsJc3RydWN0IGNlZHJ1c19oMjY0X3NyYW1fcmVmX3BpYyBwaWNfbGlzdFtDRURSVVNfSDI2 NF9GUkFNRV9OVU1dOwo+ICsJY29uc3Qgc3RydWN0IHY0bDJfY3RybF9oMjY0X2RlY29kZV9wYXJh bXMgKmRlY29kZSA9IHJ1bi0+aDI2NC5kZWNvZGVfcGFyYW1zOwo+ICsJY29uc3Qgc3RydWN0IHY0 bDJfY3RybF9oMjY0X3NsaWNlX3BhcmFtcyAqc2xpY2UgPSBydW4tPmgyNjQuc2xpY2VfcGFyYW1z Owo+ICsJY29uc3Qgc3RydWN0IHY0bDJfY3RybF9oMjY0X3NwcyAqc3BzID0gcnVuLT5oMjY0LnNw czsKPiArCXN0cnVjdCB2YjJfcXVldWUgKmNhcF9xID0gJmN0eC0+ZmgubTJtX2N0eC0+Y2FwX3Ff Y3R4LnE7Cj4gKwlzdHJ1Y3QgY2VkcnVzX2J1ZmZlciAqb3V0cHV0X2J1ZjsKPiArCXN0cnVjdCBj ZWRydXNfZGV2ICpkZXYgPSBjdHgtPmRldjsKPiArCXVuc2lnbmVkIGxvbmcgdXNlZF9kcGJzID0g MDsKPiArCXVuc2lnbmVkIGludCBwb3NpdGlvbjsKPiArCXVuc2lnbmVkIGludCBvdXRwdXQgPSAw Owo+ICsJdW5zaWduZWQgaW50IGk7Cj4gKwo+ICsJbWVtc2V0KHBpY19saXN0LCAwLCBzaXplb2Yo cGljX2xpc3QpKTsKPiArCj4gKwlmb3IgKGkgPSAwOyBpIDwgQVJSQVlfU0laRShkZWNvZGUtPmRw Yik7IGkrKykgewo+ICsJCWNvbnN0IHN0cnVjdCB2NGwyX2gyNjRfZHBiX2VudHJ5ICpkcGIgPSAm ZGVjb2RlLT5kcGJbaV07Cj4gKwkJc3RydWN0IGNlZHJ1c19idWZmZXIgKmNlZHJ1c19idWY7Cj4g KwkJaW50IGJ1Zl9pZHg7Cj4gKwo+ICsJCWlmICghKGRwYi0+ZmxhZ3MgJiBWNEwyX0gyNjRfRFBC X0VOVFJZX0ZMQUdfVkFMSUQpKQo+ICsJCQljb250aW51ZTsKPiArCj4gKwkJYnVmX2lkeCA9IHZi Ml9maW5kX3RpbWVzdGFtcChjYXBfcSwgZHBiLT5yZWZlcmVuY2VfdHMsIDApOwo+ICsJCWlmIChi dWZfaWR4IDwgMCkKPiArCQkJY29udGludWU7Cj4gKwo+ICsJCWNlZHJ1c19idWYgPSB2YjJfdG9f Y2VkcnVzX2J1ZmZlcihjdHgtPmRzdF9idWZzW2J1Zl9pZHhdKTsKPiArCQlwb3NpdGlvbiA9IGNl ZHJ1c19idWYtPmNvZGVjLmgyNjQucG9zaXRpb247Cj4gKwkJdXNlZF9kcGJzIHw9IEJJVChwb3Np dGlvbik7Cj4gKwo+ICsJCWlmICghKGRwYi0+ZmxhZ3MgJiBWNEwyX0gyNjRfRFBCX0VOVFJZX0ZM QUdfQUNUSVZFKSkKPiArCQkJY29udGludWU7Cj4gKwo+ICsJCWNlZHJ1c19maWxsX3JlZl9waWMo Y3R4LCBjZWRydXNfYnVmLAo+ICsJCQkJICAgIGRwYi0+dG9wX2ZpZWxkX29yZGVyX2NudCwKPiAr CQkJCSAgICBkcGItPmJvdHRvbV9maWVsZF9vcmRlcl9jbnQsCj4gKwkJCQkgICAgJnBpY19saXN0 W3Bvc2l0aW9uXSk7Cj4gKwo+ICsJCW91dHB1dCA9IG1heChwb3NpdGlvbiwgb3V0cHV0KTsKPiAr CX0KPiArCj4gKwlwb3NpdGlvbiA9IGZpbmRfbmV4dF96ZXJvX2JpdCgmdXNlZF9kcGJzLCBDRURS VVNfSDI2NF9GUkFNRV9OVU0sCj4gKwkJCQkgICAgICBvdXRwdXQpOwo+ICsJaWYgKHBvc2l0aW9u ID49IENFRFJVU19IMjY0X0ZSQU1FX05VTSkKPiArCQlwb3NpdGlvbiA9IGZpbmRfZmlyc3RfemVy b19iaXQoJnVzZWRfZHBicywgQ0VEUlVTX0gyNjRfRlJBTUVfTlVNKTsKPiArCj4gKwlvdXRwdXRf YnVmID0gdmIyX3RvX2NlZHJ1c19idWZmZXIoJnJ1bi0+ZHN0LT52YjJfYnVmKTsKPiArCW91dHB1 dF9idWYtPmNvZGVjLmgyNjQucG9zaXRpb24gPSBwb3NpdGlvbjsKPiArCj4gKwlpZiAoc2xpY2Ut PmZsYWdzICYgVjRMMl9IMjY0X1NMSUNFX0ZMQUdfRklFTERfUElDKQo+ICsJCW91dHB1dF9idWYt PmNvZGVjLmgyNjQucGljX3R5cGUgPSBDRURSVVNfSDI2NF9QSUNfVFlQRV9GSUVMRDsKPiArCWVs c2UgaWYgKHNwcy0+ZmxhZ3MgJiBWNEwyX0gyNjRfU1BTX0ZMQUdfTUJfQURBUFRJVkVfRlJBTUVf RklFTEQpCj4gKwkJb3V0cHV0X2J1Zi0+Y29kZWMuaDI2NC5waWNfdHlwZSA9IENFRFJVU19IMjY0 X1BJQ19UWVBFX01CQUZGOwo+ICsJZWxzZQo+ICsJCW91dHB1dF9idWYtPmNvZGVjLmgyNjQucGlj X3R5cGUgPSBDRURSVVNfSDI2NF9QSUNfVFlQRV9GUkFNRTsKPiArCj4gKwljZWRydXNfZmlsbF9y ZWZfcGljKGN0eCwgb3V0cHV0X2J1ZiwKPiArCQkJICAgIGRlY29kZS0+dG9wX2ZpZWxkX29yZGVy X2NudCwKPiArCQkJICAgIGRlY29kZS0+Ym90dG9tX2ZpZWxkX29yZGVyX2NudCwKPiArCQkJICAg ICZwaWNfbGlzdFtwb3NpdGlvbl0pOwo+ICsKPiArCWNlZHJ1c19oMjY0X3dyaXRlX3NyYW0oZGV2 LCBDRURSVVNfU1JBTV9IMjY0X0ZSQU1FQlVGRkVSX0xJU1QsCj4gKwkJCSAgICAgICBwaWNfbGlz dCwgc2l6ZW9mKHBpY19saXN0KSk7Cj4gKwo+ICsJY2VkcnVzX3dyaXRlKGRldiwgVkVfSDI2NF9P VVRQVVRfRlJBTUVfSURYLCBwb3NpdGlvbik7Cj4gK30KPiArCj4gKyNkZWZpbmUgQ0VEUlVTX01B WF9SRUZfSURYCTMyCj4gKwo+ICtzdGF0aWMgdm9pZCBfY2VkcnVzX3dyaXRlX3JlZl9saXN0KHN0 cnVjdCBjZWRydXNfY3R4ICpjdHgsCj4gKwkJCQkgICBzdHJ1Y3QgY2VkcnVzX3J1biAqcnVuLAo+ ICsJCQkJICAgY29uc3QgdTggKnJlZl9saXN0LCB1OCBudW1fcmVmLAo+ICsJCQkJICAgZW51bSBj ZWRydXNfaDI2NF9zcmFtX29mZiBzcmFtKQo+ICt7Cj4gKwljb25zdCBzdHJ1Y3QgdjRsMl9jdHJs X2gyNjRfZGVjb2RlX3BhcmFtcyAqZGVjb2RlID0gcnVuLT5oMjY0LmRlY29kZV9wYXJhbXM7Cj4g KwlzdHJ1Y3QgdmIyX3F1ZXVlICpjYXBfcSA9ICZjdHgtPmZoLm0ybV9jdHgtPmNhcF9xX2N0eC5x Owo+ICsJc3RydWN0IGNlZHJ1c19kZXYgKmRldiA9IGN0eC0+ZGV2Owo+ICsJdTggc3JhbV9hcnJh eVtDRURSVVNfTUFYX1JFRl9JRFhdOwo+ICsJdW5zaWduZWQgaW50IGk7Cj4gKwlzaXplX3Qgc2l6 ZTsKPiArCj4gKwltZW1zZXQoc3JhbV9hcnJheSwgMCwgc2l6ZW9mKHNyYW1fYXJyYXkpKTsKPiAr Cj4gKwlmb3IgKGkgPSAwOyBpIDwgbnVtX3JlZjsgaSsrKSB7Cj4gKwkJY29uc3Qgc3RydWN0IHY0 bDJfaDI2NF9kcGJfZW50cnkgKmRwYjsKPiArCQljb25zdCBzdHJ1Y3QgY2VkcnVzX2J1ZmZlciAq Y2VkcnVzX2J1ZjsKPiArCQljb25zdCBzdHJ1Y3QgdmIyX3Y0bDJfYnVmZmVyICpyZWZfYnVmOwo+ ICsJCXVuc2lnbmVkIGludCBwb3NpdGlvbjsKPiArCQlpbnQgYnVmX2lkeDsKPiArCQl1OCBkcGJf aWR4Owo+ICsKPiArCQlkcGJfaWR4ID0gcmVmX2xpc3RbaV07Cj4gKwkJZHBiID0gJmRlY29kZS0+ ZHBiW2RwYl9pZHhdOwo+ICsKPiArCQlpZiAoIShkcGItPmZsYWdzICYgVjRMMl9IMjY0X0RQQl9F TlRSWV9GTEFHX0FDVElWRSkpCj4gKwkJCWNvbnRpbnVlOwo+ICsKPiArCQlidWZfaWR4ID0gdmIy X2ZpbmRfdGltZXN0YW1wKGNhcF9xLCBkcGItPnJlZmVyZW5jZV90cywgMCk7Cj4gKwkJaWYgKGJ1 Zl9pZHggPCAwKQo+ICsJCQljb250aW51ZTsKPiArCj4gKwkJcmVmX2J1ZiA9IHRvX3ZiMl92NGwy X2J1ZmZlcihjdHgtPmRzdF9idWZzW2J1Zl9pZHhdKTsKPiArCQljZWRydXNfYnVmID0gdmIyX3Y0 bDJfdG9fY2VkcnVzX2J1ZmZlcihyZWZfYnVmKTsKPiArCQlwb3NpdGlvbiA9IGNlZHJ1c19idWYt PmNvZGVjLmgyNjQucG9zaXRpb247Cj4gKwo+ICsJCXNyYW1fYXJyYXlbaV0gfD0gcG9zaXRpb24g PDwgMTsKPiArCQlpZiAocmVmX2J1Zi0+ZmllbGQgPT0gVjRMMl9GSUVMRF9CT1RUT00pCj4gKwkJ CXNyYW1fYXJyYXlbaV0gfD0gQklUKDApOwo+ICsJfQo+ICsKPiArCXNpemUgPSBtaW5fdChzaXpl X3QsIEFMSUdOKG51bV9yZWYsIDQpLCBzaXplb2Yoc3JhbV9hcnJheSkpOwo+ICsJY2VkcnVzX2gy NjRfd3JpdGVfc3JhbShkZXYsIHNyYW0sICZzcmFtX2FycmF5LCBzaXplKTsKPiArfQo+ICsKPiAr c3RhdGljIHZvaWQgY2VkcnVzX3dyaXRlX3JlZl9saXN0MChzdHJ1Y3QgY2VkcnVzX2N0eCAqY3R4 LAo+ICsJCQkJICAgc3RydWN0IGNlZHJ1c19ydW4gKnJ1bikKPiArewo+ICsJY29uc3Qgc3RydWN0 IHY0bDJfY3RybF9oMjY0X3NsaWNlX3BhcmFtcyAqc2xpY2UgPSBydW4tPmgyNjQuc2xpY2VfcGFy YW1zOwo+ICsKPiArCV9jZWRydXNfd3JpdGVfcmVmX2xpc3QoY3R4LCBydW4sCj4gKwkJCSAgICAg ICBzbGljZS0+cmVmX3BpY19saXN0MCwKPiArCQkJICAgICAgIHNsaWNlLT5udW1fcmVmX2lkeF9s MF9hY3RpdmVfbWludXMxICsgMSwKPiArCQkJICAgICAgIENFRFJVU19TUkFNX0gyNjRfUkVGX0xJ U1RfMCk7Cj4gK30KPiArCj4gK3N0YXRpYyB2b2lkIGNlZHJ1c193cml0ZV9yZWZfbGlzdDEoc3Ry dWN0IGNlZHJ1c19jdHggKmN0eCwKPiArCQkJCSAgIHN0cnVjdCBjZWRydXNfcnVuICpydW4pCj4g K3sKPiArCWNvbnN0IHN0cnVjdCB2NGwyX2N0cmxfaDI2NF9zbGljZV9wYXJhbXMgKnNsaWNlID0g cnVuLT5oMjY0LnNsaWNlX3BhcmFtczsKPiArCj4gKwlfY2VkcnVzX3dyaXRlX3JlZl9saXN0KGN0 eCwgcnVuLAo+ICsJCQkgICAgICAgc2xpY2UtPnJlZl9waWNfbGlzdDEsCj4gKwkJCSAgICAgICBz bGljZS0+bnVtX3JlZl9pZHhfbDFfYWN0aXZlX21pbnVzMSArIDEsCj4gKwkJCSAgICAgICBDRURS VVNfU1JBTV9IMjY0X1JFRl9MSVNUXzEpOwo+ICt9Cj4gKwo+ICtzdGF0aWMgdm9pZCBjZWRydXNf d3JpdGVfc2NhbGluZ19saXN0cyhzdHJ1Y3QgY2VkcnVzX2N0eCAqY3R4LAo+ICsJCQkJICAgICAg IHN0cnVjdCBjZWRydXNfcnVuICpydW4pCj4gK3sKPiArCWNvbnN0IHN0cnVjdCB2NGwyX2N0cmxf aDI2NF9zY2FsaW5nX21hdHJpeCAqc2NhbGluZyA9Cj4gKwkJcnVuLT5oMjY0LnNjYWxpbmdfbWF0 cml4Owo+ICsJc3RydWN0IGNlZHJ1c19kZXYgKmRldiA9IGN0eC0+ZGV2Owo+ICsKPiArCWNlZHJ1 c19oMjY0X3dyaXRlX3NyYW0oZGV2LCBDRURSVVNfU1JBTV9IMjY0X1NDQUxJTkdfTElTVF84eDhf MCwKPiArCQkJICAgICAgIHNjYWxpbmctPnNjYWxpbmdfbGlzdF84eDhbMF0sCj4gKwkJCSAgICAg ICBzaXplb2Yoc2NhbGluZy0+c2NhbGluZ19saXN0Xzh4OFswXSkpOwo+ICsKPiArCWNlZHJ1c19o MjY0X3dyaXRlX3NyYW0oZGV2LCBDRURSVVNfU1JBTV9IMjY0X1NDQUxJTkdfTElTVF84eDhfMSwK PiArCQkJICAgICAgIHNjYWxpbmctPnNjYWxpbmdfbGlzdF84eDhbM10sCj4gKwkJCSAgICAgICBz aXplb2Yoc2NhbGluZy0+c2NhbGluZ19saXN0Xzh4OFszXSkpOwo+ICsKPiArCWNlZHJ1c19oMjY0 X3dyaXRlX3NyYW0oZGV2LCBDRURSVVNfU1JBTV9IMjY0X1NDQUxJTkdfTElTVF80eDQsCj4gKwkJ CSAgICAgICBzY2FsaW5nLT5zY2FsaW5nX2xpc3RfNHg0LAo+ICsJCQkgICAgICAgc2l6ZW9mKHNj YWxpbmctPnNjYWxpbmdfbGlzdF80eDQpKTsKPiArfQo+ICsKPiArc3RhdGljIHZvaWQgY2VkcnVz X3dyaXRlX3ByZWRfd2VpZ2h0X3RhYmxlKHN0cnVjdCBjZWRydXNfY3R4ICpjdHgsCj4gKwkJCQkJ ICAgc3RydWN0IGNlZHJ1c19ydW4gKnJ1bikKPiArewo+ICsJY29uc3Qgc3RydWN0IHY0bDJfY3Ry bF9oMjY0X3NsaWNlX3BhcmFtcyAqc2xpY2UgPQo+ICsJCXJ1bi0+aDI2NC5zbGljZV9wYXJhbXM7 Cj4gKwljb25zdCBzdHJ1Y3QgdjRsMl9oMjY0X3ByZWRfd2VpZ2h0X3RhYmxlICpwcmVkX3dlaWdo dCA9Cj4gKwkJJnNsaWNlLT5wcmVkX3dlaWdodF90YWJsZTsKPiArCXN0cnVjdCBjZWRydXNfZGV2 ICpkZXYgPSBjdHgtPmRldjsKPiArCWludCBpLCBqLCBrOwo+ICsKPiArCWNlZHJ1c193cml0ZShk ZXYsIFZFX0gyNjRfU0hTX1dQLAo+ICsJCSAgICAgKChwcmVkX3dlaWdodC0+Y2hyb21hX2xvZzJf d2VpZ2h0X2Rlbm9tICYgMHg3KSA8PCA0KSB8Cj4gKwkJICAgICAoKHByZWRfd2VpZ2h0LT5sdW1h X2xvZzJfd2VpZ2h0X2Rlbm9tICYgMHg3KSA8PCAwKSk7Cj4gKwo+ICsJY2VkcnVzX3dyaXRlKGRl diwgVkVfQVZDX1NSQU1fUE9SVF9PRkZTRVQsCj4gKwkJICAgICBDRURSVVNfU1JBTV9IMjY0X1BS RURfV0VJR0hUX1RBQkxFIDw8IDIpOwo+ICsKPiArCWZvciAoaSA9IDA7IGkgPCBBUlJBWV9TSVpF KHByZWRfd2VpZ2h0LT53ZWlnaHRfZmFjdG9ycyk7IGkrKykgewo+ICsJCWNvbnN0IHN0cnVjdCB2 NGwyX2gyNjRfd2VpZ2h0X2ZhY3RvcnMgKmZhY3RvcnMgPQo+ICsJCQkmcHJlZF93ZWlnaHQtPndl aWdodF9mYWN0b3JzW2ldOwo+ICsKPiArCQlmb3IgKGogPSAwOyBqIDwgQVJSQVlfU0laRShmYWN0 b3JzLT5sdW1hX3dlaWdodCk7IGorKykgewo+ICsJCQl1MzIgdmFsOwo+ICsKPiArCQkJdmFsID0g KCgodTMyKWZhY3RvcnMtPmx1bWFfb2Zmc2V0W2pdICYgMHgxZmYpIDw8IDE2KSB8Cj4gKwkJCQko ZmFjdG9ycy0+bHVtYV93ZWlnaHRbal0gJiAweDFmZik7Cj4gKwkJCWNlZHJ1c193cml0ZShkZXYs IFZFX0FWQ19TUkFNX1BPUlRfREFUQSwgdmFsKTsKPiArCQl9Cj4gKwo+ICsJCWZvciAoaiA9IDA7 IGogPCBBUlJBWV9TSVpFKGZhY3RvcnMtPmNocm9tYV93ZWlnaHQpOyBqKyspIHsKPiArCQkJZm9y IChrID0gMDsgayA8IEFSUkFZX1NJWkUoZmFjdG9ycy0+Y2hyb21hX3dlaWdodFswXSk7IGsrKykg ewo+ICsJCQkJdTMyIHZhbDsKPiArCj4gKwkJCQl2YWwgPSAoKCh1MzIpZmFjdG9ycy0+Y2hyb21h X29mZnNldFtqXVtrXSAmIDB4MWZmKSA8PCAxNikgfAo+ICsJCQkJCShmYWN0b3JzLT5jaHJvbWFf d2VpZ2h0W2pdW2tdICYgMHgxZmYpOwo+ICsJCQkJY2VkcnVzX3dyaXRlKGRldiwgVkVfQVZDX1NS QU1fUE9SVF9EQVRBLCB2YWwpOwo+ICsJCQl9Cj4gKwkJfQo+ICsJfQo+ICt9Cj4gKwo+ICtzdGF0 aWMgdm9pZCBjZWRydXNfc2V0X3BhcmFtcyhzdHJ1Y3QgY2VkcnVzX2N0eCAqY3R4LAo+ICsJCQkg ICAgICBzdHJ1Y3QgY2VkcnVzX3J1biAqcnVuKQo+ICt7Cj4gKwljb25zdCBzdHJ1Y3QgdjRsMl9j dHJsX2gyNjRfZGVjb2RlX3BhcmFtcyAqZGVjb2RlID0gcnVuLT5oMjY0LmRlY29kZV9wYXJhbXM7 Cj4gKwljb25zdCBzdHJ1Y3QgdjRsMl9jdHJsX2gyNjRfc2xpY2VfcGFyYW1zICpzbGljZSA9IHJ1 bi0+aDI2NC5zbGljZV9wYXJhbXM7Cj4gKwljb25zdCBzdHJ1Y3QgdjRsMl9jdHJsX2gyNjRfcHBz ICpwcHMgPSBydW4tPmgyNjQucHBzOwo+ICsJY29uc3Qgc3RydWN0IHY0bDJfY3RybF9oMjY0X3Nw cyAqc3BzID0gcnVuLT5oMjY0LnNwczsKPiArCXN0cnVjdCB2YjJfYnVmZmVyICpzcmNfYnVmID0g JnJ1bi0+c3JjLT52YjJfYnVmOwo+ICsJc3RydWN0IGNlZHJ1c19kZXYgKmRldiA9IGN0eC0+ZGV2 Owo+ICsJZG1hX2FkZHJfdCBzcmNfYnVmX2FkZHI7Cj4gKwl1MzIgb2Zmc2V0ID0gc2xpY2UtPmhl YWRlcl9iaXRfc2l6ZTsKPiArCXUzMiBsZW4gPSAoc2xpY2UtPnNpemUgKiA4KSAtIG9mZnNldDsK PiArCXUzMiByZWc7Cj4gKwo+ICsJY2VkcnVzX3dyaXRlKGRldiwgVkVfSDI2NF9WTERfTEVOLCBs ZW4pOwo+ICsJY2VkcnVzX3dyaXRlKGRldiwgVkVfSDI2NF9WTERfT0ZGU0VULCBvZmZzZXQpOwo+ ICsKPiArCXNyY19idWZfYWRkciA9IHZiMl9kbWFfY29udGlnX3BsYW5lX2RtYV9hZGRyKHNyY19i dWYsIDApOwo+ICsJY2VkcnVzX3dyaXRlKGRldiwgVkVfSDI2NF9WTERfRU5ELAo+ICsJCSAgICAg c3JjX2J1Zl9hZGRyICsgdmIyX2dldF9wbGFuZV9wYXlsb2FkKHNyY19idWYsIDApKTsKPiArCWNl ZHJ1c193cml0ZShkZXYsIFZFX0gyNjRfVkxEX0FERFIsCj4gKwkJICAgICBWRV9IMjY0X1ZMRF9B RERSX1ZBTChzcmNfYnVmX2FkZHIpIHwKPiArCQkgICAgIFZFX0gyNjRfVkxEX0FERFJfRklSU1Qg fCBWRV9IMjY0X1ZMRF9BRERSX1ZBTElEIHwKPiArCQkgICAgIFZFX0gyNjRfVkxEX0FERFJfTEFT VCk7Cj4gKwo+ICsJLyoKPiArCSAqIEZJWE1FOiBTaW5jZSB0aGUgYml0c3RyZWFtIHBhcnNpbmcg aXMgZG9uZSBpbiBzb2Z0d2FyZSwgYW5kCj4gKwkgKiBpbiB1c2Vyc3BhY2UsIHRoaXMgc2hvdWxk bid0IGJlIG5lZWRlZCBhbnltb3JlLiBCdXQgaXQKPiArCSAqIHR1cm5zIG91dCB0aGF0IHJlbW92 aW5nIGl0IGJyZWFrcyB0aGUgZGVjb2RpbmcgcHJvY2VzcywKPiArCSAqIHdpdGhvdXQgYW55IGNs ZWFyIGluZGljYXRpb24gd2h5Lgo+ICsJICovCj4gKwljZWRydXNfd3JpdGUoZGV2LCBWRV9IMjY0 X1RSSUdHRVJfVFlQRSwKPiArCQkgICAgIFZFX0gyNjRfVFJJR0dFUl9UWVBFX0lOSVRfU1dERUMp Owo+ICsKPiArCWlmICgoKHBwcy0+ZmxhZ3MgJiBWNEwyX0gyNjRfUFBTX0ZMQUdfV0VJR0hURURf UFJFRCkgJiYKPiArCSAgICAgKHNsaWNlLT5zbGljZV90eXBlID09IFY0TDJfSDI2NF9TTElDRV9U WVBFX1AgfHwKPiArCSAgICAgIHNsaWNlLT5zbGljZV90eXBlID09IFY0TDJfSDI2NF9TTElDRV9U WVBFX1NQKSkgfHwKPiArCSAgICAocHBzLT53ZWlnaHRlZF9iaXByZWRfaWRjID09IDEgJiYKPiAr CSAgICAgc2xpY2UtPnNsaWNlX3R5cGUgPT0gVjRMMl9IMjY0X1NMSUNFX1RZUEVfQikpCj4gKwkJ Y2VkcnVzX3dyaXRlX3ByZWRfd2VpZ2h0X3RhYmxlKGN0eCwgcnVuKTsKPiArCj4gKwlpZiAoKHNs aWNlLT5zbGljZV90eXBlID09IFY0TDJfSDI2NF9TTElDRV9UWVBFX1ApIHx8Cj4gKwkgICAgKHNs aWNlLT5zbGljZV90eXBlID09IFY0TDJfSDI2NF9TTElDRV9UWVBFX1NQKSB8fAo+ICsJICAgIChz bGljZS0+c2xpY2VfdHlwZSA9PSBWNEwyX0gyNjRfU0xJQ0VfVFlQRV9CKSkKPiArCQljZWRydXNf d3JpdGVfcmVmX2xpc3QwKGN0eCwgcnVuKTsKPiArCj4gKwlpZiAoc2xpY2UtPnNsaWNlX3R5cGUg PT0gVjRMMl9IMjY0X1NMSUNFX1RZUEVfQikKPiArCQljZWRydXNfd3JpdGVfcmVmX2xpc3QxKGN0 eCwgcnVuKTsKPiArCj4gKwkvLyBwaWN0dXJlIHBhcmFtZXRlcnMKPiArCXJlZyA9IDA7Cj4gKwkv Kgo+ICsJICogRklYTUU6IHRoZSBrZXJuZWwgaGVhZGVycyBhcmUgYWxsb3dpbmcgdGhlIGRlZmF1 bHQgdmFsdWUgdG8KPiArCSAqIGJlIHBhc3NlZCwgYnV0IHRoZSBsaWJ2YSBkb2Vzbid0IGdpdmUg dXMgdGhhdC4KPiArCSAqLwo+ICsJcmVnIHw9IChzbGljZS0+bnVtX3JlZl9pZHhfbDBfYWN0aXZl X21pbnVzMSAmIDB4MWYpIDw8IDEwOwo+ICsJcmVnIHw9IChzbGljZS0+bnVtX3JlZl9pZHhfbDFf YWN0aXZlX21pbnVzMSAmIDB4MWYpIDw8IDU7Cj4gKwlyZWcgfD0gKHBwcy0+d2VpZ2h0ZWRfYmlw cmVkX2lkYyAmIDB4MykgPDwgMjsKPiArCWlmIChwcHMtPmZsYWdzICYgVjRMMl9IMjY0X1BQU19G TEFHX0VOVFJPUFlfQ09ESU5HX01PREUpCj4gKwkJcmVnIHw9IFZFX0gyNjRfUFBTX0VOVFJPUFlf Q09ESU5HX01PREU7Cj4gKwlpZiAocHBzLT5mbGFncyAmIFY0TDJfSDI2NF9QUFNfRkxBR19XRUlH SFRFRF9QUkVEKQo+ICsJCXJlZyB8PSBWRV9IMjY0X1BQU19XRUlHSFRFRF9QUkVEOwo+ICsJaWYg KHBwcy0+ZmxhZ3MgJiBWNEwyX0gyNjRfUFBTX0ZMQUdfQ09OU1RSQUlORURfSU5UUkFfUFJFRCkK PiArCQlyZWcgfD0gVkVfSDI2NF9QUFNfQ09OU1RSQUlORURfSU5UUkFfUFJFRDsKPiArCWlmIChw cHMtPmZsYWdzICYgVjRMMl9IMjY0X1BQU19GTEFHX1RSQU5TRk9STV84WDhfTU9ERSkKPiArCQly ZWcgfD0gVkVfSDI2NF9QUFNfVFJBTlNGT1JNXzhYOF9NT0RFOwo+ICsJY2VkcnVzX3dyaXRlKGRl diwgVkVfSDI2NF9QUFMsIHJlZyk7Cj4gKwo+ICsJLy8gc2VxdWVuY2UgcGFyYW1ldGVycwo+ICsJ cmVnID0gMDsKPiArCXJlZyB8PSAoc3BzLT5jaHJvbWFfZm9ybWF0X2lkYyAmIDB4NykgPDwgMTk7 Cj4gKwlyZWcgfD0gKHNwcy0+cGljX3dpZHRoX2luX21ic19taW51czEgJiAweGZmKSA8PCA4Owo+ ICsJcmVnIHw9IHNwcy0+cGljX2hlaWdodF9pbl9tYXBfdW5pdHNfbWludXMxICYgMHhmZjsKPiAr CWlmIChzcHMtPmZsYWdzICYgVjRMMl9IMjY0X1NQU19GTEFHX0ZSQU1FX01CU19PTkxZKQo+ICsJ CXJlZyB8PSBWRV9IMjY0X1NQU19NQlNfT05MWTsKPiArCWlmIChzcHMtPmZsYWdzICYgVjRMMl9I MjY0X1NQU19GTEFHX01CX0FEQVBUSVZFX0ZSQU1FX0ZJRUxEKQo+ICsJCXJlZyB8PSBWRV9IMjY0 X1NQU19NQl9BREFQVElWRV9GUkFNRV9GSUVMRDsKPiArCWlmIChzcHMtPmZsYWdzICYgVjRMMl9I MjY0X1NQU19GTEFHX0RJUkVDVF84WDhfSU5GRVJFTkNFKQo+ICsJCXJlZyB8PSBWRV9IMjY0X1NQ U19ESVJFQ1RfOFg4X0lORkVSRU5DRTsKPiArCWNlZHJ1c193cml0ZShkZXYsIFZFX0gyNjRfU1BT LCByZWcpOwo+ICsKPiArCS8vIHNsaWNlIHBhcmFtZXRlcnMKPiArCXJlZyA9IDA7Cj4gKwlyZWcg fD0gZGVjb2RlLT5uYWxfcmVmX2lkYyA/IEJJVCgxMikgOiAwOwo+ICsJcmVnIHw9IChzbGljZS0+ c2xpY2VfdHlwZSAmIDB4ZikgPDwgODsKPiArCXJlZyB8PSBzbGljZS0+Y2FiYWNfaW5pdF9pZGMg JiAweDM7Cj4gKwlyZWcgfD0gVkVfSDI2NF9TSFNfRklSU1RfU0xJQ0VfSU5fUElDOwo+ICsJaWYg KHNsaWNlLT5mbGFncyAmIFY0TDJfSDI2NF9TTElDRV9GTEFHX0ZJRUxEX1BJQykKPiArCQlyZWcg fD0gVkVfSDI2NF9TSFNfRklFTERfUElDOwo+ICsJaWYgKHNsaWNlLT5mbGFncyAmIFY0TDJfSDI2 NF9TTElDRV9GTEFHX0JPVFRPTV9GSUVMRCkKPiArCQlyZWcgfD0gVkVfSDI2NF9TSFNfQk9UVE9N X0ZJRUxEOwo+ICsJaWYgKHNsaWNlLT5mbGFncyAmIFY0TDJfSDI2NF9TTElDRV9GTEFHX0RJUkVD VF9TUEFUSUFMX01WX1BSRUQpCj4gKwkJcmVnIHw9IFZFX0gyNjRfU0hTX0RJUkVDVF9TUEFUSUFM X01WX1BSRUQ7Cj4gKwljZWRydXNfd3JpdGUoZGV2LCBWRV9IMjY0X1NIUywgcmVnKTsKPiArCj4g KwlyZWcgPSAwOwo+ICsJcmVnIHw9IFZFX0gyNjRfU0hTMl9OVU1fUkVGX0lEWF9BQ1RJVkVfT1ZS RDsKPiArCXJlZyB8PSAoc2xpY2UtPm51bV9yZWZfaWR4X2wwX2FjdGl2ZV9taW51czEgJiAweDFm KSA8PCAyNDsKPiArCXJlZyB8PSAoc2xpY2UtPm51bV9yZWZfaWR4X2wxX2FjdGl2ZV9taW51czEg JiAweDFmKSA8PCAxNjsKPiArCXJlZyB8PSAoc2xpY2UtPmRpc2FibGVfZGVibG9ja2luZ19maWx0 ZXJfaWRjICYgMHgzKSA8PCA4Owo+ICsJcmVnIHw9IChzbGljZS0+c2xpY2VfYWxwaGFfYzBfb2Zm c2V0X2RpdjIgJiAweGYpIDw8IDQ7Cj4gKwlyZWcgfD0gc2xpY2UtPnNsaWNlX2JldGFfb2Zmc2V0 X2RpdjIgJiAweGY7Cj4gKwljZWRydXNfd3JpdGUoZGV2LCBWRV9IMjY0X1NIUzIsIHJlZyk7Cj4g Kwo+ICsJcmVnID0gMDsKPiArCXJlZyB8PSAocHBzLT5zZWNvbmRfY2hyb21hX3FwX2luZGV4X29m ZnNldCAmIDB4M2YpIDw8IDE2Owo+ICsJcmVnIHw9IChwcHMtPmNocm9tYV9xcF9pbmRleF9vZmZz ZXQgJiAweDNmKSA8PCA4Owo+ICsJcmVnIHw9IChwcHMtPnBpY19pbml0X3FwX21pbnVzMjYgKyAy NiArIHNsaWNlLT5zbGljZV9xcF9kZWx0YSkgJiAweDNmOwo+ICsJY2VkcnVzX3dyaXRlKGRldiwg VkVfSDI2NF9TSFNfUVAsIHJlZyk7Cj4gKwo+ICsJLy8gY2xlYXIgc3RhdHVzIGZsYWdzCj4gKwlj ZWRydXNfd3JpdGUoZGV2LCBWRV9IMjY0X1NUQVRVUywgY2VkcnVzX3JlYWQoZGV2LCBWRV9IMjY0 X1NUQVRVUykpOwo+ICsKPiArCS8vIGVuYWJsZSBpbnQKPiArCWNlZHJ1c193cml0ZShkZXYsIFZF X0gyNjRfQ1RSTCwKPiArCQkgICAgIFZFX0gyNjRfQ1RSTF9TTElDRV9ERUNPREVfSU5UIHwKPiAr CQkgICAgIFZFX0gyNjRfQ1RSTF9ERUNPREVfRVJSX0lOVCB8Cj4gKwkJICAgICBWRV9IMjY0X0NU UkxfVkxEX0RBVEFfUkVRX0lOVCk7Cj4gK30KPiArCj4gK3N0YXRpYyBlbnVtIGNlZHJ1c19pcnFf c3RhdHVzCj4gK2NlZHJ1c19oMjY0X2lycV9zdGF0dXMoc3RydWN0IGNlZHJ1c19jdHggKmN0eCkK PiArewo+ICsJc3RydWN0IGNlZHJ1c19kZXYgKmRldiA9IGN0eC0+ZGV2Owo+ICsJdTMyIHJlZyA9 IGNlZHJ1c19yZWFkKGRldiwgVkVfSDI2NF9TVEFUVVMpOwo+ICsKPiArCWlmIChyZWcgJiAoVkVf SDI2NF9TVEFUVVNfREVDT0RFX0VSUl9JTlQgfAo+ICsJCSAgIFZFX0gyNjRfU1RBVFVTX1ZMRF9E QVRBX1JFUV9JTlQpKQo+ICsJCXJldHVybiBDRURSVVNfSVJRX0VSUk9SOwo+ICsKPiArCWlmIChy ZWcgJiBWRV9IMjY0X0NUUkxfU0xJQ0VfREVDT0RFX0lOVCkKPiArCQlyZXR1cm4gQ0VEUlVTX0lS UV9PSzsKPiArCj4gKwlyZXR1cm4gQ0VEUlVTX0lSUV9OT05FOwo+ICt9Cj4gKwo+ICtzdGF0aWMg dm9pZCBjZWRydXNfaDI2NF9pcnFfY2xlYXIoc3RydWN0IGNlZHJ1c19jdHggKmN0eCkKPiArewo+ ICsJc3RydWN0IGNlZHJ1c19kZXYgKmRldiA9IGN0eC0+ZGV2Owo+ICsKPiArCWNlZHJ1c193cml0 ZShkZXYsIFZFX0gyNjRfU1RBVFVTLAo+ICsJCSAgICAgVkVfSDI2NF9TVEFUVVNfSU5UX01BU0sp Owo+ICt9Cj4gKwo+ICtzdGF0aWMgdm9pZCBjZWRydXNfaDI2NF9pcnFfZGlzYWJsZShzdHJ1Y3Qg Y2VkcnVzX2N0eCAqY3R4KQo+ICt7Cj4gKwlzdHJ1Y3QgY2VkcnVzX2RldiAqZGV2ID0gY3R4LT5k ZXY7Cj4gKwl1MzIgcmVnID0gY2VkcnVzX3JlYWQoZGV2LCBWRV9IMjY0X0NUUkwpOwo+ICsKPiAr CWNlZHJ1c193cml0ZShkZXYsIFZFX0gyNjRfQ1RSTCwKPiArCQkgICAgIHJlZyAmIH5WRV9IMjY0 X0NUUkxfSU5UX01BU0spOwo+ICt9Cj4gKwo+ICtzdGF0aWMgdm9pZCBjZWRydXNfaDI2NF9zZXR1 cChzdHJ1Y3QgY2VkcnVzX2N0eCAqY3R4LAo+ICsJCQkgICAgICBzdHJ1Y3QgY2VkcnVzX3J1biAq cnVuKQo+ICt7Cj4gKwlzdHJ1Y3QgY2VkcnVzX2RldiAqZGV2ID0gY3R4LT5kZXY7Cj4gKwo+ICsJ Y2VkcnVzX2VuZ2luZV9lbmFibGUoZGV2LCBDRURSVVNfQ09ERUNfSDI2NCk7Cj4gKwo+ICsJY2Vk cnVzX3dyaXRlKGRldiwgVkVfSDI2NF9TRFJPVF9DVFJMLCAwKTsKPiArCWNlZHJ1c193cml0ZShk ZXYsIFZFX0gyNjRfRVhUUkFfQlVGRkVSMSwKPiArCQkgICAgIGN0eC0+Y29kZWMuaDI2NC5waWNf aW5mb19idWZfZG1hKTsKPiArCWNlZHJ1c193cml0ZShkZXYsIFZFX0gyNjRfRVhUUkFfQlVGRkVS MiwKPiArCQkgICAgIGN0eC0+Y29kZWMuaDI2NC5uZWlnaGJvcl9pbmZvX2J1Zl9kbWEpOwo+ICsK PiArCWNlZHJ1c193cml0ZV9zY2FsaW5nX2xpc3RzKGN0eCwgcnVuKTsKPiArCWNlZHJ1c193cml0 ZV9mcmFtZV9saXN0KGN0eCwgcnVuKTsKPiArCj4gKwljZWRydXNfc2V0X3BhcmFtcyhjdHgsIHJ1 bik7Cj4gK30KPiArCj4gK3N0YXRpYyBpbnQgY2VkcnVzX2gyNjRfc3RhcnQoc3RydWN0IGNlZHJ1 c19jdHggKmN0eCkKPiArewo+ICsJc3RydWN0IGNlZHJ1c19kZXYgKmRldiA9IGN0eC0+ZGV2Owo+ ICsJdW5zaWduZWQgaW50IGZpZWxkX3NpemU7Cj4gKwl1bnNpZ25lZCBpbnQgbXZfY29sX3NpemU7 Cj4gKwlpbnQgcmV0Owo+ICsKPiArCS8qCj4gKwkgKiBGSVhNRTogSXQgc2VlbXMgdGhhdCB0aGUg SDYgY2VkYXJYIGNvZGUgaXMgdXNpbmcgYSBmb3JtdWxhCj4gKwkgKiBoZXJlIGJhc2VkIG9uIHRo ZSBzaXplIG9mIHRoZSBmcmFtZSwgd2hpbGUgYWxsIHRoZSBvbGRlcgo+ICsJICogY29kZSBpcyB1 c2luZyBhIGZpeGVkIHNpemUsIHNvIHRoYXQgbWlnaHQgbmVlZCB0byBiZQo+ICsJICogY2hhbmdl ZCBhdCBzb21lIHBvaW50Lgo+ICsJICovCj4gKwljdHgtPmNvZGVjLmgyNjQucGljX2luZm9fYnVm ID0KPiArCQlkbWFfYWxsb2NfY29oZXJlbnQoZGV2LT5kZXYsIENFRFJVU19QSUNfSU5GT19CVUZf U0laRSwKPiArCQkJCSAgICZjdHgtPmNvZGVjLmgyNjQucGljX2luZm9fYnVmX2RtYSwKPiArCQkJ CSAgIEdGUF9LRVJORUwpOwo+ICsJaWYgKCFjdHgtPmNvZGVjLmgyNjQucGljX2luZm9fYnVmKQo+ ICsJCXJldHVybiAtRU5PTUVNOwo+ICsKPiArCS8qCj4gKwkgKiBUaGF0IGJ1ZmZlciBpcyBzdXBw b3NlZCB0byBiZSAxNmtpQiBpbiBzaXplLCBhbmQgYmUgYWxpZ25lZAo+ICsJICogb24gMTZraUIg YXMgd2VsbC4gSG93ZXZlciwgZG1hX2FsbG9jX2NvaGVyZW50IHByb3ZpZGVzIHRoZQo+ICsJICog Z3VhcmFudGVlIHRoYXQgd2UnbGwgaGF2ZSBhIENQVSBhbmQgRE1BIGFkZHJlc3MgYWxpZ25lZCBv bgo+ICsJICogdGhlIHNtYWxsZXN0IHBhZ2Ugb3JkZXIgdGhhdCBpcyBncmVhdGVyIHRvIHRoZSBy ZXF1ZXN0ZWQKPiArCSAqIHNpemUsIHNvIHdlIGRvbid0IGhhdmUgdG8gb3ZlcmFsbG9jYXRlLgo+ ICsJICovCj4gKwljdHgtPmNvZGVjLmgyNjQubmVpZ2hib3JfaW5mb19idWYgPQo+ICsJCWRtYV9h bGxvY19jb2hlcmVudChkZXYtPmRldiwgQ0VEUlVTX05FSUdIQk9SX0lORk9fQlVGX1NJWkUsCj4g KwkJCQkgICAmY3R4LT5jb2RlYy5oMjY0Lm5laWdoYm9yX2luZm9fYnVmX2RtYSwKPiArCQkJCSAg IEdGUF9LRVJORUwpOwo+ICsJaWYgKCFjdHgtPmNvZGVjLmgyNjQubmVpZ2hib3JfaW5mb19idWYp IHsKPiArCQlyZXQgPSAtRU5PTUVNOwo+ICsJCWdvdG8gZXJyX3BpY19idWY7Cj4gKwl9Cj4gKwo+ ICsJZmllbGRfc2l6ZSA9IERJVl9ST1VORF9VUChjdHgtPnNyY19mbXQud2lkdGgsIDE2KSAqCj4g KwkJRElWX1JPVU5EX1VQKGN0eC0+c3JjX2ZtdC5oZWlnaHQsIDE2KSAqIDE2Owo+ICsKPiArCS8q Cj4gKwkgKiBGSVhNRTogVGhpcyBpcyBhY3R1YWxseSBjb25kaXRpb25hbCB0bwo+ICsJICogVjRM Ml9IMjY0X1NQU19GTEFHX0RJUkVDVF84WDhfSU5GRVJFTkNFIG5vdCBiZWluZyBzZXQsIHdlCj4g KwkgKiBtaWdodCBoYXZlIHRvIHJld29yayB0aGlzIGlmIG1lbW9yeSBlZmZpY2llbmN5IGV2ZXIg aXMKPiArCSAqIHNvbWV0aGluZyB3ZSBuZWVkIHRvIHdvcmsgb24uCj4gKwkgKi8KPiArCWZpZWxk X3NpemUgPSBmaWVsZF9zaXplICogMjsKPiArCj4gKwkvKgo+ICsJICogRklYTUU6IFRoaXMgaXMg YWN0dWFsbHkgY29uZGl0aW9uYWwgdG8KPiArCSAqIFY0TDJfSDI2NF9TUFNfRkxBR19GUkFNRV9N QlNfT05MWSBub3QgYmVpbmcgc2V0LCB3ZSBtaWdodAo+ICsJICogaGF2ZSB0byByZXdvcmsgdGhp cyBpZiBtZW1vcnkgZWZmaWNpZW5jeSBldmVyIGlzIHNvbWV0aGluZwo+ICsJICogd2UgbmVlZCB0 byB3b3JrIG9uLgo+ICsJICovCj4gKwlmaWVsZF9zaXplID0gZmllbGRfc2l6ZSAqIDI7Cj4gKwlj dHgtPmNvZGVjLmgyNjQubXZfY29sX2J1Zl9maWVsZF9zaXplID0gZmllbGRfc2l6ZTsKPiArCj4g Kwltdl9jb2xfc2l6ZSA9IGZpZWxkX3NpemUgKiAyICogQ0VEUlVTX0gyNjRfRlJBTUVfTlVNOwo+ ICsJY3R4LT5jb2RlYy5oMjY0Lm12X2NvbF9idWZfc2l6ZSA9IG12X2NvbF9zaXplOwo+ICsJY3R4 LT5jb2RlYy5oMjY0Lm12X2NvbF9idWYgPSBkbWFfYWxsb2NfY29oZXJlbnQoZGV2LT5kZXYsCj4g KwkJCQkJCQljdHgtPmNvZGVjLmgyNjQubXZfY29sX2J1Zl9zaXplLAo+ICsJCQkJCQkJJmN0eC0+ Y29kZWMuaDI2NC5tdl9jb2xfYnVmX2RtYSwKPiArCQkJCQkJCUdGUF9LRVJORUwpOwo+ICsJaWYg KCFjdHgtPmNvZGVjLmgyNjQubXZfY29sX2J1Zikgewo+ICsJCXJldCA9IC1FTk9NRU07Cj4gKwkJ Z290byBlcnJfbmVpZ2hib3JfYnVmOwo+ICsJfQo+ICsKPiArCXJldHVybiAwOwo+ICsKPiArZXJy X25laWdoYm9yX2J1ZjoKPiArCWRtYV9mcmVlX2NvaGVyZW50KGRldi0+ZGV2LCBDRURSVVNfTkVJ R0hCT1JfSU5GT19CVUZfU0laRSwKPiArCQkJICBjdHgtPmNvZGVjLmgyNjQubmVpZ2hib3JfaW5m b19idWYsCj4gKwkJCSAgY3R4LT5jb2RlYy5oMjY0Lm5laWdoYm9yX2luZm9fYnVmX2RtYSk7Cj4g Kwo+ICtlcnJfcGljX2J1ZjoKPiArCWRtYV9mcmVlX2NvaGVyZW50KGRldi0+ZGV2LCBDRURSVVNf UElDX0lORk9fQlVGX1NJWkUsCj4gKwkJCSAgY3R4LT5jb2RlYy5oMjY0LnBpY19pbmZvX2J1ZiwK PiArCQkJICBjdHgtPmNvZGVjLmgyNjQucGljX2luZm9fYnVmX2RtYSk7Cj4gKwlyZXR1cm4gcmV0 Owo+ICt9Cj4gKwo+ICtzdGF0aWMgdm9pZCBjZWRydXNfaDI2NF9zdG9wKHN0cnVjdCBjZWRydXNf Y3R4ICpjdHgpCj4gK3sKPiArCXN0cnVjdCBjZWRydXNfZGV2ICpkZXYgPSBjdHgtPmRldjsKPiAr Cj4gKwlkbWFfZnJlZV9jb2hlcmVudChkZXYtPmRldiwgY3R4LT5jb2RlYy5oMjY0Lm12X2NvbF9i dWZfc2l6ZSwKPiArCQkJICBjdHgtPmNvZGVjLmgyNjQubXZfY29sX2J1ZiwKPiArCQkJICBjdHgt PmNvZGVjLmgyNjQubXZfY29sX2J1Zl9kbWEpOwo+ICsJZG1hX2ZyZWVfY29oZXJlbnQoZGV2LT5k ZXYsIENFRFJVU19ORUlHSEJPUl9JTkZPX0JVRl9TSVpFLAo+ICsJCQkgIGN0eC0+Y29kZWMuaDI2 NC5uZWlnaGJvcl9pbmZvX2J1ZiwKPiArCQkJICBjdHgtPmNvZGVjLmgyNjQubmVpZ2hib3JfaW5m b19idWZfZG1hKTsKPiArCWRtYV9mcmVlX2NvaGVyZW50KGRldi0+ZGV2LCBDRURSVVNfUElDX0lO Rk9fQlVGX1NJWkUsCj4gKwkJCSAgY3R4LT5jb2RlYy5oMjY0LnBpY19pbmZvX2J1ZiwKPiArCQkJ ICBjdHgtPmNvZGVjLmgyNjQucGljX2luZm9fYnVmX2RtYSk7Cj4gK30KPiArCj4gK3N0YXRpYyB2 b2lkIGNlZHJ1c19oMjY0X3RyaWdnZXIoc3RydWN0IGNlZHJ1c19jdHggKmN0eCkKPiArewo+ICsJ c3RydWN0IGNlZHJ1c19kZXYgKmRldiA9IGN0eC0+ZGV2Owo+ICsKPiArCWNlZHJ1c193cml0ZShk ZXYsIFZFX0gyNjRfVFJJR0dFUl9UWVBFLAo+ICsJCSAgICAgVkVfSDI2NF9UUklHR0VSX1RZUEVf QVZDX1NMSUNFX0RFQ09ERSk7Cj4gK30KPiArCj4gK3N0cnVjdCBjZWRydXNfZGVjX29wcyBjZWRy dXNfZGVjX29wc19oMjY0ID0gewo+ICsJLmlycV9jbGVhcgk9IGNlZHJ1c19oMjY0X2lycV9jbGVh ciwKPiArCS5pcnFfZGlzYWJsZQk9IGNlZHJ1c19oMjY0X2lycV9kaXNhYmxlLAo+ICsJLmlycV9z dGF0dXMJPSBjZWRydXNfaDI2NF9pcnFfc3RhdHVzLAo+ICsJLnNldHVwCQk9IGNlZHJ1c19oMjY0 X3NldHVwLAo+ICsJLnN0YXJ0CQk9IGNlZHJ1c19oMjY0X3N0YXJ0LAo+ICsJLnN0b3AJCT0gY2Vk cnVzX2gyNjRfc3RvcCwKPiArCS50cmlnZ2VyCT0gY2VkcnVzX2gyNjRfdHJpZ2dlciwKPiArfTsK PiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9zdGFnaW5nL21lZGlhL3N1bnhpL2NlZHJ1cy9jZWRydXNf aHcuYyBiL2RyaXZlcnMvc3RhZ2luZy9tZWRpYS9zdW54aS9jZWRydXMvY2VkcnVzX2h3LmMKPiBp bmRleCBmYmZmZjdjMWM3NzEuLjc0OGY3ZjY3MzU0NyAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL3N0 YWdpbmcvbWVkaWEvc3VueGkvY2VkcnVzL2NlZHJ1c19ody5jCj4gKysrIGIvZHJpdmVycy9zdGFn aW5nL21lZGlhL3N1bnhpL2NlZHJ1cy9jZWRydXNfaHcuYwo+IEBAIC00Niw2ICs0NiwxMCBAQCBp bnQgY2VkcnVzX2VuZ2luZV9lbmFibGUoc3RydWN0IGNlZHJ1c19kZXYgKmRldiwgZW51bSBjZWRy dXNfY29kZWMgY29kZWMpCj4gIAkJcmVnIHw9IFZFX01PREVfREVDX01QRUc7Cj4gIAkJYnJlYWs7 Cj4gIAo+ICsJY2FzZSBDRURSVVNfQ09ERUNfSDI2NDoKPiArCQlyZWcgfD0gVkVfTU9ERV9ERUNf SDI2NDsKPiArCQlicmVhazsKPiArCj4gIAlkZWZhdWx0Ogo+ICAJCXJldHVybiAtRUlOVkFMOwo+ ICAJfQo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL3N0YWdpbmcvbWVkaWEvc3VueGkvY2VkcnVzL2Nl ZHJ1c19yZWdzLmggYi9kcml2ZXJzL3N0YWdpbmcvbWVkaWEvc3VueGkvY2VkcnVzL2NlZHJ1c19y ZWdzLmgKPiBpbmRleCBkZTJkNmI2ZjY0YmYuLjNlOTkzMTQxNmU0NSAxMDA2NDQKPiAtLS0gYS9k cml2ZXJzL3N0YWdpbmcvbWVkaWEvc3VueGkvY2VkcnVzL2NlZHJ1c19yZWdzLmgKPiArKysgYi9k cml2ZXJzL3N0YWdpbmcvbWVkaWEvc3VueGkvY2VkcnVzL2NlZHJ1c19yZWdzLmgKPiBAQCAtMjMy LDQgKzIzMiw5NSBAQAo+ICAjZGVmaW5lIFZFX0RFQ19NUEVHX1JPVF9MVU1BCQkJKFZFX0VOR0lO RV9ERUNfTVBFRyArIDB4Y2MpCj4gICNkZWZpbmUgVkVfREVDX01QRUdfUk9UX0NIUk9NQQkJCShW RV9FTkdJTkVfREVDX01QRUcgKyAweGQwKQo+ICAKPiArI2RlZmluZSBWRV9IMjY0X1NQUwkJCTB4 MjAwCj4gKyNkZWZpbmUgVkVfSDI2NF9TUFNfTUJTX09OTFkJCQlCSVQoMTgpCj4gKyNkZWZpbmUg VkVfSDI2NF9TUFNfTUJfQURBUFRJVkVfRlJBTUVfRklFTEQJQklUKDE3KQo+ICsjZGVmaW5lIFZF X0gyNjRfU1BTX0RJUkVDVF84WDhfSU5GRVJFTkNFCUJJVCgxNikKPiArCj4gKyNkZWZpbmUgVkVf SDI2NF9QUFMJCQkweDIwNAo+ICsjZGVmaW5lIFZFX0gyNjRfUFBTX0VOVFJPUFlfQ09ESU5HX01P REUJCUJJVCgxNSkKPiArI2RlZmluZSBWRV9IMjY0X1BQU19XRUlHSFRFRF9QUkVECQlCSVQoNCkK PiArI2RlZmluZSBWRV9IMjY0X1BQU19DT05TVFJBSU5FRF9JTlRSQV9QUkVECUJJVCgxKQo+ICsj ZGVmaW5lIFZFX0gyNjRfUFBTX1RSQU5TRk9STV84WDhfTU9ERQkJQklUKDApCj4gKwo+ICsjZGVm aW5lIFZFX0gyNjRfU0hTCQkJMHgyMDgKPiArI2RlZmluZSBWRV9IMjY0X1NIU19GSVJTVF9TTElD RV9JTl9QSUMJCUJJVCg1KQo+ICsjZGVmaW5lIFZFX0gyNjRfU0hTX0ZJRUxEX1BJQwkJCUJJVCg0 KQo+ICsjZGVmaW5lIFZFX0gyNjRfU0hTX0JPVFRPTV9GSUVMRAkJQklUKDMpCj4gKyNkZWZpbmUg VkVfSDI2NF9TSFNfRElSRUNUX1NQQVRJQUxfTVZfUFJFRAlCSVQoMikKPiArCj4gKyNkZWZpbmUg VkVfSDI2NF9TSFMyCQkJMHgyMGMKPiArI2RlZmluZSBWRV9IMjY0X1NIUzJfTlVNX1JFRl9JRFhf QUNUSVZFX09WUkQJQklUKDEyKQo+ICsKPiArI2RlZmluZSBWRV9IMjY0X1NIU19XUAkJCTB4MjEw Cj4gKwo+ICsjZGVmaW5lIFZFX0gyNjRfU0hTX1FQCQkJMHgyMWMKPiArI2RlZmluZSBWRV9IMjY0 X1NIU19RUF9TQ0FMSU5HX01BVFJJWF9ERUZBVUxUCUJJVCgyNCkKPiArCj4gKyNkZWZpbmUgVkVf SDI2NF9DVFJMCQkJMHgyMjAKPiArI2RlZmluZSBWRV9IMjY0X0NUUkxfVkxEX0RBVEFfUkVRX0lO VAkJQklUKDIpCj4gKyNkZWZpbmUgVkVfSDI2NF9DVFJMX0RFQ09ERV9FUlJfSU5UCQlCSVQoMSkK PiArI2RlZmluZSBWRV9IMjY0X0NUUkxfU0xJQ0VfREVDT0RFX0lOVAkJQklUKDApCj4gKwo+ICsj ZGVmaW5lIFZFX0gyNjRfQ1RSTF9JTlRfTUFTSwkJKFZFX0gyNjRfQ1RSTF9WTERfREFUQV9SRVFf SU5UIHwgXAo+ICsJCQkJCSBWRV9IMjY0X0NUUkxfREVDT0RFX0VSUl9JTlQgfCBcCj4gKwkJCQkJ IFZFX0gyNjRfQ1RSTF9TTElDRV9ERUNPREVfSU5UKQo+ICsKPiArI2RlZmluZSBWRV9IMjY0X1RS SUdHRVJfVFlQRQkJMHgyMjQKPiArI2RlZmluZSBWRV9IMjY0X1RSSUdHRVJfVFlQRV9BVkNfU0xJ Q0VfREVDT0RFCSg4IDw8IDApCj4gKyNkZWZpbmUgVkVfSDI2NF9UUklHR0VSX1RZUEVfSU5JVF9T V0RFQwkJKDcgPDwgMCkKPiArCj4gKyNkZWZpbmUgVkVfSDI2NF9TVEFUVVMJCQkweDIyOAo+ICsj ZGVmaW5lIFZFX0gyNjRfU1RBVFVTX1ZMRF9EQVRBX1JFUV9JTlQJCVZFX0gyNjRfQ1RSTF9WTERf REFUQV9SRVFfSU5UCj4gKyNkZWZpbmUgVkVfSDI2NF9TVEFUVVNfREVDT0RFX0VSUl9JTlQJCVZF X0gyNjRfQ1RSTF9ERUNPREVfRVJSX0lOVAo+ICsjZGVmaW5lIFZFX0gyNjRfU1RBVFVTX1NMSUNF X0RFQ09ERV9JTlQJCVZFX0gyNjRfQ1RSTF9TTElDRV9ERUNPREVfSU5UCj4gKwo+ICsjZGVmaW5l IFZFX0gyNjRfU1RBVFVTX0lOVF9NQVNLCQkJVkVfSDI2NF9DVFJMX0lOVF9NQVNLCj4gKwo+ICsj ZGVmaW5lIFZFX0gyNjRfQ1VSX01CX05VTQkJMHgyMmMKPiArCj4gKyNkZWZpbmUgVkVfSDI2NF9W TERfQUREUgkJMHgyMzAKPiArI2RlZmluZSBWRV9IMjY0X1ZMRF9BRERSX0ZJUlNUCQkJQklUKDMw KQo+ICsjZGVmaW5lIFZFX0gyNjRfVkxEX0FERFJfTEFTVAkJCUJJVCgyOSkKPiArI2RlZmluZSBW RV9IMjY0X1ZMRF9BRERSX1ZBTElECQkJQklUKDI4KQo+ICsjZGVmaW5lIFZFX0gyNjRfVkxEX0FE RFJfVkFMKHgpCQkJKCgoeCkgJiAweDBmZmZmZmYwKSB8ICgoeCkgPj4gMjgpKQo+ICsKPiArI2Rl ZmluZSBWRV9IMjY0X1ZMRF9PRkZTRVQJCTB4MjM0Cj4gKyNkZWZpbmUgVkVfSDI2NF9WTERfTEVO CQkJMHgyMzgKPiArI2RlZmluZSBWRV9IMjY0X1ZMRF9FTkQJCQkweDIzYwo+ICsjZGVmaW5lIFZF X0gyNjRfU0RST1RfQ1RSTAkJMHgyNDAKPiArI2RlZmluZSBWRV9IMjY0X09VVFBVVF9GUkFNRV9J RFgJMHgyNGMKPiArI2RlZmluZSBWRV9IMjY0X0VYVFJBX0JVRkZFUjEJCTB4MjUwCj4gKyNkZWZp bmUgVkVfSDI2NF9FWFRSQV9CVUZGRVIyCQkweDI1NAo+ICsjZGVmaW5lIFZFX0gyNjRfQkFTSUNf QklUUwkJMHgyZGMKPiArI2RlZmluZSBWRV9BVkNfU1JBTV9QT1JUX09GRlNFVAkJMHgyZTAKPiAr I2RlZmluZSBWRV9BVkNfU1JBTV9QT1JUX0RBVEEJCTB4MmU0Cj4gKwo+ICsjZGVmaW5lIFZFX0lT UF9JTlBVVF9TSVpFCQkweGEwMAo+ICsjZGVmaW5lIFZFX0lTUF9JTlBVVF9TVFJJREUJCTB4YTA0 Cj4gKyNkZWZpbmUgVkVfSVNQX0NUUkwJCQkweGEwOAo+ICsjZGVmaW5lIFZFX0lTUF9JTlBVVF9M VU1BCQkweGE3OAo+ICsjZGVmaW5lIFZFX0lTUF9JTlBVVF9DSFJPTUEJCTB4YTdjCj4gKwo+ICsj ZGVmaW5lIFZFX0FWQ19QQVJBTQkJCTB4YjA0Cj4gKyNkZWZpbmUgVkVfQVZDX1FQCQkJMHhiMDgK PiArI2RlZmluZSBWRV9BVkNfTU9USU9OX0VTVAkJMHhiMTAKPiArI2RlZmluZSBWRV9BVkNfQ1RS TAkJCTB4YjE0Cj4gKyNkZWZpbmUgVkVfQVZDX1RSSUdHRVIJCQkweGIxOAo+ICsjZGVmaW5lIFZF X0FWQ19TVEFUVVMJCQkweGIxYwo+ICsjZGVmaW5lIFZFX0FWQ19CQVNJQ19CSVRTCQkweGIyMAo+ ICsjZGVmaW5lIFZFX0FWQ19VTktfQlVGCQkJMHhiNjAKPiArI2RlZmluZSBWRV9BVkNfVkxFX0FE RFIJCQkweGI4MAo+ICsjZGVmaW5lIFZFX0FWQ19WTEVfRU5ECQkJMHhiODQKPiArI2RlZmluZSBW RV9BVkNfVkxFX09GRlNFVAkJMHhiODgKPiArI2RlZmluZSBWRV9BVkNfVkxFX01BWAkJCTB4Yjhj Cj4gKyNkZWZpbmUgVkVfQVZDX1ZMRV9MRU5HVEgJCTB4YjkwCj4gKyNkZWZpbmUgVkVfQVZDX1JF Rl9MVU1BCQkJMHhiYTAKPiArI2RlZmluZSBWRV9BVkNfUkVGX0NIUk9NQQkJMHhiYTQKPiArI2Rl ZmluZSBWRV9BVkNfUkVDX0xVTUEJCQkweGJiMAo+ICsjZGVmaW5lIFZFX0FWQ19SRUNfQ0hST01B CQkweGJiNAo+ICsjZGVmaW5lIFZFX0FWQ19SRUZfU0xVTUEJCTB4YmI4Cj4gKyNkZWZpbmUgVkVf QVZDX1JFQ19TTFVNQQkJMHhiYmMKPiArI2RlZmluZSBWRV9BVkNfTUJfSU5GTwkJCTB4YmMwCj4g Kwo+ICAjZW5kaWYKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9zdGFnaW5nL21lZGlhL3N1bnhpL2Nl ZHJ1cy9jZWRydXNfdmlkZW8uYyBiL2RyaXZlcnMvc3RhZ2luZy9tZWRpYS9zdW54aS9jZWRydXMv Y2VkcnVzX3ZpZGVvLmMKPiBpbmRleCA5NjczODc0ZWNlMTAuLmUyYjUzMGIxYTk1NiAxMDA2NDQK PiAtLS0gYS9kcml2ZXJzL3N0YWdpbmcvbWVkaWEvc3VueGkvY2VkcnVzL2NlZHJ1c192aWRlby5j Cj4gKysrIGIvZHJpdmVycy9zdGFnaW5nL21lZGlhL3N1bnhpL2NlZHJ1cy9jZWRydXNfdmlkZW8u Ywo+IEBAIC0zOCw2ICszOCwxMCBAQCBzdGF0aWMgc3RydWN0IGNlZHJ1c19mb3JtYXQgY2VkcnVz X2Zvcm1hdHNbXSA9IHsKPiAgCQkuZGlyZWN0aW9ucwk9IENFRFJVU19ERUNPREVfU1JDLAo+ICAJ fSwKPiAgCXsKPiArCQkucGl4ZWxmb3JtYXQJPSBWNEwyX1BJWF9GTVRfSDI2NF9TTElDRV9SQVcs Cj4gKwkJLmRpcmVjdGlvbnMJPSBDRURSVVNfREVDT0RFX1NSQywKPiArCX0sCj4gKwl7Cj4gIAkJ LnBpeGVsZm9ybWF0CT0gVjRMMl9QSVhfRk1UX1NVTlhJX1RJTEVEX05WMTIsCj4gIAkJLmRpcmVj dGlvbnMJPSBDRURSVVNfREVDT0RFX0RTVCwKPiAgCX0sCj4gQEAgLTEwMCw2ICsxMDQsNyBAQCBz dGF0aWMgdm9pZCBjZWRydXNfcHJlcGFyZV9mb3JtYXQoc3RydWN0IHY0bDJfcGl4X2Zvcm1hdCAq cGl4X2ZtdCkKPiAgCj4gIAlzd2l0Y2ggKHBpeF9mbXQtPnBpeGVsZm9ybWF0KSB7Cj4gIAljYXNl IFY0TDJfUElYX0ZNVF9NUEVHMl9TTElDRToKPiArCWNhc2UgVjRMMl9QSVhfRk1UX0gyNjRfU0xJ Q0VfUkFXOgo+ICAJCS8qIFplcm8gYnl0ZXMgcGVyIGxpbmUgZm9yIGVuY29kZWQgc291cmNlLiAq Lwo+ICAJCWJ5dGVzcGVybGluZSA9IDA7Cj4gIAo+IEBAIC00NjQsNiArNDY5LDEwIEBAIHN0YXRp YyBpbnQgY2VkcnVzX3N0YXJ0X3N0cmVhbWluZyhzdHJ1Y3QgdmIyX3F1ZXVlICp2cSwgdW5zaWdu ZWQgaW50IGNvdW50KQo+ICAJCWN0eC0+Y3VycmVudF9jb2RlYyA9IENFRFJVU19DT0RFQ19NUEVH MjsKPiAgCQlicmVhazsKPiAgCj4gKwljYXNlIFY0TDJfUElYX0ZNVF9IMjY0X1NMSUNFX1JBVzoK PiArCQljdHgtPmN1cnJlbnRfY29kZWMgPSBDRURSVVNfQ09ERUNfSDI2NDsKPiArCQlicmVhazsK PiArCj4gIAlkZWZhdWx0Ogo+ICAJCXJldHVybiAtRUlOVkFMOwo+ICAJfQotLSAKUGF1bCBLb2Np YWxrb3dza2ksIEJvb3RsaW4KRW1iZWRkZWQgTGludXggYW5kIGtlcm5lbCBlbmdpbmVlcmluZwpo dHRwczovL2Jvb3RsaW4uY29tCgoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX18KbGludXgtYXJtLWtlcm5lbCBtYWlsaW5nIGxpc3QKbGludXgtYXJtLWtlcm5l bEBsaXN0cy5pbmZyYWRlYWQub3JnCmh0dHA6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4v bGlzdGluZm8vbGludXgtYXJtLWtlcm5lbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED autolearn=ham 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Message-ID: <72d82086b0380cd0964ee0e2f7358c7b8f5f20e1.camel@bootlin.com> Subject: Re: [PATCH v8 2/2] media: cedrus: Add H264 decoding support From: Paul Kocialkowski To: Maxime Ripard , hans.verkuil@cisco.com, acourbot@chromium.org, sakari.ailus@linux.intel.com, Laurent Pinchart Cc: tfiga@chromium.org, posciak@chromium.org, Chen-Yu Tsai , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, nicolas.dufresne@collabora.com, jenskuske@gmail.com, jernej.skrabec@gmail.com, jonas@kwiboo.se, ezequiel@collabora.com, linux-sunxi@googlegroups.com, Thomas Petazzoni , Jernej Skrabec Date: Wed, 10 Apr 2019 15:45:07 +0200 In-Reply-To: <157519b5571e24c9ef4189d30f8434b5b61121b1.1554382670.git-series.maxime.ripard@bootlin.com> References: <157519b5571e24c9ef4189d30f8434b5b61121b1.1554382670.git-series.maxime.ripard@bootlin.com> Organization: Bootlin Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.32.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Hi, Le jeudi 04 avril 2019 à 14:59 +0200, Maxime Ripard a écrit : > Introduce some basic H264 decoding support in cedrus. So far, only the > baseline profile videos have been tested, and some more advanced features > used in higher profiles are not even implemented. With the change to rename V4L2_PIX_FMT_H264_SLICE_RAW and make it private, this is: Reviewed-by: Paul Kocialkowski Cheers, Paul > Reviewed-by: Jernej Skrabec > Signed-off-by: Maxime Ripard > --- > drivers/staging/media/sunxi/cedrus/Makefile | 3 +- > drivers/staging/media/sunxi/cedrus/cedrus.c | 31 +- > drivers/staging/media/sunxi/cedrus/cedrus.h | 38 +- > drivers/staging/media/sunxi/cedrus/cedrus_dec.c | 13 +- > drivers/staging/media/sunxi/cedrus/cedrus_h264.c | 574 +++++++++++++++- > drivers/staging/media/sunxi/cedrus/cedrus_hw.c | 4 +- > drivers/staging/media/sunxi/cedrus/cedrus_regs.h | 91 ++- > drivers/staging/media/sunxi/cedrus/cedrus_video.c | 9 +- > 8 files changed, 761 insertions(+), 2 deletions(-) > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_h264.c > > diff --git a/drivers/staging/media/sunxi/cedrus/Makefile b/drivers/staging/media/sunxi/cedrus/Makefile > index 808842f0119e..c85ac6db0302 100644 > --- a/drivers/staging/media/sunxi/cedrus/Makefile > +++ b/drivers/staging/media/sunxi/cedrus/Makefile > @@ -1,4 +1,5 @@ > # SPDX-License-Identifier: GPL-2.0 > obj-$(CONFIG_VIDEO_SUNXI_CEDRUS) += sunxi-cedrus.o > > -sunxi-cedrus-y = cedrus.o cedrus_video.o cedrus_hw.o cedrus_dec.o cedrus_mpeg2.o > +sunxi-cedrus-y = cedrus.o cedrus_video.o cedrus_hw.o cedrus_dec.o \ > + cedrus_mpeg2.o cedrus_h264.o > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c > index b98add3cdedd..d613f5c24a2f 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus.c > +++ b/drivers/staging/media/sunxi/cedrus/cedrus.c > @@ -40,6 +40,36 @@ static const struct cedrus_control cedrus_controls[] = { > .codec = CEDRUS_CODEC_MPEG2, > .required = false, > }, > + { > + .id = V4L2_CID_MPEG_VIDEO_H264_DECODE_PARAMS, > + .elem_size = sizeof(struct v4l2_ctrl_h264_decode_params), > + .codec = CEDRUS_CODEC_H264, > + .required = true, > + }, > + { > + .id = V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS, > + .elem_size = sizeof(struct v4l2_ctrl_h264_slice_params), > + .codec = CEDRUS_CODEC_H264, > + .required = true, > + }, > + { > + .id = V4L2_CID_MPEG_VIDEO_H264_SPS, > + .elem_size = sizeof(struct v4l2_ctrl_h264_sps), > + .codec = CEDRUS_CODEC_H264, > + .required = true, > + }, > + { > + .id = V4L2_CID_MPEG_VIDEO_H264_PPS, > + .elem_size = sizeof(struct v4l2_ctrl_h264_pps), > + .codec = CEDRUS_CODEC_H264, > + .required = true, > + }, > + { > + .id = V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX, > + .elem_size = sizeof(struct v4l2_ctrl_h264_scaling_matrix), > + .codec = CEDRUS_CODEC_H264, > + .required = true, > + }, > }; > > #define CEDRUS_CONTROLS_COUNT ARRAY_SIZE(cedrus_controls) > @@ -278,6 +308,7 @@ static int cedrus_probe(struct platform_device *pdev) > } > > dev->dec_ops[CEDRUS_CODEC_MPEG2] = &cedrus_dec_ops_mpeg2; > + dev->dec_ops[CEDRUS_CODEC_H264] = &cedrus_dec_ops_h264; > > mutex_init(&dev->dev_mutex); > > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.h b/drivers/staging/media/sunxi/cedrus/cedrus.h > index c57c04b41d2e..bef79f630520 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus.h > +++ b/drivers/staging/media/sunxi/cedrus/cedrus.h > @@ -32,7 +32,7 @@ > > enum cedrus_codec { > CEDRUS_CODEC_MPEG2, > - > + CEDRUS_CODEC_H264, > CEDRUS_CODEC_LAST, > }; > > @@ -42,6 +42,12 @@ enum cedrus_irq_status { > CEDRUS_IRQ_OK, > }; > > +enum cedrus_h264_pic_type { > + CEDRUS_H264_PIC_TYPE_FRAME = 0, > + CEDRUS_H264_PIC_TYPE_FIELD, > + CEDRUS_H264_PIC_TYPE_MBAFF, > +}; > + > struct cedrus_control { > u32 id; > u32 elem_size; > @@ -49,6 +55,14 @@ struct cedrus_control { > unsigned char required:1; > }; > > +struct cedrus_h264_run { > + const struct v4l2_ctrl_h264_decode_params *decode_params; > + const struct v4l2_ctrl_h264_pps *pps; > + const struct v4l2_ctrl_h264_scaling_matrix *scaling_matrix; > + const struct v4l2_ctrl_h264_slice_params *slice_params; > + const struct v4l2_ctrl_h264_sps *sps; > +}; > + > struct cedrus_mpeg2_run { > const struct v4l2_ctrl_mpeg2_slice_params *slice_params; > const struct v4l2_ctrl_mpeg2_quantization *quantization; > @@ -59,12 +73,20 @@ struct cedrus_run { > struct vb2_v4l2_buffer *dst; > > union { > + struct cedrus_h264_run h264; > struct cedrus_mpeg2_run mpeg2; > }; > }; > > struct cedrus_buffer { > struct v4l2_m2m_buffer m2m_buf; > + > + union { > + struct { > + unsigned int position; > + enum cedrus_h264_pic_type pic_type; > + } h264; > + } codec; > }; > > struct cedrus_ctx { > @@ -79,6 +101,19 @@ struct cedrus_ctx { > struct v4l2_ctrl **ctrls; > > struct vb2_buffer *dst_bufs[VIDEO_MAX_FRAME]; > + > + union { > + struct { > + void *mv_col_buf; > + dma_addr_t mv_col_buf_dma; > + ssize_t mv_col_buf_field_size; > + ssize_t mv_col_buf_size; > + void *pic_info_buf; > + dma_addr_t pic_info_buf_dma; > + void *neighbor_info_buf; > + dma_addr_t neighbor_info_buf_dma; > + } h264; > + } codec; > }; > > struct cedrus_dec_ops { > @@ -121,6 +156,7 @@ struct cedrus_dev { > }; > > extern struct cedrus_dec_ops cedrus_dec_ops_mpeg2; > +extern struct cedrus_dec_ops cedrus_dec_ops_h264; > > static inline void cedrus_write(struct cedrus_dev *dev, u32 reg, u32 val) > { > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_dec.c b/drivers/staging/media/sunxi/cedrus/cedrus_dec.c > index 4d6d602cdde6..bdad87eb9d79 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus_dec.c > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_dec.c > @@ -46,6 +46,19 @@ void cedrus_device_run(void *priv) > V4L2_CID_MPEG_VIDEO_MPEG2_QUANTIZATION); > break; > > + case V4L2_PIX_FMT_H264_SLICE_RAW: > + run.h264.decode_params = cedrus_find_control_data(ctx, > + V4L2_CID_MPEG_VIDEO_H264_DECODE_PARAMS); > + run.h264.pps = cedrus_find_control_data(ctx, > + V4L2_CID_MPEG_VIDEO_H264_PPS); > + run.h264.scaling_matrix = cedrus_find_control_data(ctx, > + V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX); > + run.h264.slice_params = cedrus_find_control_data(ctx, > + V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS); > + run.h264.sps = cedrus_find_control_data(ctx, > + V4L2_CID_MPEG_VIDEO_H264_SPS); > + break; > + > default: > break; > } > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c > new file mode 100644 > index 000000000000..2c98a3e46d2b > --- /dev/null > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c > @@ -0,0 +1,574 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later > +/* > + * Cedrus VPU driver > + * > + * Copyright (c) 2013 Jens Kuske > + * Copyright (c) 2018 Bootlin > + */ > + > +#include > + > +#include > + > +#include "cedrus.h" > +#include "cedrus_hw.h" > +#include "cedrus_regs.h" > + > +enum cedrus_h264_sram_off { > + CEDRUS_SRAM_H264_PRED_WEIGHT_TABLE = 0x000, > + CEDRUS_SRAM_H264_FRAMEBUFFER_LIST = 0x100, > + CEDRUS_SRAM_H264_REF_LIST_0 = 0x190, > + CEDRUS_SRAM_H264_REF_LIST_1 = 0x199, > + CEDRUS_SRAM_H264_SCALING_LIST_8x8_0 = 0x200, > + CEDRUS_SRAM_H264_SCALING_LIST_8x8_1 = 0x210, > + CEDRUS_SRAM_H264_SCALING_LIST_4x4 = 0x220, > +}; > + > +struct cedrus_h264_sram_ref_pic { > + __le32 top_field_order_cnt; > + __le32 bottom_field_order_cnt; > + __le32 frame_info; > + __le32 luma_ptr; > + __le32 chroma_ptr; > + __le32 mv_col_top_ptr; > + __le32 mv_col_bot_ptr; > + __le32 reserved; > +} __packed; > + > +#define CEDRUS_H264_FRAME_NUM 18 > + > +#define CEDRUS_NEIGHBOR_INFO_BUF_SIZE (16 * SZ_1K) > +#define CEDRUS_PIC_INFO_BUF_SIZE (128 * SZ_1K) > + > +static void cedrus_h264_write_sram(struct cedrus_dev *dev, > + enum cedrus_h264_sram_off off, > + const void *data, size_t len) > +{ > + const u32 *buffer = data; > + size_t count = DIV_ROUND_UP(len, 4); > + > + cedrus_write(dev, VE_AVC_SRAM_PORT_OFFSET, off << 2); > + > + while (count--) > + cedrus_write(dev, VE_AVC_SRAM_PORT_DATA, *buffer++); > +} > + > +static dma_addr_t cedrus_h264_mv_col_buf_addr(struct cedrus_ctx *ctx, > + unsigned int position, > + unsigned int field) > +{ > + dma_addr_t addr = ctx->codec.h264.mv_col_buf_dma; > + > + /* Adjust for the position */ > + addr += position * ctx->codec.h264.mv_col_buf_field_size * 2; > + > + /* Adjust for the field */ > + addr += field * ctx->codec.h264.mv_col_buf_field_size; > + > + return addr; > +} > + > +static void cedrus_fill_ref_pic(struct cedrus_ctx *ctx, > + struct cedrus_buffer *buf, > + unsigned int top_field_order_cnt, > + unsigned int bottom_field_order_cnt, > + struct cedrus_h264_sram_ref_pic *pic) > +{ > + struct vb2_buffer *vbuf = &buf->m2m_buf.vb.vb2_buf; > + unsigned int position = buf->codec.h264.position; > + > + pic->top_field_order_cnt = top_field_order_cnt; > + pic->bottom_field_order_cnt = bottom_field_order_cnt; > + pic->frame_info = buf->codec.h264.pic_type << 8; > + > + pic->luma_ptr = cedrus_buf_addr(vbuf, &ctx->dst_fmt, 0); > + pic->chroma_ptr = cedrus_buf_addr(vbuf, &ctx->dst_fmt, 1); > + pic->mv_col_top_ptr = cedrus_h264_mv_col_buf_addr(ctx, position, 0); > + pic->mv_col_bot_ptr = cedrus_h264_mv_col_buf_addr(ctx, position, 1); > +} > + > +static void cedrus_write_frame_list(struct cedrus_ctx *ctx, > + struct cedrus_run *run) > +{ > + struct cedrus_h264_sram_ref_pic pic_list[CEDRUS_H264_FRAME_NUM]; > + const struct v4l2_ctrl_h264_decode_params *decode = run->h264.decode_params; > + const struct v4l2_ctrl_h264_slice_params *slice = run->h264.slice_params; > + const struct v4l2_ctrl_h264_sps *sps = run->h264.sps; > + struct vb2_queue *cap_q = &ctx->fh.m2m_ctx->cap_q_ctx.q; > + struct cedrus_buffer *output_buf; > + struct cedrus_dev *dev = ctx->dev; > + unsigned long used_dpbs = 0; > + unsigned int position; > + unsigned int output = 0; > + unsigned int i; > + > + memset(pic_list, 0, sizeof(pic_list)); > + > + for (i = 0; i < ARRAY_SIZE(decode->dpb); i++) { > + const struct v4l2_h264_dpb_entry *dpb = &decode->dpb[i]; > + struct cedrus_buffer *cedrus_buf; > + int buf_idx; > + > + if (!(dpb->flags & V4L2_H264_DPB_ENTRY_FLAG_VALID)) > + continue; > + > + buf_idx = vb2_find_timestamp(cap_q, dpb->reference_ts, 0); > + if (buf_idx < 0) > + continue; > + > + cedrus_buf = vb2_to_cedrus_buffer(ctx->dst_bufs[buf_idx]); > + position = cedrus_buf->codec.h264.position; > + used_dpbs |= BIT(position); > + > + if (!(dpb->flags & V4L2_H264_DPB_ENTRY_FLAG_ACTIVE)) > + continue; > + > + cedrus_fill_ref_pic(ctx, cedrus_buf, > + dpb->top_field_order_cnt, > + dpb->bottom_field_order_cnt, > + &pic_list[position]); > + > + output = max(position, output); > + } > + > + position = find_next_zero_bit(&used_dpbs, CEDRUS_H264_FRAME_NUM, > + output); > + if (position >= CEDRUS_H264_FRAME_NUM) > + position = find_first_zero_bit(&used_dpbs, CEDRUS_H264_FRAME_NUM); > + > + output_buf = vb2_to_cedrus_buffer(&run->dst->vb2_buf); > + output_buf->codec.h264.position = position; > + > + if (slice->flags & V4L2_H264_SLICE_FLAG_FIELD_PIC) > + output_buf->codec.h264.pic_type = CEDRUS_H264_PIC_TYPE_FIELD; > + else if (sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD) > + output_buf->codec.h264.pic_type = CEDRUS_H264_PIC_TYPE_MBAFF; > + else > + output_buf->codec.h264.pic_type = CEDRUS_H264_PIC_TYPE_FRAME; > + > + cedrus_fill_ref_pic(ctx, output_buf, > + decode->top_field_order_cnt, > + decode->bottom_field_order_cnt, > + &pic_list[position]); > + > + cedrus_h264_write_sram(dev, CEDRUS_SRAM_H264_FRAMEBUFFER_LIST, > + pic_list, sizeof(pic_list)); > + > + cedrus_write(dev, VE_H264_OUTPUT_FRAME_IDX, position); > +} > + > +#define CEDRUS_MAX_REF_IDX 32 > + > +static void _cedrus_write_ref_list(struct cedrus_ctx *ctx, > + struct cedrus_run *run, > + const u8 *ref_list, u8 num_ref, > + enum cedrus_h264_sram_off sram) > +{ > + const struct v4l2_ctrl_h264_decode_params *decode = run->h264.decode_params; > + struct vb2_queue *cap_q = &ctx->fh.m2m_ctx->cap_q_ctx.q; > + struct cedrus_dev *dev = ctx->dev; > + u8 sram_array[CEDRUS_MAX_REF_IDX]; > + unsigned int i; > + size_t size; > + > + memset(sram_array, 0, sizeof(sram_array)); > + > + for (i = 0; i < num_ref; i++) { > + const struct v4l2_h264_dpb_entry *dpb; > + const struct cedrus_buffer *cedrus_buf; > + const struct vb2_v4l2_buffer *ref_buf; > + unsigned int position; > + int buf_idx; > + u8 dpb_idx; > + > + dpb_idx = ref_list[i]; > + dpb = &decode->dpb[dpb_idx]; > + > + if (!(dpb->flags & V4L2_H264_DPB_ENTRY_FLAG_ACTIVE)) > + continue; > + > + buf_idx = vb2_find_timestamp(cap_q, dpb->reference_ts, 0); > + if (buf_idx < 0) > + continue; > + > + ref_buf = to_vb2_v4l2_buffer(ctx->dst_bufs[buf_idx]); > + cedrus_buf = vb2_v4l2_to_cedrus_buffer(ref_buf); > + position = cedrus_buf->codec.h264.position; > + > + sram_array[i] |= position << 1; > + if (ref_buf->field == V4L2_FIELD_BOTTOM) > + sram_array[i] |= BIT(0); > + } > + > + size = min_t(size_t, ALIGN(num_ref, 4), sizeof(sram_array)); > + cedrus_h264_write_sram(dev, sram, &sram_array, size); > +} > + > +static void cedrus_write_ref_list0(struct cedrus_ctx *ctx, > + struct cedrus_run *run) > +{ > + const struct v4l2_ctrl_h264_slice_params *slice = run->h264.slice_params; > + > + _cedrus_write_ref_list(ctx, run, > + slice->ref_pic_list0, > + slice->num_ref_idx_l0_active_minus1 + 1, > + CEDRUS_SRAM_H264_REF_LIST_0); > +} > + > +static void cedrus_write_ref_list1(struct cedrus_ctx *ctx, > + struct cedrus_run *run) > +{ > + const struct v4l2_ctrl_h264_slice_params *slice = run->h264.slice_params; > + > + _cedrus_write_ref_list(ctx, run, > + slice->ref_pic_list1, > + slice->num_ref_idx_l1_active_minus1 + 1, > + CEDRUS_SRAM_H264_REF_LIST_1); > +} > + > +static void cedrus_write_scaling_lists(struct cedrus_ctx *ctx, > + struct cedrus_run *run) > +{ > + const struct v4l2_ctrl_h264_scaling_matrix *scaling = > + run->h264.scaling_matrix; > + struct cedrus_dev *dev = ctx->dev; > + > + cedrus_h264_write_sram(dev, CEDRUS_SRAM_H264_SCALING_LIST_8x8_0, > + scaling->scaling_list_8x8[0], > + sizeof(scaling->scaling_list_8x8[0])); > + > + cedrus_h264_write_sram(dev, CEDRUS_SRAM_H264_SCALING_LIST_8x8_1, > + scaling->scaling_list_8x8[3], > + sizeof(scaling->scaling_list_8x8[3])); > + > + cedrus_h264_write_sram(dev, CEDRUS_SRAM_H264_SCALING_LIST_4x4, > + scaling->scaling_list_4x4, > + sizeof(scaling->scaling_list_4x4)); > +} > + > +static void cedrus_write_pred_weight_table(struct cedrus_ctx *ctx, > + struct cedrus_run *run) > +{ > + const struct v4l2_ctrl_h264_slice_params *slice = > + run->h264.slice_params; > + const struct v4l2_h264_pred_weight_table *pred_weight = > + &slice->pred_weight_table; > + struct cedrus_dev *dev = ctx->dev; > + int i, j, k; > + > + cedrus_write(dev, VE_H264_SHS_WP, > + ((pred_weight->chroma_log2_weight_denom & 0x7) << 4) | > + ((pred_weight->luma_log2_weight_denom & 0x7) << 0)); > + > + cedrus_write(dev, VE_AVC_SRAM_PORT_OFFSET, > + CEDRUS_SRAM_H264_PRED_WEIGHT_TABLE << 2); > + > + for (i = 0; i < ARRAY_SIZE(pred_weight->weight_factors); i++) { > + const struct v4l2_h264_weight_factors *factors = > + &pred_weight->weight_factors[i]; > + > + for (j = 0; j < ARRAY_SIZE(factors->luma_weight); j++) { > + u32 val; > + > + val = (((u32)factors->luma_offset[j] & 0x1ff) << 16) | > + (factors->luma_weight[j] & 0x1ff); > + cedrus_write(dev, VE_AVC_SRAM_PORT_DATA, val); > + } > + > + for (j = 0; j < ARRAY_SIZE(factors->chroma_weight); j++) { > + for (k = 0; k < ARRAY_SIZE(factors->chroma_weight[0]); k++) { > + u32 val; > + > + val = (((u32)factors->chroma_offset[j][k] & 0x1ff) << 16) | > + (factors->chroma_weight[j][k] & 0x1ff); > + cedrus_write(dev, VE_AVC_SRAM_PORT_DATA, val); > + } > + } > + } > +} > + > +static void cedrus_set_params(struct cedrus_ctx *ctx, > + struct cedrus_run *run) > +{ > + const struct v4l2_ctrl_h264_decode_params *decode = run->h264.decode_params; > + const struct v4l2_ctrl_h264_slice_params *slice = run->h264.slice_params; > + const struct v4l2_ctrl_h264_pps *pps = run->h264.pps; > + const struct v4l2_ctrl_h264_sps *sps = run->h264.sps; > + struct vb2_buffer *src_buf = &run->src->vb2_buf; > + struct cedrus_dev *dev = ctx->dev; > + dma_addr_t src_buf_addr; > + u32 offset = slice->header_bit_size; > + u32 len = (slice->size * 8) - offset; > + u32 reg; > + > + cedrus_write(dev, VE_H264_VLD_LEN, len); > + cedrus_write(dev, VE_H264_VLD_OFFSET, offset); > + > + src_buf_addr = vb2_dma_contig_plane_dma_addr(src_buf, 0); > + cedrus_write(dev, VE_H264_VLD_END, > + src_buf_addr + vb2_get_plane_payload(src_buf, 0)); > + cedrus_write(dev, VE_H264_VLD_ADDR, > + VE_H264_VLD_ADDR_VAL(src_buf_addr) | > + VE_H264_VLD_ADDR_FIRST | VE_H264_VLD_ADDR_VALID | > + VE_H264_VLD_ADDR_LAST); > + > + /* > + * FIXME: Since the bitstream parsing is done in software, and > + * in userspace, this shouldn't be needed anymore. But it > + * turns out that removing it breaks the decoding process, > + * without any clear indication why. > + */ > + cedrus_write(dev, VE_H264_TRIGGER_TYPE, > + VE_H264_TRIGGER_TYPE_INIT_SWDEC); > + > + if (((pps->flags & V4L2_H264_PPS_FLAG_WEIGHTED_PRED) && > + (slice->slice_type == V4L2_H264_SLICE_TYPE_P || > + slice->slice_type == V4L2_H264_SLICE_TYPE_SP)) || > + (pps->weighted_bipred_idc == 1 && > + slice->slice_type == V4L2_H264_SLICE_TYPE_B)) > + cedrus_write_pred_weight_table(ctx, run); > + > + if ((slice->slice_type == V4L2_H264_SLICE_TYPE_P) || > + (slice->slice_type == V4L2_H264_SLICE_TYPE_SP) || > + (slice->slice_type == V4L2_H264_SLICE_TYPE_B)) > + cedrus_write_ref_list0(ctx, run); > + > + if (slice->slice_type == V4L2_H264_SLICE_TYPE_B) > + cedrus_write_ref_list1(ctx, run); > + > + // picture parameters > + reg = 0; > + /* > + * FIXME: the kernel headers are allowing the default value to > + * be passed, but the libva doesn't give us that. > + */ > + reg |= (slice->num_ref_idx_l0_active_minus1 & 0x1f) << 10; > + reg |= (slice->num_ref_idx_l1_active_minus1 & 0x1f) << 5; > + reg |= (pps->weighted_bipred_idc & 0x3) << 2; > + if (pps->flags & V4L2_H264_PPS_FLAG_ENTROPY_CODING_MODE) > + reg |= VE_H264_PPS_ENTROPY_CODING_MODE; > + if (pps->flags & V4L2_H264_PPS_FLAG_WEIGHTED_PRED) > + reg |= VE_H264_PPS_WEIGHTED_PRED; > + if (pps->flags & V4L2_H264_PPS_FLAG_CONSTRAINED_INTRA_PRED) > + reg |= VE_H264_PPS_CONSTRAINED_INTRA_PRED; > + if (pps->flags & V4L2_H264_PPS_FLAG_TRANSFORM_8X8_MODE) > + reg |= VE_H264_PPS_TRANSFORM_8X8_MODE; > + cedrus_write(dev, VE_H264_PPS, reg); > + > + // sequence parameters > + reg = 0; > + reg |= (sps->chroma_format_idc & 0x7) << 19; > + reg |= (sps->pic_width_in_mbs_minus1 & 0xff) << 8; > + reg |= sps->pic_height_in_map_units_minus1 & 0xff; > + if (sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY) > + reg |= VE_H264_SPS_MBS_ONLY; > + if (sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD) > + reg |= VE_H264_SPS_MB_ADAPTIVE_FRAME_FIELD; > + if (sps->flags & V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE) > + reg |= VE_H264_SPS_DIRECT_8X8_INFERENCE; > + cedrus_write(dev, VE_H264_SPS, reg); > + > + // slice parameters > + reg = 0; > + reg |= decode->nal_ref_idc ? BIT(12) : 0; > + reg |= (slice->slice_type & 0xf) << 8; > + reg |= slice->cabac_init_idc & 0x3; > + reg |= VE_H264_SHS_FIRST_SLICE_IN_PIC; > + if (slice->flags & V4L2_H264_SLICE_FLAG_FIELD_PIC) > + reg |= VE_H264_SHS_FIELD_PIC; > + if (slice->flags & V4L2_H264_SLICE_FLAG_BOTTOM_FIELD) > + reg |= VE_H264_SHS_BOTTOM_FIELD; > + if (slice->flags & V4L2_H264_SLICE_FLAG_DIRECT_SPATIAL_MV_PRED) > + reg |= VE_H264_SHS_DIRECT_SPATIAL_MV_PRED; > + cedrus_write(dev, VE_H264_SHS, reg); > + > + reg = 0; > + reg |= VE_H264_SHS2_NUM_REF_IDX_ACTIVE_OVRD; > + reg |= (slice->num_ref_idx_l0_active_minus1 & 0x1f) << 24; > + reg |= (slice->num_ref_idx_l1_active_minus1 & 0x1f) << 16; > + reg |= (slice->disable_deblocking_filter_idc & 0x3) << 8; > + reg |= (slice->slice_alpha_c0_offset_div2 & 0xf) << 4; > + reg |= slice->slice_beta_offset_div2 & 0xf; > + cedrus_write(dev, VE_H264_SHS2, reg); > + > + reg = 0; > + reg |= (pps->second_chroma_qp_index_offset & 0x3f) << 16; > + reg |= (pps->chroma_qp_index_offset & 0x3f) << 8; > + reg |= (pps->pic_init_qp_minus26 + 26 + slice->slice_qp_delta) & 0x3f; > + cedrus_write(dev, VE_H264_SHS_QP, reg); > + > + // clear status flags > + cedrus_write(dev, VE_H264_STATUS, cedrus_read(dev, VE_H264_STATUS)); > + > + // enable int > + cedrus_write(dev, VE_H264_CTRL, > + VE_H264_CTRL_SLICE_DECODE_INT | > + VE_H264_CTRL_DECODE_ERR_INT | > + VE_H264_CTRL_VLD_DATA_REQ_INT); > +} > + > +static enum cedrus_irq_status > +cedrus_h264_irq_status(struct cedrus_ctx *ctx) > +{ > + struct cedrus_dev *dev = ctx->dev; > + u32 reg = cedrus_read(dev, VE_H264_STATUS); > + > + if (reg & (VE_H264_STATUS_DECODE_ERR_INT | > + VE_H264_STATUS_VLD_DATA_REQ_INT)) > + return CEDRUS_IRQ_ERROR; > + > + if (reg & VE_H264_CTRL_SLICE_DECODE_INT) > + return CEDRUS_IRQ_OK; > + > + return CEDRUS_IRQ_NONE; > +} > + > +static void cedrus_h264_irq_clear(struct cedrus_ctx *ctx) > +{ > + struct cedrus_dev *dev = ctx->dev; > + > + cedrus_write(dev, VE_H264_STATUS, > + VE_H264_STATUS_INT_MASK); > +} > + > +static void cedrus_h264_irq_disable(struct cedrus_ctx *ctx) > +{ > + struct cedrus_dev *dev = ctx->dev; > + u32 reg = cedrus_read(dev, VE_H264_CTRL); > + > + cedrus_write(dev, VE_H264_CTRL, > + reg & ~VE_H264_CTRL_INT_MASK); > +} > + > +static void cedrus_h264_setup(struct cedrus_ctx *ctx, > + struct cedrus_run *run) > +{ > + struct cedrus_dev *dev = ctx->dev; > + > + cedrus_engine_enable(dev, CEDRUS_CODEC_H264); > + > + cedrus_write(dev, VE_H264_SDROT_CTRL, 0); > + cedrus_write(dev, VE_H264_EXTRA_BUFFER1, > + ctx->codec.h264.pic_info_buf_dma); > + cedrus_write(dev, VE_H264_EXTRA_BUFFER2, > + ctx->codec.h264.neighbor_info_buf_dma); > + > + cedrus_write_scaling_lists(ctx, run); > + cedrus_write_frame_list(ctx, run); > + > + cedrus_set_params(ctx, run); > +} > + > +static int cedrus_h264_start(struct cedrus_ctx *ctx) > +{ > + struct cedrus_dev *dev = ctx->dev; > + unsigned int field_size; > + unsigned int mv_col_size; > + int ret; > + > + /* > + * FIXME: It seems that the H6 cedarX code is using a formula > + * here based on the size of the frame, while all the older > + * code is using a fixed size, so that might need to be > + * changed at some point. > + */ > + ctx->codec.h264.pic_info_buf = > + dma_alloc_coherent(dev->dev, CEDRUS_PIC_INFO_BUF_SIZE, > + &ctx->codec.h264.pic_info_buf_dma, > + GFP_KERNEL); > + if (!ctx->codec.h264.pic_info_buf) > + return -ENOMEM; > + > + /* > + * That buffer is supposed to be 16kiB in size, and be aligned > + * on 16kiB as well. However, dma_alloc_coherent provides the > + * guarantee that we'll have a CPU and DMA address aligned on > + * the smallest page order that is greater to the requested > + * size, so we don't have to overallocate. > + */ > + ctx->codec.h264.neighbor_info_buf = > + dma_alloc_coherent(dev->dev, CEDRUS_NEIGHBOR_INFO_BUF_SIZE, > + &ctx->codec.h264.neighbor_info_buf_dma, > + GFP_KERNEL); > + if (!ctx->codec.h264.neighbor_info_buf) { > + ret = -ENOMEM; > + goto err_pic_buf; > + } > + > + field_size = DIV_ROUND_UP(ctx->src_fmt.width, 16) * > + DIV_ROUND_UP(ctx->src_fmt.height, 16) * 16; > + > + /* > + * FIXME: This is actually conditional to > + * V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE not being set, we > + * might have to rework this if memory efficiency ever is > + * something we need to work on. > + */ > + field_size = field_size * 2; > + > + /* > + * FIXME: This is actually conditional to > + * V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY not being set, we might > + * have to rework this if memory efficiency ever is something > + * we need to work on. > + */ > + field_size = field_size * 2; > + ctx->codec.h264.mv_col_buf_field_size = field_size; > + > + mv_col_size = field_size * 2 * CEDRUS_H264_FRAME_NUM; > + ctx->codec.h264.mv_col_buf_size = mv_col_size; > + ctx->codec.h264.mv_col_buf = dma_alloc_coherent(dev->dev, > + ctx->codec.h264.mv_col_buf_size, > + &ctx->codec.h264.mv_col_buf_dma, > + GFP_KERNEL); > + if (!ctx->codec.h264.mv_col_buf) { > + ret = -ENOMEM; > + goto err_neighbor_buf; > + } > + > + return 0; > + > +err_neighbor_buf: > + dma_free_coherent(dev->dev, CEDRUS_NEIGHBOR_INFO_BUF_SIZE, > + ctx->codec.h264.neighbor_info_buf, > + ctx->codec.h264.neighbor_info_buf_dma); > + > +err_pic_buf: > + dma_free_coherent(dev->dev, CEDRUS_PIC_INFO_BUF_SIZE, > + ctx->codec.h264.pic_info_buf, > + ctx->codec.h264.pic_info_buf_dma); > + return ret; > +} > + > +static void cedrus_h264_stop(struct cedrus_ctx *ctx) > +{ > + struct cedrus_dev *dev = ctx->dev; > + > + dma_free_coherent(dev->dev, ctx->codec.h264.mv_col_buf_size, > + ctx->codec.h264.mv_col_buf, > + ctx->codec.h264.mv_col_buf_dma); > + dma_free_coherent(dev->dev, CEDRUS_NEIGHBOR_INFO_BUF_SIZE, > + ctx->codec.h264.neighbor_info_buf, > + ctx->codec.h264.neighbor_info_buf_dma); > + dma_free_coherent(dev->dev, CEDRUS_PIC_INFO_BUF_SIZE, > + ctx->codec.h264.pic_info_buf, > + ctx->codec.h264.pic_info_buf_dma); > +} > + > +static void cedrus_h264_trigger(struct cedrus_ctx *ctx) > +{ > + struct cedrus_dev *dev = ctx->dev; > + > + cedrus_write(dev, VE_H264_TRIGGER_TYPE, > + VE_H264_TRIGGER_TYPE_AVC_SLICE_DECODE); > +} > + > +struct cedrus_dec_ops cedrus_dec_ops_h264 = { > + .irq_clear = cedrus_h264_irq_clear, > + .irq_disable = cedrus_h264_irq_disable, > + .irq_status = cedrus_h264_irq_status, > + .setup = cedrus_h264_setup, > + .start = cedrus_h264_start, > + .stop = cedrus_h264_stop, > + .trigger = cedrus_h264_trigger, > +}; > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c > index fbfff7c1c771..748f7f673547 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c > @@ -46,6 +46,10 @@ int cedrus_engine_enable(struct cedrus_dev *dev, enum cedrus_codec codec) > reg |= VE_MODE_DEC_MPEG; > break; > > + case CEDRUS_CODEC_H264: > + reg |= VE_MODE_DEC_H264; > + break; > + > default: > return -EINVAL; > } > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > index de2d6b6f64bf..3e9931416e45 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > @@ -232,4 +232,95 @@ > #define VE_DEC_MPEG_ROT_LUMA (VE_ENGINE_DEC_MPEG + 0xcc) > #define VE_DEC_MPEG_ROT_CHROMA (VE_ENGINE_DEC_MPEG + 0xd0) > > +#define VE_H264_SPS 0x200 > +#define VE_H264_SPS_MBS_ONLY BIT(18) > +#define VE_H264_SPS_MB_ADAPTIVE_FRAME_FIELD BIT(17) > +#define VE_H264_SPS_DIRECT_8X8_INFERENCE BIT(16) > + > +#define VE_H264_PPS 0x204 > +#define VE_H264_PPS_ENTROPY_CODING_MODE BIT(15) > +#define VE_H264_PPS_WEIGHTED_PRED BIT(4) > +#define VE_H264_PPS_CONSTRAINED_INTRA_PRED BIT(1) > +#define VE_H264_PPS_TRANSFORM_8X8_MODE BIT(0) > + > +#define VE_H264_SHS 0x208 > +#define VE_H264_SHS_FIRST_SLICE_IN_PIC BIT(5) > +#define VE_H264_SHS_FIELD_PIC BIT(4) > +#define VE_H264_SHS_BOTTOM_FIELD BIT(3) > +#define VE_H264_SHS_DIRECT_SPATIAL_MV_PRED BIT(2) > + > +#define VE_H264_SHS2 0x20c > +#define VE_H264_SHS2_NUM_REF_IDX_ACTIVE_OVRD BIT(12) > + > +#define VE_H264_SHS_WP 0x210 > + > +#define VE_H264_SHS_QP 0x21c > +#define VE_H264_SHS_QP_SCALING_MATRIX_DEFAULT BIT(24) > + > +#define VE_H264_CTRL 0x220 > +#define VE_H264_CTRL_VLD_DATA_REQ_INT BIT(2) > +#define VE_H264_CTRL_DECODE_ERR_INT BIT(1) > +#define VE_H264_CTRL_SLICE_DECODE_INT BIT(0) > + > +#define VE_H264_CTRL_INT_MASK (VE_H264_CTRL_VLD_DATA_REQ_INT | \ > + VE_H264_CTRL_DECODE_ERR_INT | \ > + VE_H264_CTRL_SLICE_DECODE_INT) > + > +#define VE_H264_TRIGGER_TYPE 0x224 > +#define VE_H264_TRIGGER_TYPE_AVC_SLICE_DECODE (8 << 0) > +#define VE_H264_TRIGGER_TYPE_INIT_SWDEC (7 << 0) > + > +#define VE_H264_STATUS 0x228 > +#define VE_H264_STATUS_VLD_DATA_REQ_INT VE_H264_CTRL_VLD_DATA_REQ_INT > +#define VE_H264_STATUS_DECODE_ERR_INT VE_H264_CTRL_DECODE_ERR_INT > +#define VE_H264_STATUS_SLICE_DECODE_INT VE_H264_CTRL_SLICE_DECODE_INT > + > +#define VE_H264_STATUS_INT_MASK VE_H264_CTRL_INT_MASK > + > +#define VE_H264_CUR_MB_NUM 0x22c > + > +#define VE_H264_VLD_ADDR 0x230 > +#define VE_H264_VLD_ADDR_FIRST BIT(30) > +#define VE_H264_VLD_ADDR_LAST BIT(29) > +#define VE_H264_VLD_ADDR_VALID BIT(28) > +#define VE_H264_VLD_ADDR_VAL(x) (((x) & 0x0ffffff0) | ((x) >> 28)) > + > +#define VE_H264_VLD_OFFSET 0x234 > +#define VE_H264_VLD_LEN 0x238 > +#define VE_H264_VLD_END 0x23c > +#define VE_H264_SDROT_CTRL 0x240 > +#define VE_H264_OUTPUT_FRAME_IDX 0x24c > +#define VE_H264_EXTRA_BUFFER1 0x250 > +#define VE_H264_EXTRA_BUFFER2 0x254 > +#define VE_H264_BASIC_BITS 0x2dc > +#define VE_AVC_SRAM_PORT_OFFSET 0x2e0 > +#define VE_AVC_SRAM_PORT_DATA 0x2e4 > + > +#define VE_ISP_INPUT_SIZE 0xa00 > +#define VE_ISP_INPUT_STRIDE 0xa04 > +#define VE_ISP_CTRL 0xa08 > +#define VE_ISP_INPUT_LUMA 0xa78 > +#define VE_ISP_INPUT_CHROMA 0xa7c > + > +#define VE_AVC_PARAM 0xb04 > +#define VE_AVC_QP 0xb08 > +#define VE_AVC_MOTION_EST 0xb10 > +#define VE_AVC_CTRL 0xb14 > +#define VE_AVC_TRIGGER 0xb18 > +#define VE_AVC_STATUS 0xb1c > +#define VE_AVC_BASIC_BITS 0xb20 > +#define VE_AVC_UNK_BUF 0xb60 > +#define VE_AVC_VLE_ADDR 0xb80 > +#define VE_AVC_VLE_END 0xb84 > +#define VE_AVC_VLE_OFFSET 0xb88 > +#define VE_AVC_VLE_MAX 0xb8c > +#define VE_AVC_VLE_LENGTH 0xb90 > +#define VE_AVC_REF_LUMA 0xba0 > +#define VE_AVC_REF_CHROMA 0xba4 > +#define VE_AVC_REC_LUMA 0xbb0 > +#define VE_AVC_REC_CHROMA 0xbb4 > +#define VE_AVC_REF_SLUMA 0xbb8 > +#define VE_AVC_REC_SLUMA 0xbbc > +#define VE_AVC_MB_INFO 0xbc0 > + > #endif > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_video.c b/drivers/staging/media/sunxi/cedrus/cedrus_video.c > index 9673874ece10..e2b530b1a956 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus_video.c > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_video.c > @@ -38,6 +38,10 @@ static struct cedrus_format cedrus_formats[] = { > .directions = CEDRUS_DECODE_SRC, > }, > { > + .pixelformat = V4L2_PIX_FMT_H264_SLICE_RAW, > + .directions = CEDRUS_DECODE_SRC, > + }, > + { > .pixelformat = V4L2_PIX_FMT_SUNXI_TILED_NV12, > .directions = CEDRUS_DECODE_DST, > }, > @@ -100,6 +104,7 @@ static void cedrus_prepare_format(struct v4l2_pix_format *pix_fmt) > > switch (pix_fmt->pixelformat) { > case V4L2_PIX_FMT_MPEG2_SLICE: > + case V4L2_PIX_FMT_H264_SLICE_RAW: > /* Zero bytes per line for encoded source. */ > bytesperline = 0; > > @@ -464,6 +469,10 @@ static int cedrus_start_streaming(struct vb2_queue *vq, unsigned int count) > ctx->current_codec = CEDRUS_CODEC_MPEG2; > break; > > + case V4L2_PIX_FMT_H264_SLICE_RAW: > + ctx->current_codec = CEDRUS_CODEC_H264; > + break; > + > default: > return -EINVAL; > } -- Paul Kocialkowski, Bootlin Embedded Linux and kernel engineering https://bootlin.com