From: Kenneth Graunke <kenneth@whitecape.org>
To: intel-gfx@lists.freedesktop.org,
Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Subject: Re: [PATCH] drm/i915/perf: fix whitelist on Gen10+
Date: Mon, 03 Jun 2019 12:03:22 -0700 [thread overview]
Message-ID: <7362568.ZCySLXcd3F@kirito> (raw)
In-Reply-To: <20190601225845.12600-1-lionel.g.landwerlin@intel.com>
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On Saturday, June 1, 2019 3:58:45 PM PDT Lionel Landwerlin wrote:
> Gen10 added an additional NOA_WRITE register (high bits) and we forgot
> to whitelist it for userspace.
>
> Fixes: 95690a02fb5d96 ("drm/i915/perf: enable perf support on CNL")
> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> ---
> drivers/gpu/drm/i915/i915_perf.c | 1 +
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> 2 files changed, 2 insertions(+)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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prev parent reply other threads:[~2019-06-03 19:11 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-01 22:58 [PATCH] drm/i915/perf: fix whitelist on Gen10+ Lionel Landwerlin
2019-06-01 23:48 ` ✓ Fi.CI.BAT: success for " Patchwork
2019-06-02 18:57 ` ✓ Fi.CI.IGT: " Patchwork
2019-06-03 19:03 ` Kenneth Graunke [this message]
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