From: Alejandro Jimenez <alejandro.j.jimenez@oracle.com>
To: Sairaj Kodilkar <sarunkod@amd.com>,
"Michael S. Tsirkin" <mst@redhat.com>
Cc: Ani Sinha <anisinha@redhat.com>,
Eduardo Habkost <eduardo@habkost.net>,
Igor Mammedov <imammedo@redhat.com>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
qemu-devel@nongnu.org, vasant.hegde@amd.com,
suravee.suthikulpanit@amd.com
Subject: Re: [PATCH 4/8] acpi_build: Use IOMMU pci device to build IOMMU device ID
Date: Thu, 27 Aug 2026 21:14:52 -0400 [thread overview]
Message-ID: <73ade3bf-9c80-4aa3-852a-a7643f184ca8@oracle.com> (raw)
In-Reply-To: <14e2f520-e5fb-48a8-9fb5-9b8c451d2aea@amd.com>
On 8/27/26 2:18 AM, Sairaj Kodilkar wrote:
> On 8/1/2026 3: 17 AM, Alejandro Jimenez wrote: > > On 7/31/26 8: 32 AM,
> Sairaj Kodilkar wrote: >> On 7/31/2026 3: 20 PM, Michael S. Tsirkin wrote:
>> On Mon, May 11, 2026 at >> 06: 09: 33PM +0530, Sairaj Kodilkar wrote: >>
>
>
> On 8/1/2026 3:17 AM, Alejandro Jimenez wrote:
>>
>> On 7/31/26 8:32 AM, Sairaj Kodilkar wrote:
>>> On 7/31/2026 3: 20 PM, Michael S. Tsirkin wrote: > On Mon, May 11, 2026 at
>>> 06: 09: 33PM +0530, Sairaj Kodilkar wrote: >> Currently, build_amd_iommu()
>>> uses "addr" property to build the device ID for >> IOMMU device and
>>> advertise it
>>>
>>>
>>> On 7/31/2026 3:20 PM, Michael S. Tsirkin wrote:
>>>> On Mon, May 11, 2026 at 06:09:33PM +0530, Sairaj Kodilkar wrote:
>>>>> Currently, build_amd_iommu() uses "addr" property to build the device ID for
>>>>> IOMMU device and advertise it throught IVRS. But this property does not encode
>>>>> IOMMU bus. This will be a problem if IOMMU is attached to different bus.
>>>>> Hence use iommu pci device which provides bus, to build the IOMMU device ID.
>>>>>
>>>>> Signed-off-by: Sairaj Kodilkar <sarunkod@amd.com>
>>>>> Reviewed-by: Vasant Hegde <vasant.hegde@amd.com>
>>>>
>>>> But is this called after firmware has enumerated the pci bus?
>>>> And I guess OS better not change that bus number eh?
>>
>> The above line sounds fairly threatening :) so I dug a bit more into the
>> details.
>> Short story: I tested placing the IOMMU behind a PCI bridge, which the
>> implementation currently allows, and the guest can (easily) change the bus
>> number. That changes the IOMMU BDF, so the DeviceID encoded in IVRS becomes
>> incorrect.
>>
>
> Hi alejandro,
>
> Could you please share the steps and commands you used to change the bus
> number inside guest ?
Sorry, my earlier statement was ambiguous/confusing because I used DeviceID
referring to the name of the IVRS field, but can also be taken as a portion
of the BDF. Let me try to be more clear:
I did not change the IOMMU device or function values (I don't think that is
currently possible). What I was able to change is the secondary bus number
of the pcie-root-port above the IOMMU. Then this changes the IOMMU BDF
(more specifically the Bus part of it).
I launched the guest with this topology:
-device pcie-root-port,id=pcie-rp1,bus=pcie.0,addr=1c.0
-device AMDVI-PCI,id=iommu-pci,bus=pcie-rp1,addr=0
-device amd-iommu,dma-remap=on,xtsup=on,pci-id=iommu-pci
so firmware placed the IOMMU at 01:00.0, behind root port 00:1c.0.
Inside the guest:
# setpci -s 00:1c.0 PRIMARY_BUS SECONDARY_BUS SUBORDINATE_BUS
00
01
01
# setpci -s 00:1c.0 SECONDARY_BUS=02 SUBORDINATE_BUS=02
so the write is targeting the root port (pcie-rp1), not the IOMMU endpoint
itself. After that the IOMMU BDF in the guest is 02:00.0. IIUC the standard
lspci output displays the old BDF that has been cached by the guest OS when
enumerating the PCI devices, but setpci and lspci with option -H1 will do a
raw access and show the new BDF.
# lspci -H1 -Dnn
[...]
0000:02:00.0 IOMMU ... [1022:1419]
The IVRS table is not rebuilt following this guest write, which is I think
what MST is warning about.
Now we need to decide whether that operation I described above (which I
found researching ways to force the change to prove Michael's point) is
something that is considered valid. Perhaps there is a use for it that I am
not aware of, or perhaps it is just another way that a guest can break
itself and we are just supposed to let it.
I do see your explanation about why my initial proposal is too restrictive
for the future. I am just not sure yet what the right solution is.
Thank you,
Alejandro
I would like to run few tests around it but I am
> not able to change the PCI ID of the IOMMU with setpci command on root
> pci bridge.
>
> Thanks
> Sairaj
>
next prev parent reply other threads:[~2026-08-28 1:15 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-11 12:39 [PATCH 0/8] acpi_build: Refactor and cleanup AMD IVRS build Sairaj Kodilkar
2026-05-11 12:39 ` [PATCH 1/8] tests/acpi: x86: Allow IVRS acpi table changes Sairaj Kodilkar
2026-05-11 12:39 ` [PATCH 2/8] amd_iommu: update PA, GVA and VA size macros Sairaj Kodilkar
2026-05-19 8:39 ` Vasant Hegde
2026-07-30 21:41 ` Alejandro Jimenez
2026-08-03 22:15 ` Michael S. Tsirkin
2026-05-11 12:39 ` [PATCH 3/8] amd_iommu: Return empty efr for stub call Sairaj Kodilkar
2026-07-30 21:45 ` Alejandro Jimenez
2026-05-11 12:39 ` [PATCH 4/8] acpi_build: Use IOMMU pci device to build IOMMU device ID Sairaj Kodilkar
2026-07-30 22:35 ` Alejandro Jimenez
2026-07-31 9:50 ` Michael S. Tsirkin
2026-07-31 12:32 ` Sairaj Kodilkar
2026-07-31 21:47 ` Alejandro Jimenez
2026-08-01 0:01 ` Michael S. Tsirkin
2026-08-04 5:01 ` Sairaj Kodilkar
2026-08-27 6:18 ` Sairaj Kodilkar
2026-08-28 1:14 ` Alejandro Jimenez [this message]
2026-08-31 10:40 ` Sairaj Kodilkar
2026-09-02 13:41 ` Sairaj Kodilkar
2026-05-11 12:39 ` [PATCH 5/8] acpi_build: Introduce necessary macros and structs for AMD IOMMU IVRS Sairaj Kodilkar
2026-08-03 21:35 ` Alejandro Jimenez
2026-08-03 22:08 ` Michael S. Tsirkin
2026-05-11 12:39 ` [PATCH 6/8] acpi_build: Build IVRS feature report using extended feature register Sairaj Kodilkar
2026-05-19 8:43 ` Vasant Hegde
2026-05-11 12:39 ` [PATCH 7/8] acpi_build: Cleanup AMD IOMMU IVRS building Sairaj Kodilkar
2026-08-03 21:56 ` Michael S. Tsirkin
2026-08-03 22:10 ` Michael S. Tsirkin
2026-08-04 5:23 ` Sairaj Kodilkar
2026-05-11 12:39 ` [PATCH 8/8] tests/acpi: x86: update golden masters for IVRS Sairaj Kodilkar
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