All of lore.kernel.org
 help / color / mirror / Atom feed
From: Can Guo <cang@codeaurora.org>
To: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: asutoshd@codeaurora.org, nguyenb@codeaurora.org,
	hongwus@codeaurora.org, rnayak@codeaurora.org,
	linux-scsi@vger.kernel.org, kernel-team@android.com,
	saravanak@google.com, salyzyn@google.com,
	Andy Gross <agross@kernel.org>,
	Alim Akhtar <alim.akhtar@samsung.com>,
	Avri Altman <avri.altman@wdc.com>,
	"James E.J. Bottomley" <jejb@linux.ibm.com>,
	"Martin K. Petersen" <martin.petersen@oracle.com>,
	"open list:ARM/QUALCOMM SUPPORT" <linux-arm-msm@vger.kernel.org>,
	open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v7 7/8] scsi: ufs-qcom: Delay specific time before gate ref clk
Date: Sat, 08 Feb 2020 08:10:55 +0800	[thread overview]
Message-ID: <745307fd2a9e2e25f4fb2dd2c985e680@codeaurora.org> (raw)
In-Reply-To: <20200207021036.GT2514@yoga>

On 2020-02-07 10:10, Bjorn Andersson wrote:
> On Thu 06 Feb 17:09 PST 2020, Can Guo wrote:
> 
>> On 2020-02-07 04:33, Bjorn Andersson wrote:
>> > On Thu 06 Feb 00:33 PST 2020, Can Guo wrote:
>> >
>> > > After enter hibern8, as UFS JEDEC ver 3.0 requires, a specific
>> > > gating wait
>> > > time is required before disable the device reference clock. If it is
>> > > not
>> > > specified, use the old delay.
>> > >
>> > > Signed-off-by: Can Guo <cang@codeaurora.org>
>> > > Reviewed-by: Asutosh Das <asutoshd@codeaurora.org>
>> > > Reviewed-by: Hongwu Su <hongwus@codeaurora.org>
>> > > ---
>> > >  drivers/scsi/ufs/ufs-qcom.c | 22 +++++++++++++++++++---
>> > >  1 file changed, 19 insertions(+), 3 deletions(-)
>> > >
>> > > diff --git a/drivers/scsi/ufs/ufs-qcom.c b/drivers/scsi/ufs/ufs-qcom.c
>> > > index 85d7c17..39eefa4 100644
>> > > --- a/drivers/scsi/ufs/ufs-qcom.c
>> > > +++ b/drivers/scsi/ufs/ufs-qcom.c
>> > > @@ -833,6 +833,8 @@ static int ufs_qcom_bus_register(struct
>> > > ufs_qcom_host *host)
>> > >
>> > >  static void ufs_qcom_dev_ref_clk_ctrl(struct ufs_qcom_host *host,
>> > > bool enable)
>> > >  {
>> > > +	unsigned long gating_wait;
>> > > +
>> > >  	if (host->dev_ref_clk_ctrl_mmio &&
>> > >  	    (enable ^ host->is_dev_ref_clk_enabled)) {
>> > >  		u32 temp = readl_relaxed(host->dev_ref_clk_ctrl_mmio);
>> > > @@ -845,11 +847,25 @@ static void ufs_qcom_dev_ref_clk_ctrl(struct
>> > > ufs_qcom_host *host, bool enable)
>> > >  		/*
>> > >  		 * If we are here to disable this clock it might be immediately
>> > >  		 * after entering into hibern8 in which case we need to make
>> > > -		 * sure that device ref_clk is active at least 1us after the
>> > > +		 * sure that device ref_clk is active for specific time after
>> > >  		 * hibern8 enter.
>> > >  		 */
>> > > -		if (!enable)
>> > > -			udelay(1);
>> > > +		if (!enable) {
>> > > +			gating_wait = host->hba->dev_info.clk_gating_wait_us;
>> > > +			if (!gating_wait) {
>> >
>> > Afaict this can't happen, because in patch 6 you check for gating_wait
>> > being 0 and if so set it to 0xff.
>> >
>> 
>> Sorry, I was intended to give clk_gating_wait_us values only if it is
>> a UFS3.0 device. I will revise patch 6/8.
>> 
> 
> Okay, sounds good.
> 
>> > > +				udelay(1);
>> > > +			} else {
>> > > +				/*
>> > > +				 * bRefClkGatingWaitTime defines the minimum
>> > > +				 * time for which the reference clock is
>> > > +				 * required by device during transition from
>> > > +				 * HS-MODE to LS-MODE or HIBERN8 state. Give it
>> > > +				 * more time to be on the safe side.
>> > > +				 */
>> > > +				gating_wait += 10;
>> > > +				usleep_range(gating_wait, gating_wait + 10);
>> >
>> > I presume there's no strong requirement on the max, so how about using a
>> > substantially larger max - say 1k, or 10k - to allow the usleep_range()
>> > to do it's job?
>> >
>> >
>> > PS. Please include linux-arm-msm@ on all the patches in the series, not
>> > just two of them.
>> >
>> > Regards,
>> > Bjorn
>> >
>> 
>> bRefClkGatingWaitTime, as vendor defined in their device attribute is
>> usually
>> around 50~100, 1k or 10k delay makes it too large. usleep_range() 
>> works well
>> so long as the delay is within (10us - 20ms), so I added 10 to make 
>> sure it
>> is
>> above 10us.
>> 
> 
> I meant specifically the second parameter, i.e:
>   usleep_range(bRefClkGatingWaitTime + 10, bRefClkGatingWaitTime + 
> 1000);
> 
> As you're not guaranteed an upper bound of this sleep anyway you might
> as well give usleep_range() a window of a millisecond (or more) to give
> it the flexibility of matching other timer events.
> 
> The only drawback with this is that you might "waste" a millisecond.
> 
> Regards,
> Bjorn
> 

Hi Bjorn,

Device ref clk gate/ungate can happen very frequently if clk gating is
enabled. The "wasted" milliseconds might be accumulated to affect
read/write latency, i.e:

If read/write requests come, clk ungate kicks start, it flushes ongoing
gate work if any, if we "waste" a millisecond here, the read/write
requests will be delayed a millisecond. I am not sure how much it may
impact the overall performance in a long term test.

Thanks,

Can Guo.

>> SLEEPING FOR ~USECS OR SMALL MSECS ( 10us - 20ms):
>> 	* Use usleep_range
>> https://www.kernel.org/doc/Documentation/timers/timers-howto.txt
>> 
>> Thanks,
>> 
>> Can Guo.
>> 
>> > > +			}
>> > > +		}
>> > >
>> > >  		writel_relaxed(temp, host->dev_ref_clk_ctrl_mmio);
>> > >
>> > > --
>> > > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
>> > > Forum,
>> > > a Linux Foundation Collaborative Project

  reply	other threads:[~2020-02-08  0:11 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-06  8:33 [PATCH v7 0/8] UFS driver general fixes bundle 4 Can Guo
2020-02-06  8:33 ` [PATCH v7 1/8] scsi: ufs: Flush exception event before suspend Can Guo
2020-02-06  8:33 ` [PATCH v7 2/8] scsi: ufs: set load before setting voltage in regulators Can Guo
2020-02-06  8:33   ` Can Guo
2020-02-06  8:33   ` Can Guo
2020-02-06  8:33 ` [PATCH v7 3/8] scsi: ufs: Remove the check before call setup clock notify vops Can Guo
2020-02-06  8:33   ` Can Guo
2020-02-06  8:33   ` Can Guo
2020-02-06  8:33 ` [PATCH v7 4/8] scsi: ufs-qcom: Adjust bus bandwidth voting and unvoting Can Guo
2020-02-06  8:33 ` [PATCH v7 5/8] scsi: ufs: Fix ufshcd_hold() caused scheduling while atomic Can Guo
2020-02-06  8:33   ` Can Guo
2020-02-06  8:33   ` Can Guo
2020-02-06 10:28   ` Avri Altman
2020-02-06 10:28     ` Avri Altman
2020-02-06 10:28     ` Avri Altman
2020-02-10  1:28     ` Can Guo
2020-02-10  1:28       ` Can Guo
2020-02-10  1:28       ` Can Guo
2020-02-10  1:59       ` Can Guo
2020-02-10  1:59         ` Can Guo
2020-02-10  1:59         ` Can Guo
2020-02-10  8:23         ` Avri Altman
2020-02-10  8:23           ` Avri Altman
2020-02-10  8:23           ` Avri Altman
2020-02-06  8:33 ` [PATCH v7 6/8] scsi: ufs: Add dev ref clock gating wait time support Can Guo
2020-02-06  8:33   ` Can Guo
2020-02-06  8:33   ` Can Guo
2020-02-06  8:33 ` [PATCH v7 7/8] scsi: ufs-qcom: Delay specific time before gate ref clk Can Guo
2020-02-06 20:33   ` Bjorn Andersson
2020-02-07  1:09     ` Can Guo
2020-02-07  2:10       ` Bjorn Andersson
2020-02-08  0:10         ` Can Guo [this message]
2020-02-06  8:33 ` [PATCH v7 8/8] scsi: ufs: Select INITIAL adapt for HS Gear4 Can Guo
2020-02-06 13:20   ` Avri Altman
2020-02-07  2:56     ` Can Guo
2020-02-07  5:10       ` Can Guo

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=745307fd2a9e2e25f4fb2dd2c985e680@codeaurora.org \
    --to=cang@codeaurora.org \
    --cc=agross@kernel.org \
    --cc=alim.akhtar@samsung.com \
    --cc=asutoshd@codeaurora.org \
    --cc=avri.altman@wdc.com \
    --cc=bjorn.andersson@linaro.org \
    --cc=hongwus@codeaurora.org \
    --cc=jejb@linux.ibm.com \
    --cc=kernel-team@android.com \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-scsi@vger.kernel.org \
    --cc=martin.petersen@oracle.com \
    --cc=nguyenb@codeaurora.org \
    --cc=rnayak@codeaurora.org \
    --cc=salyzyn@google.com \
    --cc=saravanak@google.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.