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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id u18-20020a50c052000000b004ace62d6eaesm4230241edd.57.2023.02.23.06.06.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 23 Feb 2023 06:06:42 -0800 (PST) Message-ID: <7464e0b2-77f1-7208-50b7-8fc63ee7baa1@gmail.com> Date: Thu, 23 Feb 2023 15:06:40 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 From: Johan Jonker Subject: [PATCH v1] spi: spi-aspeed-smc: convert devfdt_get_addr_index output to phys_addr_t To: chin-ting_kuo@aspeedtech.com, clg@kaod.org, sjg@chromium.org, kever.yang@rock-chips.com Cc: BMC-SW@aspeedtech.com, jagan@amarulasolutions.com, ryan_chen@aspeedtech.com, chiawei_wang@aspeedtech.com, joel@jms.id.au, dario.binacchi@amarulasolutions.com, michael@amarulasolutions.com, philipp.tomsich@vrull.eu, u-boot@lists.denx.de, yifeng.zhao@rock-chips.com References: <49d0321c-72e4-429f-335e-8f23ff866d39@rock-chips.com> Content-Language: en-US In-Reply-To: <49d0321c-72e4-429f-335e-8f23ff866d39@rock-chips.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so convert devfdt_get_addr_index output to phys_addr_t in the spi-aspeed-smc.c file. Also fix dev_dbg to be able to handle both sizes. Signed-off-by: Johan Jonker --- Note: This is needed for a Rockchip patch serie to pass the test and must be merged before by Rockchip maintainers: [PATCH v4 00/11] Fixes for Rockchip NFC driver part 1 https://lore.kernel.org/u-boot/f3dba231-4a55-0a94-dfab-5cab1419d132@gmail.com/ Request for hardware test by Aspeed people. --- drivers/spi/spi-aspeed-smc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c index a3c96333..17696441 100644 --- a/drivers/spi/spi-aspeed-smc.c +++ b/drivers/spi/spi-aspeed-smc.c @@ -1125,14 +1125,14 @@ static int apseed_spi_of_to_plat(struct udevice *bus) int ret; struct clk hclk; - priv->regs = (void __iomem *)devfdt_get_addr_index(bus, 0); + priv->regs = (void __iomem *)((phys_addr_t)devfdt_get_addr_index(bus, 0)); if ((u32)priv->regs == FDT_ADDR_T_NONE) { dev_err(bus, "wrong ctrl base\n"); return -ENODEV; } plat->ahb_base = - (void __iomem *)devfdt_get_addr_size_index(bus, 1, &plat->ahb_sz); + (void __iomem *)((phys_addr_t)devfdt_get_addr_size_index(bus, 1, &plat->ahb_sz)); if ((u32)plat->ahb_base == FDT_ADDR_T_NONE) { dev_err(bus, "wrong AHB base\n"); return -ENODEV; @@ -1151,8 +1151,8 @@ static int apseed_spi_of_to_plat(struct udevice *bus) plat->hclk_rate = clk_get_rate(&hclk); clk_free(&hclk); - dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%lx\n", - (u32)priv->regs, plat->ahb_base, plat->ahb_sz); + dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%llx\n", + (u32)priv->regs, plat->ahb_base, (fdt64_t)plat->ahb_sz); dev_dbg(bus, "hclk = %dMHz, max_cs = %d\n", plat->hclk_rate / 1000000, plat->max_cs); -- 2.20.1