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Authenticated user: at ics.forth.gr MIME-Version: 1.0 Date: Sat, 27 Jun 2020 15:30:50 +0300 From: Nick Kossifidis To: Alexandre Ghiti Subject: Re: [PATCH v2 5/8] riscv: Implement sv48 support Organization: FORTH In-Reply-To: <20200603081104.14004-6-alex@ghiti.fr> References: <20200603081104.14004-1-alex@ghiti.fr> <20200603081104.14004-6-alex@ghiti.fr> Message-ID: <74a770fcf00980281b60bb3f6274419d@mailhost.ics.forth.gr> X-Sender: mick@mailhost.ics.forth.gr User-Agent: Roundcube Webmail/1.3.9 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrALMWRmVeSWpSXmKPExsXSHT1dWfe39fc4g3Nv1Cye3fnKatHy4R2r xcrVR5ksLu+aw2ax7XMLm8XLyz3MFm2z+C0+3J3N5sDhMfX3GRaPNy9fsnjcOzGN1WPzknqP 3Tcb2DwuNV9n9/i8SS6APYrLJiU1J7MstUjfLoEr42LzevaCHYEVi19vZ2lgvO/QxcjBISFg IvH7rX0XIxeHkMBRRolnp+awdzFyAsVNJWbv7WQEsXkFBCVOznzCAmIzC1hITL2ynxHClpdo 3jqbGcRmEVCV2NhyC6yXTUBTYv6lgywg80UElCV2HlEGmc8s0M8k0bznKViNsIClxMLf55lA bH4BYYlPdy+ygticAsYS71v6wGqEBKIlTsz+wwgyh1fAReJAexzEaSoSH34/ACsRBRp/8/Bz 9gmMgrOQXDoLyaWzkFy6gJF5FaNAYpmxXmZysV5aflFJhl560SZGcCQw+u5gvL35rd4hRiYO xkOMEhzMSiK8n62/xQnxpiRWVqUW5ccXleakFh9ilOZgURLnzeNeHiskkJ5YkpqdmlqQWgST ZeLglGpgSpZk8pd4Jbdq4rv3l2doL1I+/uRu1eNrX/zKzjNs+ePJUZa97v3LEoVvkxSjDjxW augT0Njl2HkplOdU7OTQ6UEplmbapT1KPasfZCwqfLIjf/Xdf4mfDocueLdptejryJQTXF9a ojpzG0UkcmfcmWPXdsYwSfmJrsGFP4Ip96tFXV0fnDAMiz98hfG7xp2Cdf5Hr5steaLAEBLv yFNrqLxr8sZykxdPbnxYsTSOPezj8hOJar3SO894WLEeEBI0ttmse+u1rxOT8/q9B+P+dk/I 5uLerf9DZUN8yt7yuf4CPc/1n+UtaWPWkd1dXFe631K7YVev+vqM3qtnHkwsS/fcJe4rs/+k qWUXDw+jEktxRqKhFnNRcSIAFlZWlfMCAAA= X-Greylist: inspected by milter-greylist-4.6.2 (mailgate-2.ics.forth.gr [139.91.1.5]); Sat, 27 Jun 2020 12:30:53 +0000 (GMT) for IP:'139.91.1.77' DOMAIN:'av3in' HELO:'av3.ics.forth.gr' FROM:'mick@ics.forth.gr' RCPT:'' X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mailgate-2.ics.forth.gr [139.91.1.5]); Sat, 27 Jun 2020 12:30:53 +0000 (GMT) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anup Patel , linux-kernel@vger.kernel.org, Palmer Dabbelt , Zong Li , Paul Walmsley , linux-riscv@lists.infradead.org, Christoph Hellwig Content-Transfer-Encoding: base64 Content-Type: text/plain; charset="utf-8"; Format="flowed" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org zqPPhM65z4IgMjAyMC0wNi0wMyAxMToxMSwgQWxleGFuZHJlIEdoaXRpIM6tzrPPgc6xz4jOtToK PiBCeSBhZGRpbmcgYSBuZXcgNHRoIGxldmVsIG9mIHBhZ2UgdGFibGUsIGdpdmUgdGhlIHBvc3Np YmlsaXR5IHRvIDY0Yml0Cj4ga2VybmVsIHRvIGFkZHJlc3MgMl40OCBieXRlcyBvZiB2aXJ0dWFs IGFkZHJlc3M6IGluIHByYWN0aWNlLCB0aGF0IAo+IHJvdWdobHkKPiBvZmZlcnMgfjE2MFRCIG9m IHZpcnR1YWwgYWRkcmVzcyBzcGFjZSB0byB1c2Vyc3BhY2UgYW5kIGFsbG93cyB1cCB0byAKPiA2 NFRCCj4gb2YgcGh5c2ljYWwgbWVtb3J5Lgo+IAo+IElmIHRoZSB1bmRlcmx5aW5nIGhhcmR3YXJl IGRvZXMgbm90IHN1cHBvcnQgc3Y0OCwgd2Ugd2lsbCBhdXRvbWF0aWNhbGx5Cj4gZmFsbGJhY2sg dG8gYSBzdGFuZGFyZCAzLWxldmVsIHBhZ2UgdGFibGUgYnkgZm9sZGluZyB0aGUgbmV3IFBVRCBs ZXZlbCAKPiBpbnRvCj4gUEdESVIgbGV2ZWwuIEluIG9yZGVyIHRvIGRldGVjdCBIVyBjYXBhYmls aXRpZXMgYXQgcnVudGltZSwgd2UKPiB1c2UgU0FUUCBmZWF0dXJlIHRoYXQgaWdub3JlcyB3cml0 ZXMgd2l0aCBhbiB1bnN1cHBvcnRlZCBtb2RlLgo+IAo+IFNpZ25lZC1vZmYtYnk6IEFsZXhhbmRy ZSBHaGl0aSA8YWxleEBnaGl0aS5mcj4KPiBSZXZpZXdlZC1ieTogQW51cCBQYXRlbCA8YW51cEBi cmFpbmZhdWx0Lm9yZz4KPiAtLS0KPiAgYXJjaC9yaXNjdi9LY29uZmlnICAgICAgICAgICAgICAg ICAgfCAgIDYgKy0KPiAgYXJjaC9yaXNjdi9pbmNsdWRlL2FzbS9jc3IuaCAgICAgICAgfCAgIDMg Ky0KPiAgYXJjaC9yaXNjdi9pbmNsdWRlL2FzbS9maXhtYXAuaCAgICAgfCAgIDEgKwo+ICBhcmNo L3Jpc2N2L2luY2x1ZGUvYXNtL3BhZ2UuaCAgICAgICB8ICAxNSArKysKPiAgYXJjaC9yaXNjdi9p bmNsdWRlL2FzbS9wZ2FsbG9jLmggICAgfCAgMzYgKysrKysrKwo+ICBhcmNoL3Jpc2N2L2luY2x1 ZGUvYXNtL3BndGFibGUtNjQuaCB8ICA5NyArKysrKysrKysrKysrKysrLQo+ICBhcmNoL3Jpc2N2 L2luY2x1ZGUvYXNtL3BndGFibGUuaCAgICB8ICAxMCArLQo+ICBhcmNoL3Jpc2N2L2tlcm5lbC9o ZWFkLlMgICAgICAgICAgICB8ICAgMyArLQo+ICBhcmNoL3Jpc2N2L21tL2NvbnRleHQuYyAgICAg ICAgICAgICB8ICAgMiArLQo+ICBhcmNoL3Jpc2N2L21tL2luaXQuYyAgICAgICAgICAgICAgICB8 IDE1OCArKysrKysrKysrKysrKysrKysrKysrKysrLS0tCj4gIDEwIGZpbGVzIGNoYW5nZWQsIDMw NyBpbnNlcnRpb25zKCspLCAyNCBkZWxldGlvbnMoLSkKPiAKPiBkaWZmIC0tZ2l0IGEvYXJjaC9y aXNjdi9LY29uZmlnIGIvYXJjaC9yaXNjdi9LY29uZmlnCj4gaW5kZXggZTE2N2YxNjEzMWY0Li4z ZjczZjYwZTk3MzIgMTAwNjQ0Cj4gLS0tIGEvYXJjaC9yaXNjdi9LY29uZmlnCj4gKysrIGIvYXJj aC9yaXNjdi9LY29uZmlnCj4gQEAgLTY4LDYgKzY4LDcgQEAgY29uZmlnIFJJU0NWCj4gIAlzZWxl Y3QgQVJDSF9IQVNfR0NPVl9QUk9GSUxFX0FMTAo+ICAJc2VsZWN0IEhBVkVfQ09QWV9USFJFQURf VExTCj4gIAlzZWxlY3QgSEFWRV9BUkNIX0tBU0FOIGlmIE1NVSAmJiA2NEJJVAo+ICsJc2VsZWN0 IFJFTE9DQVRBQkxFIGlmIDY0QklUCj4gCj4gIGNvbmZpZyBBUkNIX01NQVBfUk5EX0JJVFNfTUlO Cj4gIAlkZWZhdWx0IDE4IGlmIDY0QklUCj4gQEAgLTEwNiw3ICsxMDcsNyBAQCBjb25maWcgUEFH RV9PRkZTRVQKPiAgCWRlZmF1bHQgMHhDMDAwMDAwMCBpZiAzMkJJVCAmJiBNQVhQSFlTTUVNXzJH Qgo+ICAJZGVmYXVsdCAweDgwMDAwMDAwIGlmIDY0QklUICYmICFNTVUKPiAgCWRlZmF1bHQgMHhm ZmZmZmZmZjgwMDAwMDAwIGlmIDY0QklUICYmIE1BWFBIWVNNRU1fMkdCCj4gLQlkZWZhdWx0IDB4 ZmZmZmZmZTAwMDAwMDAwMCBpZiA2NEJJVCAmJiAhTUFYUEhZU01FTV8yR0IKPiArCWRlZmF1bHQg MHhmZmZmYzAwMDAwMDAwMDAwIGlmIDY0QklUICYmICFNQVhQSFlTTUVNXzJHQgo+IAo+ICBjb25m aWcgQVJDSF9GTEFUTUVNX0VOQUJMRQo+ICAJZGVmX2Jvb2wgeQo+IEBAIC0xNTUsOCArMTU2LDEx IEBAIGNvbmZpZyBHRU5FUklDX0hXRUlHSFQKPiAgY29uZmlnIEZJWF9FQVJMWUNPTl9NRU0KPiAg CWRlZl9ib29sIE1NVQo+IAo+ICsjIE9uIGEgNjRCSVQgcmVsb2NhdGFibGUga2VybmVsLCB0aGUg NC1sZXZlbCBwYWdlIHRhYmxlIGlzIGF0IHJ1bnRpbWUgCj4gZm9sZGVkCj4gKyMgb24gYSAzLWxl dmVsIHBhZ2UgdGFibGUgd2hlbiBzdjQ4IGlzIG5vdCBzdXBwb3J0ZWQuCj4gIGNvbmZpZyBQR1RB QkxFX0xFVkVMUwo+ICAJaW50Cj4gKwlkZWZhdWx0IDQgaWYgNjRCSVQgJiYgUkVMT0NBVEFCTEUK PiAgCWRlZmF1bHQgMyBpZiA2NEJJVAo+ICAJZGVmYXVsdCAyCj4gCj4gZGlmZiAtLWdpdCBhL2Fy Y2gvcmlzY3YvaW5jbHVkZS9hc20vY3NyLmggCj4gYi9hcmNoL3Jpc2N2L2luY2x1ZGUvYXNtL2Nz ci5oCj4gaW5kZXggY2VjNDYyZTE5OGNlLi5kNDE1MzZjM2Y4ZDQgMTAwNjQ0Cj4gLS0tIGEvYXJj aC9yaXNjdi9pbmNsdWRlL2FzbS9jc3IuaAo+ICsrKyBiL2FyY2gvcmlzY3YvaW5jbHVkZS9hc20v Y3NyLmgKPiBAQCAtNDAsMTEgKzQwLDEwIEBACj4gICNpZm5kZWYgQ09ORklHXzY0QklUCj4gICNk ZWZpbmUgU0FUUF9QUE4JX0FDKDB4MDAzRkZGRkYsIFVMKQo+ICAjZGVmaW5lIFNBVFBfTU9ERV8z MglfQUMoMHg4MDAwMDAwMCwgVUwpCj4gLSNkZWZpbmUgU0FUUF9NT0RFCVNBVFBfTU9ERV8zMgo+ ICAjZWxzZQo+ICAjZGVmaW5lIFNBVFBfUFBOCV9BQygweDAwMDAwRkZGRkZGRkZGRkYsIFVMKQo+ ICAjZGVmaW5lIFNBVFBfTU9ERV8zOQlfQUMoMHg4MDAwMDAwMDAwMDAwMDAwLCBVTCkKPiAtI2Rl ZmluZSBTQVRQX01PREUJU0FUUF9NT0RFXzM5Cj4gKyNkZWZpbmUgU0FUUF9NT0RFXzQ4CV9BQygw eDkwMDAwMDAwMDAwMDAwMDAsIFVMKQo+ICAjZW5kaWYKPiAKPiAgLyogRXhjZXB0aW9uIGNhdXNl IGhpZ2ggYml0IC0gaXMgYW4gaW50ZXJydXB0IGlmIHNldCAqLwo+IGRpZmYgLS1naXQgYS9hcmNo L3Jpc2N2L2luY2x1ZGUvYXNtL2ZpeG1hcC5oIAo+IGIvYXJjaC9yaXNjdi9pbmNsdWRlL2FzbS9m aXhtYXAuaAo+IGluZGV4IDIzNjhkNDllYjRlZi4uZDg5MWNmOWM3M2M1IDEwMDY0NAo+IC0tLSBh L2FyY2gvcmlzY3YvaW5jbHVkZS9hc20vZml4bWFwLmgKPiArKysgYi9hcmNoL3Jpc2N2L2luY2x1 ZGUvYXNtL2ZpeG1hcC5oCj4gQEAgLTI3LDYgKzI3LDcgQEAgZW51bSBmaXhlZF9hZGRyZXNzZXMg ewo+ICAJRklYX0ZEVCA9IEZJWF9GRFRfRU5EICsgRklYX0ZEVF9TSVpFIC8gUEFHRV9TSVpFIC0g MSwKPiAgCUZJWF9QVEUsCj4gIAlGSVhfUE1ELAo+ICsJRklYX1BVRCwKPiAgCUZJWF9URVhUX1BP S0UxLAo+ICAJRklYX1RFWFRfUE9LRTAsCj4gIAlGSVhfRUFSTFlDT05fTUVNX0JBU0UsCj4gZGlm ZiAtLWdpdCBhL2FyY2gvcmlzY3YvaW5jbHVkZS9hc20vcGFnZS5oIAo+IGIvYXJjaC9yaXNjdi9p bmNsdWRlL2FzbS9wYWdlLmgKPiBpbmRleCA0OGJiMDliNmE5YjcuLjVlNzdmZTdmMGQ2ZCAxMDA2 NDQKPiAtLS0gYS9hcmNoL3Jpc2N2L2luY2x1ZGUvYXNtL3BhZ2UuaAo+ICsrKyBiL2FyY2gvcmlz Y3YvaW5jbHVkZS9hc20vcGFnZS5oCj4gQEAgLTMxLDcgKzMxLDE5IEBACj4gICAqIFdoZW4gbm90 IHVzaW5nIE1NVSB0aGlzIGNvcnJlc3BvbmRzIHRvIHRoZSBmaXJzdCBmcmVlIHBhZ2UgaW4KPiAg ICogcGh5c2ljYWwgbWVtb3J5IChhbGlnbmVkIG9uIGEgcGFnZSBib3VuZGFyeSkuCj4gICAqLwo+ ICsjaWZkZWYgQ09ORklHX1JFTE9DQVRBQkxFCj4gKyNkZWZpbmUgUEFHRV9PRkZTRVQJCV9fcGFn ZV9vZmZzZXQKPiArCj4gKyNpZmRlZiBDT05GSUdfNjRCSVQKPiArLyoKPiArICogQnkgZGVmYXVs dCwgQ09ORklHX1BBR0VfT0ZGU0VUIHZhbHVlIGNvcnJlc3BvbmRzIHRvIFNWNDggYWRkcmVzcyAK PiBzcGFjZSBzbwo+ICsgKiBkZWZpbmUgdGhlIFBBR0VfT0ZGU0VUIHZhbHVlIGZvciBTVjM5Lgo+ ICsgKi8KPiArI2RlZmluZSBQQUdFX09GRlNFVF9MMwkJMHhmZmZmZmZlMDAwMDAwMDAwCj4gKyNl bmRpZiAvKiBDT05GSUdfNjRCSVQgKi8KPiArI2Vsc2UKPiAgI2RlZmluZSBQQUdFX09GRlNFVAkJ X0FDKENPTkZJR19QQUdFX09GRlNFVCwgVUwpCj4gKyNlbmRpZiAvKiBDT05GSUdfUkVMT0NBVEFC TEUgKi8KPiAKPiAgI2RlZmluZSBLRVJOX1ZJUlRfU0laRSAoLVBBR0VfT0ZGU0VUKQo+IAo+IEBA IC0xMDIsNiArMTE0LDkgQEAgZXh0ZXJuIHVuc2lnbmVkIGxvbmcgcGZuX2Jhc2U7Cj4gIGV4dGVy biB1bnNpZ25lZCBsb25nIG1heF9sb3dfcGZuOwo+ICBleHRlcm4gdW5zaWduZWQgbG9uZyBtaW5f bG93X3BmbjsKPiAgZXh0ZXJuIHVuc2lnbmVkIGxvbmcga2VybmVsX3ZpcnRfYWRkcjsKPiArI2lm ZGVmIENPTkZJR19SRUxPQ0FUQUJMRQo+ICtleHRlcm4gdW5zaWduZWQgbG9uZyBfX3BhZ2Vfb2Zm c2V0Owo+ICsjZW5kaWYKPiAKPiAgI2RlZmluZSBfX3BhX3RvX3ZhX25vZGVidWcoeCkJKCh2b2lk ICopKCh1bnNpZ25lZCBsb25nKSAoeCkgKyAKPiB2YV9wYV9vZmZzZXQpKQo+ICAjZGVmaW5lIGxp bmVhcl9tYXBwaW5nX3ZhX3RvX3BhKHgpCSgodW5zaWduZWQgbG9uZykoeCkgLSB2YV9wYV9vZmZz ZXQpCj4gZGlmZiAtLWdpdCBhL2FyY2gvcmlzY3YvaW5jbHVkZS9hc20vcGdhbGxvYy5oIAo+IGIv YXJjaC9yaXNjdi9pbmNsdWRlL2FzbS9wZ2FsbG9jLmgKPiBpbmRleCAzZjYwMWVlODIzM2YuLjU0 MGVhYTVhODY1OCAxMDA2NDQKPiAtLS0gYS9hcmNoL3Jpc2N2L2luY2x1ZGUvYXNtL3BnYWxsb2Mu aAo+ICsrKyBiL2FyY2gvcmlzY3YvaW5jbHVkZS9hc20vcGdhbGxvYy5oCj4gQEAgLTM2LDYgKzM2 LDQyIEBAIHN0YXRpYyBpbmxpbmUgdm9pZCBwdWRfcG9wdWxhdGUoc3RydWN0IG1tX3N0cnVjdAo+ ICptbSwgcHVkX3QgKnB1ZCwgcG1kX3QgKnBtZCkKPiAKPiAgCXNldF9wdWQocHVkLCBfX3B1ZCgo cGZuIDw8IF9QQUdFX1BGTl9TSElGVCkgfCBfUEFHRV9UQUJMRSkpOwo+ICB9Cj4gKwo+ICtzdGF0 aWMgaW5saW5lIHZvaWQgcDRkX3BvcHVsYXRlKHN0cnVjdCBtbV9zdHJ1Y3QgKm1tLCBwNGRfdCAq cDRkLCAKPiBwdWRfdCAqcHVkKQo+ICt7Cj4gKwlpZiAocGd0YWJsZV9sNF9lbmFibGVkKSB7Cj4g KwkJdW5zaWduZWQgbG9uZyBwZm4gPSB2aXJ0X3RvX3BmbihwdWQpOwo+ICsKPiArCQlzZXRfcDRk KHA0ZCwgX19wNGQoKHBmbiA8PCBfUEFHRV9QRk5fU0hJRlQpIHwgX1BBR0VfVEFCTEUpKTsKPiAr CX0KPiArfQo+ICsKPiArc3RhdGljIGlubGluZSB2b2lkIHA0ZF9wb3B1bGF0ZV9zYWZlKHN0cnVj dCBtbV9zdHJ1Y3QgKm1tLCBwNGRfdCAqcDRkLAo+ICsJCQkJICAgICBwdWRfdCAqcHVkKQo+ICt7 Cj4gKwlpZiAocGd0YWJsZV9sNF9lbmFibGVkKSB7Cj4gKwkJdW5zaWduZWQgbG9uZyBwZm4gPSB2 aXJ0X3RvX3BmbihwdWQpOwo+ICsKPiArCQlzZXRfcDRkX3NhZmUocDRkLAo+ICsJCQkgICAgIF9f cDRkKChwZm4gPDwgX1BBR0VfUEZOX1NISUZUKSB8IF9QQUdFX1RBQkxFKSk7Cj4gKwl9Cj4gK30K PiArCj4gK3N0YXRpYyBpbmxpbmUgcHVkX3QgKnB1ZF9hbGxvY19vbmUoc3RydWN0IG1tX3N0cnVj dCAqbW0sIHVuc2lnbmVkIGxvbmcgCj4gYWRkcikKPiArewo+ICsJaWYgKHBndGFibGVfbDRfZW5h YmxlZCkKPiArCQlyZXR1cm4gKHB1ZF90ICopX19nZXRfZnJlZV9wYWdlKAo+ICsJCQkJR0ZQX0tF Uk5FTCB8IF9fR0ZQX1JFVFJZX01BWUZBSUwgfCBfX0dGUF9aRVJPKTsKPiArCXJldHVybiBOVUxM Owo+ICt9Cj4gKwo+ICtzdGF0aWMgaW5saW5lIHZvaWQgcHVkX2ZyZWUoc3RydWN0IG1tX3N0cnVj dCAqbW0sIHB1ZF90ICpwdWQpCj4gK3sKPiArCWlmIChwZ3RhYmxlX2w0X2VuYWJsZWQpCj4gKwkJ ZnJlZV9wYWdlKCh1bnNpZ25lZCBsb25nKXB1ZCk7Cj4gK30KPiArCj4gKyNkZWZpbmUgX19wdWRf ZnJlZV90bGIodGxiLCBwdWQsIGFkZHIpICBwdWRfZnJlZSgodGxiKS0+bW0sIHB1ZCkKPiAgI2Vu ZGlmIC8qIF9fUEFHRVRBQkxFX1BNRF9GT0xERUQgKi8KPiAKPiAgI2RlZmluZSBwbWRfcGd0YWJs ZShwbWQpCXBtZF9wYWdlKHBtZCkKPiBkaWZmIC0tZ2l0IGEvYXJjaC9yaXNjdi9pbmNsdWRlL2Fz bS9wZ3RhYmxlLTY0LmgKPiBiL2FyY2gvcmlzY3YvaW5jbHVkZS9hc20vcGd0YWJsZS02NC5oCj4g aW5kZXggYjE1ZjcwYTFmZGZhLi5jODRjMzFmYmY4ZGEgMTAwNjQ0Cj4gLS0tIGEvYXJjaC9yaXNj di9pbmNsdWRlL2FzbS9wZ3RhYmxlLTY0LmgKPiArKysgYi9hcmNoL3Jpc2N2L2luY2x1ZGUvYXNt L3BndGFibGUtNjQuaAo+IEBAIC04LDE2ICs4LDMyIEBACj4gCj4gICNpbmNsdWRlIDxsaW51eC9j b25zdC5oPgo+IAo+IC0jZGVmaW5lIFBHRElSX1NISUZUICAgICAzMAo+ICtleHRlcm4gYm9vbCBw Z3RhYmxlX2w0X2VuYWJsZWQ7Cj4gKwo+ICsjZGVmaW5lIFBHRElSX1NISUZUICAgICAocGd0YWJs ZV9sNF9lbmFibGVkID8gMzkgOiAzMCkKPiAgLyogU2l6ZSBvZiByZWdpb24gbWFwcGVkIGJ5IGEg cGFnZSBnbG9iYWwgZGlyZWN0b3J5ICovCj4gICNkZWZpbmUgUEdESVJfU0laRSAgICAgIChfQUMo MSwgVUwpIDw8IFBHRElSX1NISUZUKQo+ICAjZGVmaW5lIFBHRElSX01BU0sgICAgICAofihQR0RJ Ul9TSVpFIC0gMSkpCj4gCj4gKy8qIHB1ZCBpcyBmb2xkZWQgaW50byBwZ2QgaW4gY2FzZSBvZiAz LWxldmVsIHBhZ2UgdGFibGUgKi8KPiArI2RlZmluZSBQVURfU0hJRlQJMzAKPiArI2RlZmluZSBQ VURfU0laRQkoX0FDKDEsIFVMKSA8PCBQVURfU0hJRlQpCj4gKyNkZWZpbmUgUFVEX01BU0sJKH4o UFVEX1NJWkUgLSAxKSkKPiArCj4gICNkZWZpbmUgUE1EX1NISUZUICAgICAgIDIxCj4gIC8qIFNp emUgb2YgcmVnaW9uIG1hcHBlZCBieSBhIHBhZ2UgbWlkZGxlIGRpcmVjdG9yeSAqLwo+ICAjZGVm aW5lIFBNRF9TSVpFICAgICAgICAoX0FDKDEsIFVMKSA8PCBQTURfU0hJRlQpCj4gICNkZWZpbmUg UE1EX01BU0sgICAgICAgICh+KFBNRF9TSVpFIC0gMSkpCj4gCj4gKy8qIFBhZ2UgVXBwZXIgRGly ZWN0b3J5IGVudHJ5ICovCj4gK3R5cGVkZWYgc3RydWN0IHsKPiArCXVuc2lnbmVkIGxvbmcgcHVk Owo+ICt9IHB1ZF90Owo+ICsKPiArI2RlZmluZSBwdWRfdmFsKHgpICAgICAgKCh4KS5wdWQpCj4g KyNkZWZpbmUgX19wdWQoeCkgICAgICAgICgocHVkX3QpIHsgKHgpIH0pCj4gKyNkZWZpbmUgUFRS U19QRVJfUFVEICAgIChQQUdFX1NJWkUgLyBzaXplb2YocHVkX3QpKQo+ICsKPiAgLyogUGFnZSBN aWRkbGUgRGlyZWN0b3J5IGVudHJ5ICovCj4gIHR5cGVkZWYgc3RydWN0IHsKPiAgCXVuc2lnbmVk IGxvbmcgcG1kOwo+IEBAIC02MCw2ICs3NiwxNiBAQCBzdGF0aWMgaW5saW5lIHZvaWQgcHVkX2Ns ZWFyKHB1ZF90ICpwdWRwKQo+ICAJc2V0X3B1ZChwdWRwLCBfX3B1ZCgwKSk7Cj4gIH0KPiAKPiAr c3RhdGljIGlubGluZSBwdWRfdCBwZm5fcHVkKHVuc2lnbmVkIGxvbmcgcGZuLCBwZ3Byb3RfdCBw cm90KQo+ICt7Cj4gKwlyZXR1cm4gX19wdWQoKHBmbiA8PCBfUEFHRV9QRk5fU0hJRlQpIHwgcGdw cm90X3ZhbChwcm90KSk7Cj4gK30KPiArCj4gK3N0YXRpYyBpbmxpbmUgdW5zaWduZWQgbG9uZyBf cHVkX3BmbihwdWRfdCBwdWQpCj4gK3sKPiArCXJldHVybiBwdWRfdmFsKHB1ZCkgPj4gX1BBR0Vf UEZOX1NISUZUOwo+ICt9Cj4gKwo+ICBzdGF0aWMgaW5saW5lIHVuc2lnbmVkIGxvbmcgcHVkX3Bh Z2VfdmFkZHIocHVkX3QgcHVkKQo+ICB7Cj4gIAlyZXR1cm4gKHVuc2lnbmVkIGxvbmcpcGZuX3Rv X3ZpcnQocHVkX3ZhbChwdWQpID4+IF9QQUdFX1BGTl9TSElGVCk7Cj4gQEAgLTcwLDYgKzk2LDE1 IEBAIHN0YXRpYyBpbmxpbmUgc3RydWN0IHBhZ2UgKnB1ZF9wYWdlKHB1ZF90IHB1ZCkKPiAgCXJl dHVybiBwZm5fdG9fcGFnZShwdWRfdmFsKHB1ZCkgPj4gX1BBR0VfUEZOX1NISUZUKTsKPiAgfQo+ IAo+ICsjZGVmaW5lIG1tX3B1ZF9mb2xkZWQJbW1fcHVkX2ZvbGRlZAo+ICtzdGF0aWMgaW5saW5l IGJvb2wgbW1fcHVkX2ZvbGRlZChzdHJ1Y3QgbW1fc3RydWN0ICptbSkKPiArewo+ICsJaWYgKHBn dGFibGVfbDRfZW5hYmxlZCkKPiArCQlyZXR1cm4gZmFsc2U7Cj4gKwo+ICsJcmV0dXJuIHRydWU7 Cj4gK30KPiArCj4gICNkZWZpbmUgcG1kX2luZGV4KGFkZHIpICgoKGFkZHIpID4+IFBNRF9TSElG VCkgJiAoUFRSU19QRVJfUE1EIC0gMSkpCj4gCj4gIHN0YXRpYyBpbmxpbmUgcG1kX3QgKnBtZF9v ZmZzZXQocHVkX3QgKnB1ZCwgdW5zaWduZWQgbG9uZyBhZGRyKQo+IEBAIC05MCw0ICsxMjUsNjQg QEAgc3RhdGljIGlubGluZSB1bnNpZ25lZCBsb25nIF9wbWRfcGZuKHBtZF90IHBtZCkKPiAgI2Rl ZmluZSBwbWRfRVJST1IoZSkgXAo+ICAJcHJfZXJyKCIlczolZDogYmFkIHBtZCAlMDE2bHguXG4i LCBfX0ZJTEVfXywgX19MSU5FX18sIHBtZF92YWwoZSkpCj4gCj4gKyNkZWZpbmUgcHVkX0VSUk9S KGUpCVwKPiArCXByX2VycigiJXM6JWQ6IGJhZCBwdWQgJTAxNmx4LlxuIiwgX19GSUxFX18sIF9f TElORV9fLCBwdWRfdmFsKGUpKQo+ICsKPiArc3RhdGljIGlubGluZSB2b2lkIHNldF9wNGQocDRk X3QgKnA0ZHAsIHA0ZF90IHA0ZCkKPiArewo+ICsJaWYgKHBndGFibGVfbDRfZW5hYmxlZCkKPiAr CQkqcDRkcCA9IHA0ZDsKPiArCWVsc2UKPiArCQlzZXRfcHVkKChwdWRfdCAqKXA0ZHAsIChwdWRf dCl7IHA0ZF92YWwocDRkKSB9KTsKPiArfQo+ICsKPiArc3RhdGljIGlubGluZSBpbnQgcDRkX25v bmUocDRkX3QgcDRkKQo+ICt7Cj4gKwlpZiAocGd0YWJsZV9sNF9lbmFibGVkKQo+ICsJCXJldHVy biAocDRkX3ZhbChwNGQpID09IDApOwo+ICsKPiArCXJldHVybiAwOwo+ICt9Cj4gKwo+ICtzdGF0 aWMgaW5saW5lIGludCBwNGRfcHJlc2VudChwNGRfdCBwNGQpCj4gK3sKPiArCWlmIChwZ3RhYmxl X2w0X2VuYWJsZWQpCj4gKwkJcmV0dXJuIChwNGRfdmFsKHA0ZCkgJiBfUEFHRV9QUkVTRU5UKTsK PiArCj4gKwlyZXR1cm4gMTsKPiArfQo+ICsKPiArc3RhdGljIGlubGluZSBpbnQgcDRkX2JhZChw NGRfdCBwNGQpCj4gK3sKPiArCWlmIChwZ3RhYmxlX2w0X2VuYWJsZWQpCj4gKwkJcmV0dXJuICFw NGRfcHJlc2VudChwNGQpOwo+ICsKPiArCXJldHVybiAwOwo+ICt9Cj4gKwo+ICtzdGF0aWMgaW5s aW5lIHZvaWQgcDRkX2NsZWFyKHA0ZF90ICpwNGQpCj4gK3sKPiArCWlmIChwZ3RhYmxlX2w0X2Vu YWJsZWQpCj4gKwkJc2V0X3A0ZChwNGQsIF9fcDRkKDApKTsKPiArfQo+ICsKPiArc3RhdGljIGlu bGluZSB1bnNpZ25lZCBsb25nIHA0ZF9wYWdlX3ZhZGRyKHA0ZF90IHA0ZCkKPiArewo+ICsJaWYg KHBndGFibGVfbDRfZW5hYmxlZCkKPiArCQlyZXR1cm4gKHVuc2lnbmVkIGxvbmcpcGZuX3RvX3Zp cnQoCj4gKwkJCQlwNGRfdmFsKHA0ZCkgPj4gX1BBR0VfUEZOX1NISUZUKTsKPiArCj4gKwlyZXR1 cm4gcHVkX3BhZ2VfdmFkZHIoKHB1ZF90KSB7IHA0ZF92YWwocDRkKSB9KTsKPiArfQo+ICsKPiAr I2RlZmluZSBwdWRfaW5kZXgoYWRkcikgKCgoYWRkcikgPj4gUFVEX1NISUZUKSAmIChQVFJTX1BF Ul9QVUQgLSAxKSkKPiArCj4gK3N0YXRpYyBpbmxpbmUgcHVkX3QgKnB1ZF9vZmZzZXQocDRkX3Qg KnA0ZCwgdW5zaWduZWQgbG9uZyBhZGRyZXNzKQo+ICt7Cj4gKwlpZiAocGd0YWJsZV9sNF9lbmFi bGVkKQo+ICsJCXJldHVybiAocHVkX3QgKilwNGRfcGFnZV92YWRkcigqcDRkKSArIHB1ZF9pbmRl eChhZGRyZXNzKTsKPiArCj4gKwlyZXR1cm4gKHB1ZF90ICopcDRkOwo+ICt9Cj4gKwoKSW4gbXkg dGVzdCBJIGhhZCB0byBwdXQKI2RlZmluZSBwdWRfb2Zmc2V0IHB1ZF9vZmZzZXQKaGVyZSBvciBl bHNlIEkgZ290IGEgY29tcGlsYXRpb24gZXJyb3IgZHVlIHRvIHB1ZF9vZmZzZXQgYmVpbmcgcmVk ZWZpbmVkIApvbiBpbmNsdWRlL2xpbnV4L3BndGFibGUuaDoKCiNpZm5kZWYgcHVkX29mZnNldApz dGF0aWMgaW5saW5lIHB1ZF90ICpwdWRfb2Zmc2V0KHA0ZF90ICpwNGQsIHVuc2lnbmVkIGxvbmcg YWRkcmVzcykKewogICAgICAgICByZXR1cm4gKHB1ZF90ICopcDRkX3BhZ2VfdmFkZHIoKnA0ZCkg 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Ghiti Cc: Paul Walmsley , Palmer Dabbelt , Zong Li , Anup Patel , Christoph Hellwig , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 5/8] riscv: Implement sv48 support Organization: FORTH In-Reply-To: <20200603081104.14004-6-alex@ghiti.fr> References: <20200603081104.14004-1-alex@ghiti.fr> <20200603081104.14004-6-alex@ghiti.fr> Message-ID: <74a770fcf00980281b60bb3f6274419d@mailhost.ics.forth.gr> X-Sender: mick@mailhost.ics.forth.gr User-Agent: Roundcube Webmail/1.3.9 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrALMWRmVeSWpSXmKPExsXSHT1dWfe39fc4g3Nv1Cye3fnKatHy4R2r xcrVR5ksLu+aw2ax7XMLm8XLyz3MFm2z+C0+3J3N5sDhMfX3GRaPNy9fsnjcOzGN1WPzknqP 3Tcb2DwuNV9n9/i8SS6APYrLJiU1J7MstUjfLoEr42LzevaCHYEVi19vZ2lgvO/QxcjBISFg IvH7rX0XIxeHkMBRRolnp+awdzFyAsVNJWbv7WQEsXkFBCVOznzCAmIzC1hITL2ynxHClpdo 3jqbGcRmEVCV2NhyC6yXTUBTYv6lgywg80UElCV2HlEGmc8s0M8k0bznKViNsIClxMLf55lA bH4BYYlPdy+ygticAsYS71v6wGqEBKIlTsz+wwgyh1fAReJAexzEaSoSH34/ACsRBRp/8/Bz 9gmMgrOQXDoLyaWzkFy6gJF5FaNAYpmxXmZysV5aflFJhl560SZGcCQw+u5gvL35rd4hRiYO xkOMEhzMSiK8n62/xQnxpiRWVqUW5ccXleakFh9ilOZgURLnzeNeHiskkJ5YkpqdmlqQWgST ZeLglGpgSpZk8pd4Jbdq4rv3l2doL1I+/uRu1eNrX/zKzjNs+ePJUZa97v3LEoVvkxSjDjxW augT0Njl2HkplOdU7OTQ6UEplmbapT1KPasfZCwqfLIjf/Xdf4mfDocueLdptejryJQTXF9a ojpzG0UkcmfcmWPXdsYwSfmJrsGFP4Ip96tFXV0fnDAMiz98hfG7xp2Cdf5Hr5steaLAEBLv yFNrqLxr8sZykxdPbnxYsTSOPezj8hOJar3SO894WLEeEBI0ttmse+u1rxOT8/q9B+P+dk/I 5uLerf9DZUN8yt7yuf4CPc/1n+UtaWPWkd1dXFe631K7YVev+vqM3qtnHkwsS/fcJe4rs/+k qWUXDw+jEktxRqKhFnNRcSIAFlZWlfMCAAA= X-Greylist: inspected by milter-greylist-4.6.2 (mailgate-2.ics.forth.gr [139.91.1.5]); Sat, 27 Jun 2020 12:30:53 +0000 (GMT) for IP:'139.91.1.77' DOMAIN:'av3in' HELO:'av3.ics.forth.gr' FROM:'mick@ics.forth.gr' RCPT:'' X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mailgate-2.ics.forth.gr [139.91.1.5]); Sat, 27 Jun 2020 12:30:53 +0000 (GMT) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Στις 2020-06-03 11:11, Alexandre Ghiti έγραψε: > By adding a new 4th level of page table, give the possibility to 64bit > kernel to address 2^48 bytes of virtual address: in practice, that > roughly > offers ~160TB of virtual address space to userspace and allows up to > 64TB > of physical memory. > > If the underlying hardware does not support sv48, we will automatically > fallback to a standard 3-level page table by folding the new PUD level > into > PGDIR level. In order to detect HW capabilities at runtime, we > use SATP feature that ignores writes with an unsupported mode. > > Signed-off-by: Alexandre Ghiti > Reviewed-by: Anup Patel > --- > arch/riscv/Kconfig | 6 +- > arch/riscv/include/asm/csr.h | 3 +- > arch/riscv/include/asm/fixmap.h | 1 + > arch/riscv/include/asm/page.h | 15 +++ > arch/riscv/include/asm/pgalloc.h | 36 +++++++ > arch/riscv/include/asm/pgtable-64.h | 97 ++++++++++++++++- > arch/riscv/include/asm/pgtable.h | 10 +- > arch/riscv/kernel/head.S | 3 +- > arch/riscv/mm/context.c | 2 +- > arch/riscv/mm/init.c | 158 +++++++++++++++++++++++++--- > 10 files changed, 307 insertions(+), 24 deletions(-) > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index e167f16131f4..3f73f60e9732 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -68,6 +68,7 @@ config RISCV > select ARCH_HAS_GCOV_PROFILE_ALL > select HAVE_COPY_THREAD_TLS > select HAVE_ARCH_KASAN if MMU && 64BIT > + select RELOCATABLE if 64BIT > > config ARCH_MMAP_RND_BITS_MIN > default 18 if 64BIT > @@ -106,7 +107,7 @@ config PAGE_OFFSET > default 0xC0000000 if 32BIT && MAXPHYSMEM_2GB > default 0x80000000 if 64BIT && !MMU > default 0xffffffff80000000 if 64BIT && MAXPHYSMEM_2GB > - default 0xffffffe000000000 if 64BIT && !MAXPHYSMEM_2GB > + default 0xffffc00000000000 if 64BIT && !MAXPHYSMEM_2GB > > config ARCH_FLATMEM_ENABLE > def_bool y > @@ -155,8 +156,11 @@ config GENERIC_HWEIGHT > config FIX_EARLYCON_MEM > def_bool MMU > > +# On a 64BIT relocatable kernel, the 4-level page table is at runtime > folded > +# on a 3-level page table when sv48 is not supported. > config PGTABLE_LEVELS > int > + default 4 if 64BIT && RELOCATABLE > default 3 if 64BIT > default 2 > > diff --git a/arch/riscv/include/asm/csr.h > b/arch/riscv/include/asm/csr.h > index cec462e198ce..d41536c3f8d4 100644 > --- a/arch/riscv/include/asm/csr.h > +++ b/arch/riscv/include/asm/csr.h > @@ -40,11 +40,10 @@ > #ifndef CONFIG_64BIT > #define SATP_PPN _AC(0x003FFFFF, UL) > #define SATP_MODE_32 _AC(0x80000000, UL) > -#define SATP_MODE SATP_MODE_32 > #else > #define SATP_PPN _AC(0x00000FFFFFFFFFFF, UL) > #define SATP_MODE_39 _AC(0x8000000000000000, UL) > -#define SATP_MODE SATP_MODE_39 > +#define SATP_MODE_48 _AC(0x9000000000000000, UL) > #endif > > /* Exception cause high bit - is an interrupt if set */ > diff --git a/arch/riscv/include/asm/fixmap.h > b/arch/riscv/include/asm/fixmap.h > index 2368d49eb4ef..d891cf9c73c5 100644 > --- a/arch/riscv/include/asm/fixmap.h > +++ b/arch/riscv/include/asm/fixmap.h > @@ -27,6 +27,7 @@ enum fixed_addresses { > FIX_FDT = FIX_FDT_END + FIX_FDT_SIZE / PAGE_SIZE - 1, > FIX_PTE, > FIX_PMD, > + FIX_PUD, > FIX_TEXT_POKE1, > FIX_TEXT_POKE0, > FIX_EARLYCON_MEM_BASE, > diff --git a/arch/riscv/include/asm/page.h > b/arch/riscv/include/asm/page.h > index 48bb09b6a9b7..5e77fe7f0d6d 100644 > --- a/arch/riscv/include/asm/page.h > +++ b/arch/riscv/include/asm/page.h > @@ -31,7 +31,19 @@ > * When not using MMU this corresponds to the first free page in > * physical memory (aligned on a page boundary). > */ > +#ifdef CONFIG_RELOCATABLE > +#define PAGE_OFFSET __page_offset > + > +#ifdef CONFIG_64BIT > +/* > + * By default, CONFIG_PAGE_OFFSET value corresponds to SV48 address > space so > + * define the PAGE_OFFSET value for SV39. > + */ > +#define PAGE_OFFSET_L3 0xffffffe000000000 > +#endif /* CONFIG_64BIT */ > +#else > #define PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL) > +#endif /* CONFIG_RELOCATABLE */ > > #define KERN_VIRT_SIZE (-PAGE_OFFSET) > > @@ -102,6 +114,9 @@ extern unsigned long pfn_base; > extern unsigned long max_low_pfn; > extern unsigned long min_low_pfn; > extern unsigned long kernel_virt_addr; > +#ifdef CONFIG_RELOCATABLE > +extern unsigned long __page_offset; > +#endif > > #define __pa_to_va_nodebug(x) ((void *)((unsigned long) (x) + > va_pa_offset)) > #define linear_mapping_va_to_pa(x) ((unsigned long)(x) - va_pa_offset) > diff --git a/arch/riscv/include/asm/pgalloc.h > b/arch/riscv/include/asm/pgalloc.h > index 3f601ee8233f..540eaa5a8658 100644 > --- a/arch/riscv/include/asm/pgalloc.h > +++ b/arch/riscv/include/asm/pgalloc.h > @@ -36,6 +36,42 @@ static inline void pud_populate(struct mm_struct > *mm, pud_t *pud, pmd_t *pmd) > > set_pud(pud, __pud((pfn << _PAGE_PFN_SHIFT) | _PAGE_TABLE)); > } > + > +static inline void p4d_populate(struct mm_struct *mm, p4d_t *p4d, > pud_t *pud) > +{ > + if (pgtable_l4_enabled) { > + unsigned long pfn = virt_to_pfn(pud); > + > + set_p4d(p4d, __p4d((pfn << _PAGE_PFN_SHIFT) | _PAGE_TABLE)); > + } > +} > + > +static inline void p4d_populate_safe(struct mm_struct *mm, p4d_t *p4d, > + pud_t *pud) > +{ > + if (pgtable_l4_enabled) { > + unsigned long pfn = virt_to_pfn(pud); > + > + set_p4d_safe(p4d, > + __p4d((pfn << _PAGE_PFN_SHIFT) | _PAGE_TABLE)); > + } > +} > + > +static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long > addr) > +{ > + if (pgtable_l4_enabled) > + return (pud_t *)__get_free_page( > + GFP_KERNEL | __GFP_RETRY_MAYFAIL | __GFP_ZERO); > + return NULL; > +} > + > +static inline void pud_free(struct mm_struct *mm, pud_t *pud) > +{ > + if (pgtable_l4_enabled) > + free_page((unsigned long)pud); > +} > + > +#define __pud_free_tlb(tlb, pud, addr) pud_free((tlb)->mm, pud) > #endif /* __PAGETABLE_PMD_FOLDED */ > > #define pmd_pgtable(pmd) pmd_page(pmd) > diff --git a/arch/riscv/include/asm/pgtable-64.h > b/arch/riscv/include/asm/pgtable-64.h > index b15f70a1fdfa..c84c31fbf8da 100644 > --- a/arch/riscv/include/asm/pgtable-64.h > +++ b/arch/riscv/include/asm/pgtable-64.h > @@ -8,16 +8,32 @@ > > #include > > -#define PGDIR_SHIFT 30 > +extern bool pgtable_l4_enabled; > + > +#define PGDIR_SHIFT (pgtable_l4_enabled ? 39 : 30) > /* Size of region mapped by a page global directory */ > #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT) > #define PGDIR_MASK (~(PGDIR_SIZE - 1)) > > +/* pud is folded into pgd in case of 3-level page table */ > +#define PUD_SHIFT 30 > +#define PUD_SIZE (_AC(1, UL) << PUD_SHIFT) > +#define PUD_MASK (~(PUD_SIZE - 1)) > + > #define PMD_SHIFT 21 > /* Size of region mapped by a page middle directory */ > #define PMD_SIZE (_AC(1, UL) << PMD_SHIFT) > #define PMD_MASK (~(PMD_SIZE - 1)) > > +/* Page Upper Directory entry */ > +typedef struct { > + unsigned long pud; > +} pud_t; > + > +#define pud_val(x) ((x).pud) > +#define __pud(x) ((pud_t) { (x) }) > +#define PTRS_PER_PUD (PAGE_SIZE / sizeof(pud_t)) > + > /* Page Middle Directory entry */ > typedef struct { > unsigned long pmd; > @@ -60,6 +76,16 @@ static inline void pud_clear(pud_t *pudp) > set_pud(pudp, __pud(0)); > } > > +static inline pud_t pfn_pud(unsigned long pfn, pgprot_t prot) > +{ > + return __pud((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot)); > +} > + > +static inline unsigned long _pud_pfn(pud_t pud) > +{ > + return pud_val(pud) >> _PAGE_PFN_SHIFT; > +} > + > static inline unsigned long pud_page_vaddr(pud_t pud) > { > return (unsigned long)pfn_to_virt(pud_val(pud) >> _PAGE_PFN_SHIFT); > @@ -70,6 +96,15 @@ static inline struct page *pud_page(pud_t pud) > return pfn_to_page(pud_val(pud) >> _PAGE_PFN_SHIFT); > } > > +#define mm_pud_folded mm_pud_folded > +static inline bool mm_pud_folded(struct mm_struct *mm) > +{ > + if (pgtable_l4_enabled) > + return false; > + > + return true; > +} > + > #define pmd_index(addr) (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)) > > static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr) > @@ -90,4 +125,64 @@ static inline unsigned long _pmd_pfn(pmd_t pmd) > #define pmd_ERROR(e) \ > pr_err("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e)) > > +#define pud_ERROR(e) \ > + pr_err("%s:%d: bad pud %016lx.\n", __FILE__, __LINE__, pud_val(e)) > + > +static inline void set_p4d(p4d_t *p4dp, p4d_t p4d) > +{ > + if (pgtable_l4_enabled) > + *p4dp = p4d; > + else > + set_pud((pud_t *)p4dp, (pud_t){ p4d_val(p4d) }); > +} > + > +static inline int p4d_none(p4d_t p4d) > +{ > + if (pgtable_l4_enabled) > + return (p4d_val(p4d) == 0); > + > + return 0; > +} > + > +static inline int p4d_present(p4d_t p4d) > +{ > + if (pgtable_l4_enabled) > + return (p4d_val(p4d) & _PAGE_PRESENT); > + > + return 1; > +} > + > +static inline int p4d_bad(p4d_t p4d) > +{ > + if (pgtable_l4_enabled) > + return !p4d_present(p4d); > + > + return 0; > +} > + > +static inline void p4d_clear(p4d_t *p4d) > +{ > + if (pgtable_l4_enabled) > + set_p4d(p4d, __p4d(0)); > +} > + > +static inline unsigned long p4d_page_vaddr(p4d_t p4d) > +{ > + if (pgtable_l4_enabled) > + return (unsigned long)pfn_to_virt( > + p4d_val(p4d) >> _PAGE_PFN_SHIFT); > + > + return pud_page_vaddr((pud_t) { p4d_val(p4d) }); > +} > + > +#define pud_index(addr) (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1)) > + > +static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address) > +{ > + if (pgtable_l4_enabled) > + return (pud_t *)p4d_page_vaddr(*p4d) + pud_index(address); > + > + return (pud_t *)p4d; > +} > + In my test I had to put #define pud_offset pud_offset here or else I got a compilation error due to pud_offset being redefined on include/linux/pgtable.h: #ifndef pud_offset static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address) { return (pud_t *)p4d_page_vaddr(*p4d) + pud_index(address); } #define pud_offset pud_offset #endif