From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from mga02.intel.com ([134.134.136.20]) by Galois.linutronix.de with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1fDdpf-00077W-Q5 for speck@linutronix.de; Wed, 02 May 2018 00:33:16 +0200 Subject: [MODERATED] Re: [patch V9 00/16] SSB References: <20180501152420.785133537@linutronix.de> <20180501181244.GA14888@char.us.oracle.com> From: Tim Chen Message-ID: <74da56f9-07c3-3625-7060-de2ceadc6854@linux.intel.com> Date: Tue, 1 May 2018 15:33:08 -0700 MIME-Version: 1.0 In-Reply-To: Content-Type: multipart/mixed; boundary="HtAKTQB0GhoAZova4XB3km8wWGyaAhtfE"; protected-headers="v1" To: speck@linutronix.de List-ID: This is an OpenPGP/MIME encrypted message (RFC 4880 and 3156) --HtAKTQB0GhoAZova4XB3km8wWGyaAhtfE Content-Type: multipart/mixed; boundary="3JizorMBYoz8DY1Elpc4CMRh00c3qkt6M" --3JizorMBYoz8DY1Elpc4CMRh00c3qkt6M Content-Type: text/plain; charset=windows-1252 Content-Language: en-US Content-Transfer-Encoding: quoted-printable On 05/01/2018 12:28 PM, speck for Tim Chen wrote: > On 05/01/2018 11:12 AM, speck for Konrad Rzeszutek Wilk wrote: >> On Tue, May 01, 2018 at 05:24:20PM +0200, speck for Thomas Gleixner wr= ote: >>> Changes vs. V8: >>> >>> Addressed review feed back and added Linus variant of >>> alternative_write_msr(). >>> >>> - Use EINVAL in the prctl >>> >>> - Fix the sbb typos >>> >>> - Make AMD default to prctl as well (Borislav) >>> >>> - Add the not affected CPU types (Tim) >>> >>> I've updated the git repository as well >>> >>> ssh://git@cvs.ou.linutronix.de/linux/speck/linux master (forced upd= ate) >>> >>> There are also two stable backport branches now: >>> >>> ssh://git@cvs.ou.linutronix.de/linux/speck/linux linux-4.16.y >>> >>> ssh://git@cvs.ou.linutronix.de/linux/speck/linux linux-4.14.y >>> >>> >>> Delta patch against V8 below. Git bundle against 4.17-rc3 follows in >>> separate mail. >> >> On my Skylake box this does what is expected: >> >> 4 >> RHEL-64 dmesg | grep -i spec >> [ 0.000000] Command line: BOOT_IMAGE=3D/boot/vmlinuz-4.17.0-rc3-v9+= root=3DUUID=3D533fa2dd-5b2f-4964-aa99-5ab349614dcd ro crashkernel=3Dauto= LANG=3Den_US.UTF-8 transparent_hugepage=3Dnever console=3Dtty0 console=3D= ttyS0,9600 rd.luks=3D0 rd.lvm=3D0 rd.md=3D0 rd.dm=3D0 netroot=3Discsi:169= =2E254.0.2:::1:iqn.2015-02.oracle.boot:uefi iscsi_param=3Dnode.session.ti= meo.replacement_timeout=3D6000 net.ifnames=3D1 nvme_core.shutdown_timeout= =3D10 ipmi_si.tryacpi=3D0 ipmi_si.trydmi=3D0 ipmi_si.trydefaults=3D0 netw= ork-config=3De2NvbmZpZzogZGlzYWJsZWR9Cg=3D=3D spec_store_bypass_disable=3D= on >> [ 0.000000] please specify mtrr_gran_size/mtrr_chunk_size >> [ 0.000000] Kernel command line: BOOT_IMAGE=3D/boot/vmlinuz-4.17.0-= rc3-v9+ root=3DUUID=3D533fa2dd-5b2f-4964-aa99-5ab349614dcd ro crashkernel= =3Dauto LANG=3Den_US.UTF-8 transparent_hugepage=3Dnever console=3Dtty0 co= nsole=3DttyS0,9600 rd.luks=3D0 rd.lvm=3D0 rd.md=3D0 rd.dm=3D0 netroot=3Di= scsi:169.254.0.2:::1:iqn.2015-02.oracle.boot:uefi iscsi_param=3Dnode.sess= ion.timeo.replacement_timeout=3D6000 net.ifnames=3D1 nvme_core.shutdown_t= imeout=3D10 ipmi_si.tryacpi=3D0 ipmi_si.trydmi=3D0 ipmi_si.trydefaults=3D= 0 network-config=3De2NvbmZpZzogZGlzYWJsZWR9Cg=3D=3D spec_store_bypass_dis= able=3Don >> [ 0.145004] Spectre V2 : Mitigation: Full generic retpoline >> [ 0.146001] Spectre V2 : Spectre v2 mitigation: Filling RSB on cont= ext switch >> [ 0.147000] Spectre V2 : Spectre v2 mitigation: Enabling Indirect B= ranch Prediction Barrier >> [ 0.148000] Spectre V2 : Enabling Restricted Speculation for firmwa= re calls >> [ 0.149004] Speculative Store Bypass: Mitigation: Speculative Store= Bypass disabled >> RHEL-64 rdmsr 0x48 --all | uni= q >> 4 >> >> And I don't see the weird issue that Tim reported? >> >> >=20 > Did a trace_printk and IBRS feature was not set when my system check it= in=20 >=20 > void x86_setup_ap_spec_ctrl(void) > { > if (boot_cpu_has(X86_FEATURE_IBRS)) > x86_set_spec_ctrl(x86_spec_ctrl_base & ~x86_spec_ctrl_m= ask); >=20 >=20 > I checked cpuid and the IBRS feature bit was there. > I will do some more digging to find out why X86_FEATURE_IBRS is not set= > by kernel on my system. Konrad, you said someone else already reported= > the IBRS issue and was that root caused? >=20 I dug out the other thread that reported the IBRS problem. Turns out that this commit=20 commit d94a155c59c98c19b98ee949eaab6a0312bbd6be Author: Kirill A. Shutemov Date: Tue Apr 10 12:27:04 2018 +0300 x86/cpu: Prevent cpuinfo_x86::x86_phys_bits adjustment corruption was causing the IBRS_FEATURE bit to get unset. I can see msr 0x48 set properly by x86_setup_ap_spec_ctrl after I reverted the patch. The cpu online/offline also works okay now for setting the MSR. Tim --3JizorMBYoz8DY1Elpc4CMRh00c3qkt6M-- --HtAKTQB0GhoAZova4XB3km8wWGyaAhtfE--