diff for duplicates of <7621494.TmiSisv7PW@amdc1227> diff --git a/a/1.txt b/N1/1.txt index a16a865..9bc8f7d 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -124,19 +124,19 @@ how to use them. [1] arch/arm/boot/dts/s3c6410-smdk6410.dtsi > + -> + serial@12C00000 { +> + serial at 12C00000 { > + status = "okay"; > + }; > + -> + serial@12C10000 { +> + serial at 12C10000 { > + status = "okay"; > + }; > + -> + serial@12C20000 { +> + serial at 12C20000 { > + status = "okay"; > + }; > + -> + serial@12860000 { +> + serial at 12860000 { Is it the correct UART address? It seems a bit off compared to addresses of other ports. @@ -144,7 +144,7 @@ of other ports. > + status = "okay"; > + }; > + -> + dwmmc0@12140000 { +> + dwmmc0 at 12140000 { > + status = "okay"; > + num-slots = <1>; > + broken-cd; @@ -168,13 +168,13 @@ This is a property of the SoC, not the board. > + pinctrl-names = "default"; > + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; > + -> + slot@0 { +> + slot at 0 { > + reg = <0>; > + bus-width = <8>; > + }; > + }; > + -> + dwmmc2@12160000 { +> + dwmmc2 at 12160000 { > + status = "okay"; > + num-slots = <1>; > + supports-highspeed; @@ -189,7 +189,7 @@ See above. > + pinctrl-names = "default"; > + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; > + -> + slot@0 { +> + slot at 0 { > + reg = <0>; > + bus-width = <4>; > + disable-wp; @@ -235,7 +235,7 @@ much different is this SoC from other SoCs from the series? > + pinctrl2 = &pinctrl_2; > + }; > + -> + chipid@10000000 { +> + chipid at 10000000 { > + compatible = "samsung,exynos4210-chipid"; > + reg = <0x10000000 0x100>; > + }; @@ -244,19 +244,19 @@ much different is this SoC from other SoCs from the series? > + #address-cells = <1>; > + #size-cells = <0>; > + -> + cpu@0 { +> + cpu at 0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a15"; > + reg = <0>; > + cci-control-port = <&cci_control1>; > + }; -> + cpu@1 { +> + cpu at 1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a15"; > + reg = <1>; > + cci-control-port = <&cci_control1>; > + }; -> + cpu@2 { +> + cpu at 2 { @unit-address suffix must match the first entry of reg property. @@ -265,7 +265,7 @@ much different is this SoC from other SoCs from the series? > + reg = <0x100>; > + cci-control-port = <&cci_control0>; > + }; -> + cpu@3 { +> + cpu at 3 { Ditto. @@ -274,7 +274,7 @@ Ditto. > + reg = <0x101>; > + cci-control-port = <&cci_control0>; > + }; -> + cpu@4 { +> + cpu at 4 { Ditto. @@ -283,7 +283,7 @@ Ditto. > + reg = <0x102>; > + cci-control-port = <&cci_control0>; > + }; -> + cpu@5 { +> + cpu at 5 { Ditto. @@ -307,14 +307,14 @@ more time to think over this and patches 4 and 7. > + #size-cells = <1>; > + ranges; > + -> + cmu_top: clock-controller@0x10010000 { +> + cmu_top: clock-controller at 0x10010000 { coding style: There should be no 0x prefix in @unit-address suffix. + all the CMU instances below. [snip] > + -> + gic:interrupt-controller@10481000 { +> + gic:interrupt-controller at 10481000 { coding style: There should be a space after the colon ending the label. @@ -330,7 +330,7 @@ coding style: There should be a space after the colon ending the label. > + interrupts = <1 9 0xf04>; > + }; > + -> + mct@100B0000 { +> + mct at 100B0000 { > + compatible = "samsung,exynos4210-mct"; > + reg = <0x100B0000 0xb00>; @@ -378,14 +378,14 @@ specifiers above and interrupt-map specifiers below. > + }; > + }; > + -> + cci@10F00000 { +> + cci at 10F00000 { > + compatible = "arm,cci-400"; > + #address-cells = <1>; > + #size-cells = <1>; > + reg = <0x10F00000 0x1000>; > + ranges = <0x0 0x10F00000 0x6000>; > + -> + cci_control0: slave-if@4000 { /* Please check again */ +> + cci_control0: slave-if at 4000 { /* Please check again */ Huh? Please check again and send correct data. @@ -394,14 +394,14 @@ Huh? Please check again and send correct data. > + reg = <0x4000 0x1000>; /* Please check again */ > + }; > + -> + cci_control1: slave-if@5000 { /* Please check again */ +> + cci_control1: slave-if at 5000 { /* Please check again */ > + compatible = "arm,cci-400-ctrl-if"; > + interface-type = "ace"; > + reg = <0x5000 0x1000>; /* Please check again */ > + }; > + }; > + -> + pinctrl_0: pinctrl@11600000 { +> + pinctrl_0: pinctrl at 11600000 { > + compatible = "samsung,exynos5260-pinctrl"; > + reg = <0x11600000 0x1000>; > + interrupts = <0 79 0>; /* GPIO_RT */ @@ -419,7 +419,7 @@ pinctrl_fsys and pinctrl_aud? > + }; [snip] > + -> + dwmmc_0: dwmmc0@12140000 { +> + dwmmc_0: dwmmc0 at 12140000 { Please use generic "mmc@" names for MMC nodes and move fifo-depth property here to SoC-level dtsi. diff --git a/a/content_digest b/N1/content_digest index 03cde7d..250beb5 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,21 +1,9 @@ "ref\01386345391-23482-1-git-send-email-rahul.sharma@samsung.com\0" "ref\01386345391-23482-4-git-send-email-rahul.sharma@samsung.com\0" - "From\0Tomasz Figa <t.figa@samsung.com>\0" - "Subject\0Re: [PATCH 3/7] ARM: dts: add dts files for exynos5260 SoC\0" + "From\0t.figa@samsung.com (Tomasz Figa)\0" + "Subject\0[PATCH 3/7] ARM: dts: add dts files for exynos5260 SoC\0" "Date\0Tue, 10 Dec 2013 18:10:18 +0100\0" - "To\0Rahul Sharma <rahul.sharma@samsung.com>\0" - "Cc\0linux-samsung-soc@vger.kernel.org" - devicetree@vger.kernel.org - linux-arm-kernel@lists.infradead.org - mturquette@linaro.org - kgene.kim@samsung.com - thomas.ab@samsung.com - tomasz.figa@gmail.com - joshi@samsung.com - pankaj.dubey@samsung.com - yg1004.jang@samsung.com - arun.kk@samsung.com - " r.sh.open@gmail.com\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Hi Pankaj, Rahul, Arun,\n" @@ -144,19 +132,19 @@ "[1] arch/arm/boot/dts/s3c6410-smdk6410.dtsi\n" "\n" "> +\n" - "> +\tserial@12C00000 {\n" + "> +\tserial at 12C00000 {\n" "> +\t\tstatus = \"okay\";\n" "> +\t};\n" "> +\n" - "> +\tserial@12C10000 {\n" + "> +\tserial at 12C10000 {\n" "> +\t\tstatus = \"okay\";\n" "> +\t};\n" "> +\n" - "> +\tserial@12C20000 {\n" + "> +\tserial at 12C20000 {\n" "> +\t\tstatus = \"okay\";\n" "> +\t};\n" "> +\n" - "> +\tserial@12860000 {\n" + "> +\tserial at 12860000 {\n" "\n" "Is it the correct UART address? It seems a bit off compared to addresses\n" "of other ports.\n" @@ -164,7 +152,7 @@ "> +\t\tstatus = \"okay\";\n" "> +\t};\n" "> +\n" - "> +\tdwmmc0@12140000 {\n" + "> +\tdwmmc0 at 12140000 {\n" "> +\t\tstatus = \"okay\";\n" "> +\t\tnum-slots = <1>;\n" "> +\t\tbroken-cd;\n" @@ -188,13 +176,13 @@ "> +\t\tpinctrl-names = \"default\";\n" "> +\t\tpinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;\n" "> +\n" - "> +\t\tslot@0 {\n" + "> +\t\tslot at 0 {\n" "> +\t\t\treg = <0>;\n" "> +\t\t\tbus-width = <8>;\n" "> +\t\t};\n" "> +\t};\n" "> +\n" - "> +\tdwmmc2@12160000 {\n" + "> +\tdwmmc2 at 12160000 {\n" "> +\t\tstatus = \"okay\";\n" "> +\t\tnum-slots = <1>;\n" "> +\t\tsupports-highspeed;\n" @@ -209,7 +197,7 @@ "> +\t\tpinctrl-names = \"default\";\n" "> +\t\tpinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;\n" "> +\n" - "> +\t\tslot@0 {\n" + "> +\t\tslot at 0 {\n" "> +\t\t\treg = <0>;\n" "> +\t\t\tbus-width = <4>;\n" "> +\t\t\tdisable-wp;\n" @@ -255,7 +243,7 @@ "> +\t\tpinctrl2 = &pinctrl_2;\n" "> +\t};\n" "> +\n" - "> +\tchipid@10000000 {\n" + "> +\tchipid at 10000000 {\n" "> +\t\tcompatible = \"samsung,exynos4210-chipid\";\n" "> +\t\treg = <0x10000000 0x100>;\n" "> +\t};\n" @@ -264,19 +252,19 @@ "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <0>;\n" "> +\n" - "> +\t\tcpu@0 {\n" + "> +\t\tcpu at 0 {\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\tcompatible = \"arm,cortex-a15\";\n" "> +\t\t\treg = <0>;\n" "> +\t\t\tcci-control-port = <&cci_control1>;\n" "> +\t\t};\n" - "> +\t\tcpu@1 {\n" + "> +\t\tcpu at 1 {\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\tcompatible = \"arm,cortex-a15\";\n" "> +\t\t\treg = <1>;\n" "> +\t\t\tcci-control-port = <&cci_control1>;\n" "> +\t\t};\n" - "> +\t\tcpu@2 {\n" + "> +\t\tcpu at 2 {\n" "\n" "@unit-address suffix must match the first entry of reg property.\n" "\n" @@ -285,7 +273,7 @@ "> +\t\t\treg = <0x100>;\n" "> +\t\t\tcci-control-port = <&cci_control0>;\n" "> +\t\t};\n" - "> +\t\tcpu@3 {\n" + "> +\t\tcpu at 3 {\n" "\n" "Ditto.\n" "\n" @@ -294,7 +282,7 @@ "> +\t\t\treg = <0x101>;\n" "> +\t\t\tcci-control-port = <&cci_control0>;\n" "> +\t\t};\n" - "> +\t\tcpu@4 {\n" + "> +\t\tcpu at 4 {\n" "\n" "Ditto.\n" "\n" @@ -303,7 +291,7 @@ "> +\t\t\treg = <0x102>;\n" "> +\t\t\tcci-control-port = <&cci_control0>;\n" "> +\t\t};\n" - "> +\t\tcpu@5 {\n" + "> +\t\tcpu at 5 {\n" "\n" "Ditto.\n" "\n" @@ -327,14 +315,14 @@ "> +\t\t#size-cells = <1>;\n" "> +\t\tranges;\n" "> +\n" - "> +\t\tcmu_top: clock-controller@0x10010000 {\n" + "> +\t\tcmu_top: clock-controller at 0x10010000 {\n" "\n" "coding style: There should be no 0x prefix in @unit-address suffix.\n" "+ all the CMU instances below.\n" "\n" "[snip]\n" "> +\n" - "> +\tgic:interrupt-controller@10481000 {\n" + "> +\tgic:interrupt-controller at 10481000 {\n" "\n" "coding style: There should be a space after the colon ending the label.\n" "\n" @@ -350,7 +338,7 @@ "> +\t\tinterrupts = <1 9 0xf04>;\n" "> +\t};\n" "> +\n" - "> +\tmct@100B0000 {\n" + "> +\tmct at 100B0000 {\n" "> +\t\tcompatible = \"samsung,exynos4210-mct\";\n" "> +\t\treg = <0x100B0000 0xb00>;\n" "\n" @@ -398,14 +386,14 @@ "> +\t\t};\n" "> +\t};\n" "> +\n" - "> +\tcci@10F00000 {\n" + "> +\tcci at 10F00000 {\n" "> +\t\tcompatible = \"arm,cci-400\";\n" "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <1>;\n" "> +\t\treg = <0x10F00000 0x1000>;\n" "> +\t\tranges = <0x0 0x10F00000 0x6000>;\n" "> +\n" - "> +\t\tcci_control0: slave-if@4000 {\t\t\t/* Please check again */\n" + "> +\t\tcci_control0: slave-if at 4000 {\t\t\t/* Please check again */\n" "\n" "Huh? Please check again and send correct data.\n" "\n" @@ -414,14 +402,14 @@ "> +\t\t\treg = <0x4000 0x1000>;\t\t\t/* Please check again */\n" "> +\t\t};\n" "> +\n" - "> +\t\tcci_control1: slave-if@5000 {\t\t\t/* Please check again */\n" + "> +\t\tcci_control1: slave-if at 5000 {\t\t\t/* Please check again */\n" "> +\t\t\tcompatible = \"arm,cci-400-ctrl-if\";\n" "> +\t\t\tinterface-type = \"ace\";\n" "> +\t\t\treg = <0x5000 0x1000>;\t\t\t/* Please check again */\n" "> +\t\t};\n" "> +\t};\n" "> +\n" - "> +\tpinctrl_0: pinctrl@11600000 {\n" + "> +\tpinctrl_0: pinctrl at 11600000 {\n" "> +\t\tcompatible = \"samsung,exynos5260-pinctrl\";\n" "> +\t\treg = <0x11600000 0x1000>;\n" "> +\t\tinterrupts = <0 79 0>;\t\t\t\t/* GPIO_RT */\n" @@ -439,7 +427,7 @@ "> +\t};\n" "[snip]\n" "> +\n" - "> +\tdwmmc_0: dwmmc0@12140000 {\n" + "> +\tdwmmc_0: dwmmc0 at 12140000 {\n" "\n" "Please use generic \"mmc@\" names for MMC nodes and move fifo-depth property\n" "here to SoC-level dtsi.\n" @@ -447,4 +435,4 @@ "Best regards,\n" Tomasz -cc35e8806a6b317ae52649af147246b83b1c146d9ccbba615c40a68bab7af737 +43f423490fd6ba6040db5e3362b2edc41a223f6a135f881cc94ae2b60bcb9301
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.