All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Summers, Stuart" <stuart.summers@intel.com>
To: "intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>,
	"Ghimiray, Himal Prasad" <himal.prasad.ghimiray@intel.com>
Cc: "Brost, Matthew" <matthew.brost@intel.com>,
	"Upadhyay, Tejas" <tejas.upadhyay@intel.com>,
	"Yadav, Arvind" <arvind.yadav@intel.com>,
	"thomas.hellstrom@linux.intel.com"
	<thomas.hellstrom@linux.intel.com>
Subject: Re: [RFC 14/15] drm/xe/vm: Add xe_vma_supports_access_ctr() helper
Date: Wed, 22 Apr 2026 20:54:33 +0000	[thread overview]
Message-ID: <766694ff7d27ea1d6879c26210d5f90e3da47ab5.camel@intel.com> (raw)
In-Reply-To: <20260318074456.2839499-15-himal.prasad.ghimiray@intel.com>

On Wed, 2026-03-18 at 13:14 +0530, Himal Prasad Ghimiray wrote:
> Hardware access counter slots are finite resources. Add a helper
> to determine whether a VMA is eligible for access counting, so
> callers can avoid wasting slots on BOs that cannot benefit from
> migration hints.
> 
> A VMA is eligible if:
>   - The device is a discrete GPU (access counters unused on iGPU)
>   - It is a CPU address mirror (SVM) VMA, which is always migratable
>   - The backing BO has more than one placement region
>   - The BO is not already resident in VRAM local to the triggering
> tile
> 
> Userptr and null VMAs are excluded as they have no associated BO.
> 
> Signed-off-by: Himal Prasad Ghimiray
> <himal.prasad.ghimiray@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_vm.c | 41
> ++++++++++++++++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_vm.h |  3 +++
>  2 files changed, 44 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> index 659504ec5a13..7f979d6205f4 100644
> --- a/drivers/gpu/drm/xe/xe_vm.c
> +++ b/drivers/gpu/drm/xe/xe_vm.c
> @@ -4356,6 +4356,47 @@ void xe_vm_snapshot_free(struct xe_vm_snapshot
> *snap)
>         kvfree(snap);
>  }
>  
> +/**
> + * xe_vma_supports_access_ctr - Determine if VMA is eligible for
> access counting
> + * @xe: Pointer to the Xe device structure
> + * @vma: The VMA
> + * @tile: Tile with which VMA bound is associated to
> + *
> + * Note, access counters are not used unless enabled in LRC.
> + */
> +bool xe_vma_supports_access_ctr(struct xe_device *xe,
> +                               struct xe_vma *vma,
> +                               struct xe_tile *tile)
> +{
> +       struct xe_bo *bo = xe_vma_bo(vma);
> +       struct ttm_resource *res;
> +
> +       if (!IS_DGFX(xe))
> +               return false;
> +
> +       if (xe_vma_is_cpu_addr_mirror(vma))
> +               return true;
> +
> +       /* userptr or using null vma*/
> +       if (!bo)

Good to assert the bo lock here...

Thanks,
Stuart

> +               return false;
> +
> +       res = bo->ttm.resource;
> +       /* if for some reason no backing store, nothing to migrate */
> +       if (!res)
> +               return false;
> +
> +       /* cannot migrate if single placement */
> +       if (bo->placement.num_placement <= 1)
> +               return false;
> +
> +       /* cannot migrate to ourself (already in VRAM local to @tile)
> */
> +       if (!tile->mem.vram || res->mem_type == tile->mem.vram-
> >placement)
> +               return false;
> +
> +       return true;
> +}
> +
>  /**
>   * xe_vma_need_vram_for_atomic - Check if VMA needs VRAM migration
> for atomic operations
>   * @xe: Pointer to the Xe device structure
> diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h
> index 127cecfcb80b..17844ef0f0b7 100644
> --- a/drivers/gpu/drm/xe/xe_vm.h
> +++ b/drivers/gpu/drm/xe/xe_vm.h
> @@ -178,6 +178,9 @@ struct xe_vma *xe_vm_find_vma_by_addr(struct
> xe_vm *vm, u64 page_addr);
>  
>  int xe_vma_need_vram_for_atomic(struct xe_device *xe, struct xe_vma
> *vma, bool is_atomic);
>  
> +bool xe_vma_supports_access_ctr(struct xe_device *xe, struct xe_vma
> *vma,
> +                               struct xe_tile *tile);
> +
>  int xe_vm_alloc_madvise_vma(struct xe_vm *vm, uint64_t addr,
> uint64_t size);
>  
>  int xe_vm_alloc_cpu_addr_mirror_vma(struct xe_vm *vm, uint64_t addr,
> uint64_t size);


  reply	other threads:[~2026-04-22 20:54 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-18  7:44 [RFC 00/15] drm/xe: Access counter consumer layer Himal Prasad Ghimiray
2026-03-18  7:34 ` ✗ CI.checkpatch: warning for " Patchwork
2026-03-18  7:35 ` ✗ CI.KUnit: failure " Patchwork
2026-03-18  7:44 ` [RFC 01/15] drm/xe: Add xe_usm_queue generic USM circular buffer Himal Prasad Ghimiray
2026-04-01 21:28   ` Matthew Brost
2026-04-06  4:46     ` Ghimiray, Himal Prasad
2026-03-18  7:44 ` [RFC 02/15] drm/xe/pagefault: Use xe_usm_queue helpers Himal Prasad Ghimiray
2026-03-18  7:44 ` [RFC 03/15] drm/xe: Stub out new access_counter layer Himal Prasad Ghimiray
2026-04-02 21:46   ` Matthew Brost
2026-04-06  5:28     ` Ghimiray, Himal Prasad
2026-04-14 20:06   ` Summers, Stuart
2026-03-18  7:44 ` [RFC 04/15] drm/xe: Implement xe_access_counter_init Himal Prasad Ghimiray
2026-03-18  7:44 ` [RFC 05/15] drm/xe: Implement xe_access_counter_handler Himal Prasad Ghimiray
2026-04-03  2:06   ` Matthew Brost
2026-03-18  7:44 ` [RFC 06/15] drm/xe: Extract xe_vma_lock_and_validate helper Himal Prasad Ghimiray
2026-04-01 22:03   ` Matthew Brost
2026-03-18  7:44 ` [RFC 07/15] drm/xe: Move ASID to FAULT VM lookup to xe_device Himal Prasad Ghimiray
2026-04-02 21:50   ` Matthew Brost
2026-04-07  6:41     ` Ghimiray, Himal Prasad
2026-03-18  7:44 ` [RFC 08/15] drm/xe: Implement xe_access_counter_queue_work Himal Prasad Ghimiray
2026-04-01 21:10   ` Matthew Brost
2026-04-01 22:01     ` Matthew Brost
2026-04-01 22:11   ` Matthew Brost
2026-04-02 22:06   ` Matthew Brost
2026-04-22 20:35   ` Summers, Stuart
2026-03-18  7:44 ` [RFC 09/15] drm/xe/trace: Add xe_vma_acc trace event for access counter notifications Himal Prasad Ghimiray
2026-04-03  1:01   ` Matthew Brost
2026-03-18  7:44 ` [RFC 10/15] drm/xe/svm: Handle svm ranges on access ctr trigger Himal Prasad Ghimiray
2026-04-03  0:25   ` Matthew Brost
2026-03-18  7:44 ` [RFC 11/15] drm/xe: Add xe_guc_access_counter layer Himal Prasad Ghimiray
2026-04-02 21:27   ` Matthew Brost
2026-04-14 21:24   ` Summers, Stuart
2026-04-22 20:38   ` Summers, Stuart
2026-03-18  7:44 ` [RFC 12/15] drm/xe/uapi: Add access counter parameter extension for exec queue Himal Prasad Ghimiray
2026-03-24 14:25   ` Francois Dugast
2026-04-01 14:46     ` Matthew Brost
2026-04-01 16:36       ` Ghimiray, Himal Prasad
2026-03-18  7:44 ` [RFC 13/15] drm/xe/lrc: Pass exec_queue to xe_lrc_create for access counter params Himal Prasad Ghimiray
2026-04-22 20:50   ` Summers, Stuart
2026-03-18  7:44 ` [RFC 14/15] drm/xe/vm: Add xe_vma_supports_access_ctr() helper Himal Prasad Ghimiray
2026-04-22 20:54   ` Summers, Stuart [this message]
2026-03-18  7:44 ` [RFC 15/15] drm/xe/pt: Set NC PTE bit for VMAs ineligible for access counting Himal Prasad Ghimiray
2026-04-03  0:09   ` Matthew Brost

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=766694ff7d27ea1d6879c26210d5f90e3da47ab5.camel@intel.com \
    --to=stuart.summers@intel.com \
    --cc=arvind.yadav@intel.com \
    --cc=himal.prasad.ghimiray@intel.com \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=matthew.brost@intel.com \
    --cc=tejas.upadhyay@intel.com \
    --cc=thomas.hellstrom@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.