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d="scan'208";a="35677900" Received: from nneronin-mobl1.ger.corp.intel.com (HELO [10.251.212.136]) ([10.251.212.136]) by orviesa007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 06:02:11 -0700 Message-ID: <76e133e5-2399-4db4-a290-70bc77ca065b@linux.intel.com> Date: Tue, 28 May 2024 15:02:37 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 02/20] drm/panel replay: Add edp1.5 Panel Replay bits and register To: =?UTF-8?Q?Jouni_H=C3=B6gander?= , intel-gfx@lists.freedesktop.org Cc: animesh.manna@intel.com, mika.kahola@intel.com References: <20240527072220.3294769-1-jouni.hogander@intel.com> <20240527072220.3294769-3-jouni.hogander@intel.com> Content-Language: en-US From: Maarten Lankhorst In-Reply-To: <20240527072220.3294769-3-jouni.hogander@intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Acked-by: Maarten Lankhorst Den 2024-05-27 kl. 09:22, skrev Jouni Högander: > Add PANEL_REPLAY_CONFIGURATION_2 register and some missing Panel Replay > bits. > > Signed-off-by: Jouni Högander > --- > include/drm/display/drm_dp.h | 16 +++++++++++++--- > 1 file changed, 13 insertions(+), 3 deletions(-) > > diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h > index 906949ca3cee..79bde372b152 100644 > --- a/include/drm/display/drm_dp.h > +++ b/include/drm/display/drm_dp.h > @@ -544,9 +544,10 @@ > /* DFP Capability Extension */ > #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > -#define DP_PANEL_REPLAY_CAP 0x0b0 /* DP 2.0 */ > -# define DP_PANEL_REPLAY_SUPPORT (1 << 0) > -# define DP_PANEL_REPLAY_SU_SUPPORT (1 << 1) > +#define DP_PANEL_REPLAY_CAP 0x0b0 /* DP 2.0 */ > +# define DP_PANEL_REPLAY_SUPPORT (1 << 0) > +# define DP_PANEL_REPLAY_SU_SUPPORT (1 << 1) > +# define DP_PANEL_REPLAY_EARLY_TRANSPORT_SUPPORT (1 << 2) /* eDP 1.5 */ > > #define DP_PANEL_PANEL_REPLAY_CAPABILITY 0xb1 > # define DP_PANEL_PANEL_REPLAY_SU_GRANULARITY_REQUIRED (1 << 5) > @@ -734,11 +735,20 @@ > > #define PANEL_REPLAY_CONFIG 0x1b0 /* DP 2.0 */ > # define DP_PANEL_REPLAY_ENABLE (1 << 0) > +# define DP_PANEL_REPLAY_VSC_SDP_CRC_EN (1 << 1) /* eDP 1.5 */ > # define DP_PANEL_REPLAY_UNRECOVERABLE_ERROR_EN (1 << 3) > # define DP_PANEL_REPLAY_RFB_STORAGE_ERROR_EN (1 << 4) > # define DP_PANEL_REPLAY_ACTIVE_FRAME_CRC_ERROR_EN (1 << 5) > # define DP_PANEL_REPLAY_SU_ENABLE (1 << 6) > > +#define PANEL_REPLAY_CONFIG2 0x1b1 /* eDP 1.5 */ > +# define DP_PANEL_REPLAY_SINK_REFRESH_RATE_UNLOCK_GRANTED (1 << 0) > +# define DP_PANEL_REPLAY_CRC_VERIFICATION (1 << 1) > +# define DP_PANEL_REPLAY_SU_Y_GRANULARITY_EXTENDED_EN (1 << 2) > +# define DP_PANEL_REPLAY_SU_Y_GRANULARITY_EXTENDED_VAL_SEL_SHIFT 3 > +# define DP_PANEL_REPLAY_SU_Y_GRANULARITY_EXTENDED_VAL_SEL_MASK (0xf << 3) > +# define DP_PANEL_REPLAY_SU_REGION_SCANLINE_CAPTURE (1 << 7) > + > #define DP_PAYLOAD_ALLOCATE_SET 0x1c0 > #define DP_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x1c1 > #define DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1c2