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mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from PH0PR11MB7636.namprd11.prod.outlook.com (2603:10b6:510:26f::13) by SA3PR11MB7534.namprd11.prod.outlook.com (2603:10b6:806:305::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.428.9; Wed, 16 Sep 2026 13:23:58 +0000 Received: from PH0PR11MB7636.namprd11.prod.outlook.com ([fe80::d611:6fa9:bc34:46b]) by PH0PR11MB7636.namprd11.prod.outlook.com ([fe80::d611:6fa9:bc34:46b%5]) with mapi id 15.21.0406.007; Wed, 16 Sep 2026 13:23:58 +0000 Message-ID: <775f1018-7f32-4319-a30d-c72b0c4809c2@intel.com> Date: Wed, 16 Sep 2026 18:53:52 +0530 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 09/13] drm/i915: Extract commit_dsb_max_cmds() To: Ville Syrjala , CC: References: <20260909161730.12969-1-ville.syrjala@linux.intel.com> <20260909161730.12969-10-ville.syrjala@linux.intel.com> Content-Language: en-GB From: "Borah, Chaitanya Kumar" In-Reply-To: <20260909161730.12969-10-ville.syrjala@linux.intel.com> Content-Type: text/plain; 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Consolidtate it all into > a single function that makes sense. > > Signed-off-by: Ville Syrjälä > --- > drivers/gpu/drm/i915/display/intel_display.c | 31 +++++++++++++------- > 1 file changed, 21 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index 7741f1395375..d7bd1b862aa9 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -7402,29 +7402,40 @@ static void intel_atomic_dsb_prepare(struct intel_atomic_state *state, > intel_color_prepare_commit(state, crtc); > } > > +static unsigned int > +commit_dsb_max_cmds(const struct intel_crtc_state *crtc_state) > +{ > + /* just enough to start the chained DSB */ nit: more accurate to call it color DSB, since this can be true for gosub too. Reviewed-by: Chaitanya Kumar Borah > + if (!crtc_state->use_dsb && !crtc_state->use_flipq) > + return 16; > + > + /* > + * Rough estimate: > + * ~64 registers per each plane * 8 planes = 512 > + * Double that for pipe stuff and other overhead. > + * ~4913 registers for 3DLUT > + * ~200 color registers * 3 HDR planes > + */ > + if (crtc_state->plane_color_changed) > + return 8192; > + else > + return 1024; > +} > + > static void intel_atomic_dsb_finish(struct intel_atomic_state *state, > struct intel_crtc *crtc) > { > struct intel_display *display = to_intel_display(state); > struct intel_crtc_state *new_crtc_state = > intel_atomic_get_new_crtc_state(state, crtc); > - unsigned int size = new_crtc_state->plane_color_changed ? 8192 : 1024; > > if (!new_crtc_state->use_flipq && > !new_crtc_state->use_dsb && > !new_crtc_state->dsb_color) > return; > > - /* > - * Rough estimate: > - * ~64 registers per each plane * 8 planes = 512 > - * Double that for pipe stuff and other overhead. > - * ~4913 registers for 3DLUT > - * ~200 color registers * 3 HDR planes > - */ > new_crtc_state->dsb_commit = intel_dsb_prepare(state, crtc, INTEL_DSB_0, > - new_crtc_state->use_dsb || > - new_crtc_state->use_flipq ? size : 16); > + commit_dsb_max_cmds(new_crtc_state)); > if (!new_crtc_state->dsb_commit) { > new_crtc_state->use_flipq = false; > new_crtc_state->use_dsb = false;