From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: multipart/mixed; boundary="===============2068883723136615079==" MIME-Version: 1.0 From: Liang, Kan To: kbuild-all@lists.01.org Subject: Re: [peterz-queue:perf/core 10/10] arch/x86/events/intel/uncore_snb.c:1111:36: warning: left shift count >= width of type Date: Sun, 09 Feb 2020 11:20:38 -0500 Message-ID: <78920963-7dcb-18eb-430a-a5bd13266578@linux.intel.com> In-Reply-To: <202002080638.0PVU4Krq%lkp@intel.com> List-Id: --===============2068883723136615079== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable On 2/7/2020 5:50 PM, kbuild test robot wrote: > tree: https://git.kernel.org/pub/scm/linux/kernel/git/peterz/queue.git = perf/core > head: 60291b1620ac0b5d07624290a0ce909a0b09863e > commit: 60291b1620ac0b5d07624290a0ce909a0b09863e [10/10] perf/x86: Add In= tel Tiger Lake uncore support > config: i386-allyesconfig (attached as .config) > compiler: gcc-7 (Debian 7.5.0-3) 7.5.0 > reproduce: > git checkout 60291b1620ac0b5d07624290a0ce909a0b09863e > # save the attached .config to linux build tree > make ARCH=3Di386 > = > If you fix the issue, kindly add following tag > Reported-by: kbuild test robot > = > All warnings (new ones prefixed by >>): > = > arch/x86/events/intel/uncore_snb.c: In function 'tgl_uncore_imc_freer= unning_init_box': >>> arch/x86/events/intel/uncore_snb.c:1111:36: warning: left shift count >= =3D width of type [-Wshift-count-overflow] > addr |=3D ((resource_size_t)mch_bar << 32); > ^~ > The patch as below should fix the warning. But I didn't do any test with = 32 bit OS. I'm not sure if we still support 32 bit. Peter, could you please let me know if I should submit a separate patch = to fix the warning? diff --git a/arch/x86/events/intel/uncore_snb.c = b/arch/x86/events/intel/uncore_snb.c index ab67b23b2106..3de1065eefc4 100644 --- a/arch/x86/events/intel/uncore_snb.c +++ b/arch/x86/events/intel/uncore_snb.c @@ -1107,8 +1107,10 @@ static void = tgl_uncore_imc_freerunning_init_box(struct intel_uncore_box *box) mch_bar &=3D ~BIT(0); addr =3D (resource_size_t)(mch_bar + TGL_UNCORE_MMIO_IMC_MEM_OFFSET * = pmu->pmu_idx); +#ifdef CONFIG_PHYS_ADDR_T_64BIT pci_read_config_dword(pdev, SNB_UNCORE_PCI_IMC_BAR_OFFSET + 4, &mch_bar); addr |=3D ((resource_size_t)mch_bar << 32); +#endif box->io_addr =3D ioremap(addr, SNB_UNCORE_PCI_IMC_MAP_SIZE); } Thanks, Kan > vim +1111 arch/x86/events/intel/uncore_snb.c > = > 1088 = > 1089 static void tgl_uncore_imc_freerunning_init_box(struct intel_unco= re_box *box) > 1090 { > 1091 struct pci_dev *pdev =3D tgl_uncore_get_mc_dev(); > 1092 struct intel_uncore_pmu *pmu =3D box->pmu; > 1093 resource_size_t addr; > 1094 u32 mch_bar; > 1095 = > 1096 if (!pdev) { > 1097 pr_warn("perf uncore: Cannot find matched IMC device.\n"); > 1098 return; > 1099 } > 1100 = > 1101 pci_read_config_dword(pdev, SNB_UNCORE_PCI_IMC_BAR_OFFSET, &mch_= bar); > 1102 /* MCHBAR is disabled */ > 1103 if (!(mch_bar & BIT(0))) { > 1104 pr_warn("perf uncore: MCHBAR is disabled. Failed to map IMC fre= e-running counters.\n"); > 1105 return; > 1106 } > 1107 mch_bar &=3D ~BIT(0); > 1108 addr =3D (resource_size_t)(mch_bar + TGL_UNCORE_MMIO_IMC_MEM_OFF= SET * pmu->pmu_idx); > 1109 = > 1110 pci_read_config_dword(pdev, SNB_UNCORE_PCI_IMC_BAR_OFFSET + 4, &= mch_bar); >> 1111 addr |=3D ((resource_size_t)mch_bar << 32); > 1112 = > 1113 box->io_addr =3D ioremap(addr, SNB_UNCORE_PCI_IMC_MAP_SIZE); > 1114 } > 1115 = > = > --- > 0-DAY CI Kernel Test Service, Intel Corporation > https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org >=20 --===============2068883723136615079==--