diff for duplicates of <78f6d86ccad40442ff24946e2dabbbbb9862c535.camel@mediatek.com> diff --git a/N1/2.bin b/N1/2.bin new file mode 100644 index 0000000..d7c727d --- /dev/null +++ b/N1/2.bin @@ -0,0 +1,271 @@ +<html><body><p> +<pre> +On Wed, 2025-02-12 at 04:08 +0000, CK Hu (胡俊光) wrote: +> Hi, Paul: +>  +> On Fri, 2025-01-10 at 20:34 +0800, paul-pl.chen wrote: +> > From: "Nancy.Lin" <nancy.lin@mediatek.com> +> >  +> > OUTPROC handles the post-stage of pixel processing in +> > the overlapping procedure.OUTPROC manages pixels for +> > gamma correction and ensures that pixel values are +> > within the correct range. +> >  +> > Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> +> > Signed-off-by: Paul-pl.Chen <paul-pl.chen@mediatek.com> +> > --- +> >  drivers/gpu/drm/mediatek/Makefile           |   1 + +> >  drivers/gpu/drm/mediatek/mtk_ddp_comp.c     |   1 + +> >  drivers/gpu/drm/mediatek/mtk_ddp_comp.h     |   1 + +> >  drivers/gpu/drm/mediatek/mtk_disp_drv.h     |  14 ++ +> >  drivers/gpu/drm/mediatek/mtk_disp_outproc.c | 244 +> > ++++++++++++++++++++ +> >  drivers/gpu/drm/mediatek/mtk_disp_outproc.h |  22 ++ +> >  drivers/gpu/drm/mediatek/mtk_drm_drv.c      |   1 + +> >  drivers/gpu/drm/mediatek/mtk_drm_drv.h      |   1 + +> >  8 files changed, 285 insertions(+) +> >  create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_outproc.c +> >  create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_outproc.h +> >  +> >  +//snip +> > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_outproc.c +> > b/drivers/gpu/drm/mediatek/mtk_disp_outproc.c +> > new file mode 100644 +> > index 000000000000..af473eb2fb77 +> > --- /dev/null +> > +++ b/drivers/gpu/drm/mediatek/mtk_disp_outproc.c +> > @@ -0,0 +1,244 @@ +> > +// SPDX-License-Identifier: GPL-2.0-only +> > +/* +> > + * Copyright (c) 2021 MediaTek Inc. +> > + */ +> > + +> > +#include <drm/drm_fourcc.h> +> > +#include <drm/drm_framebuffer.h> +> > +#include <linux/clk.h> +> > +#include <linux/component.h> +> > +#include <linux/of_device.h> +> > +#include <linux/of_address.h> +> > +#include <linux/platform_device.h> +> > +#include <linux/reset.h> +> > +#include <linux/soc/mediatek/mtk-cmdq.h> +> > +#include <linux/soc/mediatek/mtk-mmsys.h> +> > + +> > +#include "mtk_crtc.h" +> > +#include "mtk_ddp_comp.h" +> > +#include <linux/of.h> +> > +#include "mtk_drm_drv.h" +> > +#include "mtk_disp_outproc.h" +> > + +> > +#define +> > DISP_REG_OVL_OUTPROC_INTEN0x004 +> > +#define +> > OVL_OUTPROC_FME_CPL_INTENBIT(1) +> > +#define +> > DISP_REG_OVL_OUTPROC_INTSTA0x008 +> > +#define +> > DISP_REG_OVL_OUTPROC_DATAPATH_CON0x010 +> > +#define +> > DATAPATH_CON_OUTPUT_CLAMPBIT(26) +> > + +> > +#define +> > DISP_REG_OVL_OUTPROC_EN0x020 +> > +#define +> > OVL_OUTPROC_OVL_ENBIT(0) +> > +#define +> > DISP_REG_OVL_OUTPROC_RST0x024 +> > +#define +> > OVL_OUTPROC_RSTBIT(0) +> > +#define +> > DISP_REG_OVL_OUTPROC_SHADOW_CTRL0x028 +> > +#define +> > OVL_OUTPROC_BYPASS_SHADOWBIT(2) +> > +#define +> > DISP_REG_OVL_OUTPROC_ROI_SIZE0x030 +> > + +> > +struct mtk_disp_outproc { +> > +void __iomem*regs; +> > +struct clk*clk; +> > +void(*vblank_cb)(void *data); +> > +void*vblank_cb_data; +> > +intirq; +> > +struct cmdq_client_regcmdq_reg; +> > +}; +> > + +> > +void mtk_disp_outproc_register_vblank_cb(struct device *dev, +> > + void (*vblank_cb)(void +> > *), +> > + void *vblank_cb_data) +> > +{ +> > +struct mtk_disp_outproc *priv = dev_get_drvdata(dev); +> > + +> > +priv->vblank_cb = vblank_cb; +> > +priv->vblank_cb_data = vblank_cb_data; +> > +} +> > + +> > +void mtk_disp_outproc_unregister_vblank_cb(struct device *dev) +> > +{ +> > +struct mtk_disp_outproc *priv = dev_get_drvdata(dev); +> > + +> > +priv->vblank_cb = NULL; +> > +priv->vblank_cb_data = NULL; +> > +} +> > + +> > +void mtk_disp_outproc_enable_vblank(struct device *dev) +> > +{ +> > +struct mtk_disp_outproc *priv = dev_get_drvdata(dev); +> > + +> > +writel(OVL_OUTPROC_FME_CPL_INTEN, priv->regs + +> > DISP_REG_OVL_OUTPROC_INTEN); +> > +} +> > + +> > +void mtk_disp_outproc_disable_vblank(struct device *dev) +> > +{ +> > +struct mtk_disp_outproc *priv = dev_get_drvdata(dev); +> > + +> > +writel(0x0, priv->regs + DISP_REG_OVL_OUTPROC_INTEN); +> > +} +> > + +> > +static irqreturn_t mtk_disp_outproc_irq_handler(int irq, void +> > *dev_id) +> > +{ +> > +struct mtk_disp_outproc *priv = dev_id; +> > + +> > +writel(0x0, priv->regs + DISP_REG_OVL_OUTPROC_INTSTA); +> > + +> > +if (!priv->vblank_cb) +> > +return IRQ_NONE; +> > + +> > +priv->vblank_cb(priv->vblank_cb_data); +> > + +> > +return IRQ_HANDLED; +> > +} +> > + +> > +void mtk_disp_outproc_config(struct device *dev, unsigned int w, +> > +     unsigned int h, unsigned int +> > vrefresh, +> > +     unsigned int bpc, struct cmdq_pkt +> > *cmdq_pkt) +> > +{ +> > +struct mtk_disp_outproc *priv = dev_get_drvdata(dev); +> > +unsigned int tmp; +> > + +> > +dev_dbg(dev, "%s-w:%d, h:%d\n", __func__, w, h); +> > + +> > +tmp = readl(priv->regs + +> > DISP_REG_OVL_OUTPROC_SHADOW_CTRL); +> > +tmp = tmp | OVL_OUTPROC_BYPASS_SHADOW; +> > +writel(tmp, priv->regs + +> > DISP_REG_OVL_OUTPROC_SHADOW_CTRL); +>  +> Move bypass shadow to mtk_disp_outproc_start(). +>  + +Sure, we will move the bypass shadow to mtk_disp_outproc_start(). +> > + +> > +mtk_ddp_write_mask(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, +> > priv->regs, +> > +   DISP_REG_OVL_OUTPROC_ROI_SIZE, ~0); +>  +> mtk_ddp_write(); +>  +> > +mtk_ddp_write_mask(cmdq_pkt, DATAPATH_CON_OUTPUT_CLAMP, +> > &priv->cmdq_reg, priv->regs, +> > +   DISP_REG_OVL_OUTPROC_DATAPATH_CON, +> > DATAPATH_CON_OUTPUT_CLAMP); +> > +} +> > + +> > +void mtk_disp_outproc_start(struct device *dev) +> > +{ +> > +struct mtk_disp_outproc *priv = dev_get_drvdata(dev); +> > + +> > +mtk_ddp_write_mask(NULL, OVL_OUTPROC_RST, &priv->cmdq_reg, +> > priv->regs, +> > +   DISP_REG_OVL_OUTPROC_RST, +> > OVL_OUTPROC_RST); +>  +> writel(); +>  + +Sure, I will use the writel() to replace the mtk_ddp_write_mask(). +> > +mtk_ddp_write_mask(NULL, 0, &priv->cmdq_reg, priv->regs, +> > +   DISP_REG_OVL_OUTPROC_RST, +> > OVL_OUTPROC_RST); +>  +> Some hardware reset before start. +> Some hardware reset after stop. +>  +> Could align this? +>  +Sure, we will align this part. +> > +mtk_ddp_write(NULL, 0, &priv->cmdq_reg, priv->regs, +> > +      DISP_REG_OVL_OUTPROC_INTSTA); +> > +mtk_ddp_write_mask(NULL, OVL_OUTPROC_OVL_EN, &priv- +> > >cmdq_reg, priv->regs, +> > +   DISP_REG_OVL_OUTPROC_EN, +> > OVL_OUTPROC_OVL_EN); +> > +} +> > + +> > +void mtk_disp_outproc_stop(struct device *dev) +> > +{ +> > +struct mtk_disp_outproc *priv = dev_get_drvdata(dev); +> > + +> > +mtk_ddp_write(NULL, 0, &priv->cmdq_reg, priv->regs, +> > +      DISP_REG_OVL_OUTPROC_INTEN); +>  +> OVL driver does not disable interrupt when stop. +> Align this with OVL driver. +>  +Sure I will check the driver and align this part. + +>  +//snip +> > +#if IS_REACHABLE(CONFIG_MTK_CMDQ) +> > +ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); +> > +if (ret) +> > +dev_dbg(dev, "No mediatek,gce-client-reg\n"); +> > +#endif +> > + +> > +if (of_property_read_u32_index(dev->of_node, "interrupts", +> > 0, &ret)) { +> > +dev_dbg(dev, "interrupts not defined\n"); +>  +> In binding document, interrupt is required. +> So return with error code. +>  +The interrupt is not required, I have rewrite the binding document.  +> > +} else { +> > +priv->irq = platform_get_irq(pdev, 0); +> > +if (priv->irq < 0) +> > +priv->irq = 0; +>  +> In binding document, interrupt is required. +> So return with error code. +>  +> Regards, +> CK +>  +The interrupt is not required, I have rewrite the binding document.  +The next upstream version of patch would fix this problem + + +Best,  + +Paul +>  + +</pre> +</p></body></html><!--type:text--><!--{--><pre>************* MEDIATEK Confidentiality Notice ******************** +The information contained in this e-mail message (including any +attachments) may be confidential, proprietary, privileged, or otherwise +exempt from disclosure under applicable laws. It is intended to be +conveyed only to the designated recipient(s). Any use, dissemination, +distribution, printing, retaining or copying of this e-mail (including its +attachments) by unintended recipient(s) is strictly prohibited and may +be unlawful. If you are not an intended recipient of this e-mail, or believe +that you have received this e-mail in error, please notify the sender +immediately (by replying to this e-mail), delete any and all copies of +this e-mail (including any attachments) from your system, and do not +disclose the content of this e-mail to any other person. Thank you! +</pre><!--}--> diff --git a/N1/2.hdr b/N1/2.hdr new file mode 100644 index 0000000..da1f671 --- /dev/null +++ b/N1/2.hdr @@ -0,0 +1,3 @@ +Content-Type: text/html; + charset="utf-8" +Content-Transfer-Encoding: base64 diff --git a/a/content_digest b/N1/content_digest index bd7d94b..dbc6430 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -25,7 +25,7 @@ p.zabel@pengutronix.de <p.zabel@pengutronix.de> " Sirius Wang (\347\216\213\347\232\223\346\230\261) <Sirius.Wang@mediatek.com>" " linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>\0" - "\00:1\0" + "\01:1\0" "b\0" "On Wed, 2025-02-12 at 04:08 +0000, CK Hu (\350\203\241\344\277\212\345\205\211) wrote:\n" "> Hi, Paul:\n" @@ -281,5 +281,278 @@ "\n" "Paul\n" > + "\01:2\0" + "b\0" + "<html><body><p>\r\n" + "<pre>\r\n" + "On Wed, 2025-02-12 at 04:08 +0000, CK Hu (胡俊光) wrote:\r\n" + "> Hi, Paul:\r\n" + "> \r\n" + "> On Fri, 2025-01-10 at 20:34 +0800, paul-pl.chen wrote:\r\n" + "> > From: "Nancy.Lin" <nancy.lin@mediatek.com>\r\n" + "> > \r\n" + "> > OUTPROC handles the post-stage of pixel processing in\r\n" + "> > the overlapping procedure.OUTPROC manages pixels for\r\n" + "> > gamma correction and ensures that pixel values are\r\n" + "> > within the correct range.\r\n" + "> > \r\n" + "> > Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>\r\n" + "> > Signed-off-by: Paul-pl.Chen <paul-pl.chen@mediatek.com>\r\n" + "> > ---\r\n" + "> >  drivers/gpu/drm/mediatek/Makefile           |   1 +\r\n" + "> >  drivers/gpu/drm/mediatek/mtk_ddp_comp.c     |   1 +\r\n" + "> >  drivers/gpu/drm/mediatek/mtk_ddp_comp.h     |   1 +\r\n" + "> >  drivers/gpu/drm/mediatek/mtk_disp_drv.h     |  14 ++\r\n" + "> >  drivers/gpu/drm/mediatek/mtk_disp_outproc.c | 244\r\n" + "> > ++++++++++++++++++++\r\n" + "> >  drivers/gpu/drm/mediatek/mtk_disp_outproc.h |  22 ++\r\n" + "> >  drivers/gpu/drm/mediatek/mtk_drm_drv.c      |   1 +\r\n" + "> >  drivers/gpu/drm/mediatek/mtk_drm_drv.h      |   1 +\r\n" + "> >  8 files changed, 285 insertions(+)\r\n" + "> >  create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_outproc.c\r\n" + "> >  create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_outproc.h\r\n" + "> > \r\n" + "> > \r\n" + "//snip\r\n" + "> > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_outproc.c\r\n" + "> > b/drivers/gpu/drm/mediatek/mtk_disp_outproc.c\r\n" + "> > new file mode 100644\r\n" + "> > index 000000000000..af473eb2fb77\r\n" + "> > --- /dev/null\r\n" + "> > +++ b/drivers/gpu/drm/mediatek/mtk_disp_outproc.c\r\n" + "> > @@ -0,0 +1,244 @@\r\n" + "> > +// SPDX-License-Identifier: GPL-2.0-only\r\n" + "> > +/*\r\n" + "> > + * Copyright (c) 2021 MediaTek Inc.\r\n" + "> > + */\r\n" + "> > +\r\n" + "> > +#include <drm/drm_fourcc.h>\r\n" + "> > +#include <drm/drm_framebuffer.h>\r\n" + "> > +#include <linux/clk.h>\r\n" + "> > +#include <linux/component.h>\r\n" + "> > +#include <linux/of_device.h>\r\n" + "> > +#include <linux/of_address.h>\r\n" + "> > +#include <linux/platform_device.h>\r\n" + "> > +#include <linux/reset.h>\r\n" + "> > +#include <linux/soc/mediatek/mtk-cmdq.h>\r\n" + "> > +#include <linux/soc/mediatek/mtk-mmsys.h>\r\n" + "> > +\r\n" + "> > +#include "mtk_crtc.h"\r\n" + "> > +#include "mtk_ddp_comp.h"\r\n" + "> > +#include <linux/of.h>\r\n" + "> > +#include "mtk_drm_drv.h"\r\n" + "> > +#include "mtk_disp_outproc.h"\r\n" + "> > +\r\n" + "> > +#define\r\n" + "> > DISP_REG_OVL_OUTPROC_INTEN0x004\r\n" + "> > +#define\r\n" + "> > OVL_OUTPROC_FME_CPL_INTENBIT(1)\r\n" + "> > +#define\r\n" + "> > DISP_REG_OVL_OUTPROC_INTSTA0x008\r\n" + "> > +#define\r\n" + "> > DISP_REG_OVL_OUTPROC_DATAPATH_CON0x010\r\n" + "> > +#define\r\n" + "> > DATAPATH_CON_OUTPUT_CLAMPBIT(26)\r\n" + "> > +\r\n" + "> > +#define\r\n" + "> > DISP_REG_OVL_OUTPROC_EN0x020\r\n" + "> > +#define\r\n" + "> > OVL_OUTPROC_OVL_ENBIT(0)\r\n" + "> > +#define\r\n" + "> > DISP_REG_OVL_OUTPROC_RST0x024\r\n" + "> > +#define\r\n" + "> > OVL_OUTPROC_RSTBIT(0)\r\n" + "> > +#define\r\n" + "> > DISP_REG_OVL_OUTPROC_SHADOW_CTRL0x028\r\n" + "> > +#define\r\n" + "> > OVL_OUTPROC_BYPASS_SHADOWBIT(2)\r\n" + "> > +#define\r\n" + "> > DISP_REG_OVL_OUTPROC_ROI_SIZE0x030\r\n" + "> > +\r\n" + "> > +struct mtk_disp_outproc {\r\n" + "> > +void __iomem*regs;\r\n" + "> > +struct clk*clk;\r\n" + "> > +void(*vblank_cb)(void *data);\r\n" + "> > +void*vblank_cb_data;\r\n" + "> > +intirq;\r\n" + "> > +struct cmdq_client_regcmdq_reg;\r\n" + "> > +};\r\n" + "> > +\r\n" + "> > +void mtk_disp_outproc_register_vblank_cb(struct device *dev,\r\n" + "> > + void (*vblank_cb)(void\r\n" + "> > *),\r\n" + "> > + void *vblank_cb_data)\r\n" + "> > +{\r\n" + "> > +struct mtk_disp_outproc *priv = dev_get_drvdata(dev);\r\n" + "> > +\r\n" + "> > +priv->vblank_cb = vblank_cb;\r\n" + "> > +priv->vblank_cb_data = vblank_cb_data;\r\n" + "> > +}\r\n" + "> > +\r\n" + "> > +void mtk_disp_outproc_unregister_vblank_cb(struct device *dev)\r\n" + "> > +{\r\n" + "> > +struct mtk_disp_outproc *priv = dev_get_drvdata(dev);\r\n" + "> > +\r\n" + "> > +priv->vblank_cb = NULL;\r\n" + "> > +priv->vblank_cb_data = NULL;\r\n" + "> > +}\r\n" + "> > +\r\n" + "> > +void mtk_disp_outproc_enable_vblank(struct device *dev)\r\n" + "> > +{\r\n" + "> > +struct mtk_disp_outproc *priv = dev_get_drvdata(dev);\r\n" + "> > +\r\n" + "> > +writel(OVL_OUTPROC_FME_CPL_INTEN, priv->regs +\r\n" + "> > DISP_REG_OVL_OUTPROC_INTEN);\r\n" + "> > +}\r\n" + "> > +\r\n" + "> > +void mtk_disp_outproc_disable_vblank(struct device *dev)\r\n" + "> > +{\r\n" + "> > +struct mtk_disp_outproc *priv = dev_get_drvdata(dev);\r\n" + "> > +\r\n" + "> > +writel(0x0, priv->regs + DISP_REG_OVL_OUTPROC_INTEN);\r\n" + "> > +}\r\n" + "> > +\r\n" + "> > +static irqreturn_t mtk_disp_outproc_irq_handler(int irq, void\r\n" + "> > *dev_id)\r\n" + "> > +{\r\n" + "> > +struct mtk_disp_outproc *priv = dev_id;\r\n" + "> > +\r\n" + "> > +writel(0x0, priv->regs + DISP_REG_OVL_OUTPROC_INTSTA);\r\n" + "> > +\r\n" + "> > +if (!priv->vblank_cb)\r\n" + "> > +return IRQ_NONE;\r\n" + "> > +\r\n" + "> > +priv->vblank_cb(priv->vblank_cb_data);\r\n" + "> > +\r\n" + "> > +return IRQ_HANDLED;\r\n" + "> > +}\r\n" + "> > +\r\n" + "> > +void mtk_disp_outproc_config(struct device *dev, unsigned int w,\r\n" + "> > +     unsigned int h, unsigned int\r\n" + "> > vrefresh,\r\n" + "> > +     unsigned int bpc, struct cmdq_pkt\r\n" + "> > *cmdq_pkt)\r\n" + "> > +{\r\n" + "> > +struct mtk_disp_outproc *priv = dev_get_drvdata(dev);\r\n" + "> > +unsigned int tmp;\r\n" + "> > +\r\n" + "> > +dev_dbg(dev, "%s-w:%d, h:%d\n", __func__, w, h);\r\n" + "> > +\r\n" + "> > +tmp = readl(priv->regs +\r\n" + "> > DISP_REG_OVL_OUTPROC_SHADOW_CTRL);\r\n" + "> > +tmp = tmp | OVL_OUTPROC_BYPASS_SHADOW;\r\n" + "> > +writel(tmp, priv->regs +\r\n" + "> > DISP_REG_OVL_OUTPROC_SHADOW_CTRL);\r\n" + "> \r\n" + "> Move bypass shadow to mtk_disp_outproc_start().\r\n" + "> \r\n" + "\r\n" + "Sure, we will move the bypass shadow to mtk_disp_outproc_start().\r\n" + "> > +\r\n" + "> > +mtk_ddp_write_mask(cmdq_pkt, h << 16 | w, &priv->cmdq_reg,\r\n" + "> > priv->regs,\r\n" + "> > +   DISP_REG_OVL_OUTPROC_ROI_SIZE, ~0);\r\n" + "> \r\n" + "> mtk_ddp_write();\r\n" + "> \r\n" + "> > +mtk_ddp_write_mask(cmdq_pkt, DATAPATH_CON_OUTPUT_CLAMP,\r\n" + "> > &priv->cmdq_reg, priv->regs,\r\n" + "> > +   DISP_REG_OVL_OUTPROC_DATAPATH_CON,\r\n" + "> > DATAPATH_CON_OUTPUT_CLAMP);\r\n" + "> > +}\r\n" + "> > +\r\n" + "> > +void mtk_disp_outproc_start(struct device *dev)\r\n" + "> > +{\r\n" + "> > +struct mtk_disp_outproc *priv = dev_get_drvdata(dev);\r\n" + "> > +\r\n" + "> > +mtk_ddp_write_mask(NULL, OVL_OUTPROC_RST, &priv->cmdq_reg,\r\n" + "> > priv->regs,\r\n" + "> > +   DISP_REG_OVL_OUTPROC_RST,\r\n" + "> > OVL_OUTPROC_RST);\r\n" + "> \r\n" + "> writel();\r\n" + "> \r\n" + "\r\n" + "Sure, I will use the writel() to replace the mtk_ddp_write_mask().\r\n" + "> > +mtk_ddp_write_mask(NULL, 0, &priv->cmdq_reg, priv->regs,\r\n" + "> > +   DISP_REG_OVL_OUTPROC_RST,\r\n" + "> > OVL_OUTPROC_RST);\r\n" + "> \r\n" + "> Some hardware reset before start.\r\n" + "> Some hardware reset after stop.\r\n" + "> \r\n" + "> Could align this?\r\n" + "> \r\n" + "Sure, we will align this part.\r\n" + "> > +mtk_ddp_write(NULL, 0, &priv->cmdq_reg, priv->regs,\r\n" + "> > +      DISP_REG_OVL_OUTPROC_INTSTA);\r\n" + "> > +mtk_ddp_write_mask(NULL, OVL_OUTPROC_OVL_EN, &priv-\r\n" + "> > >cmdq_reg, priv->regs,\r\n" + "> > +   DISP_REG_OVL_OUTPROC_EN,\r\n" + "> > OVL_OUTPROC_OVL_EN);\r\n" + "> > +}\r\n" + "> > +\r\n" + "> > +void mtk_disp_outproc_stop(struct device *dev)\r\n" + "> > +{\r\n" + "> > +struct mtk_disp_outproc *priv = dev_get_drvdata(dev);\r\n" + "> > +\r\n" + "> > +mtk_ddp_write(NULL, 0, &priv->cmdq_reg, priv->regs,\r\n" + "> > +      DISP_REG_OVL_OUTPROC_INTEN);\r\n" + "> \r\n" + "> OVL driver does not disable interrupt when stop.\r\n" + "> Align this with OVL driver.\r\n" + "> \r\n" + "Sure I will check the driver and align this part.\r\n" + "\r\n" + "> \r\n" + "//snip\r\n" + "> > +#if IS_REACHABLE(CONFIG_MTK_CMDQ)\r\n" + "> > +ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0);\r\n" + "> > +if (ret)\r\n" + "> > +dev_dbg(dev, "No mediatek,gce-client-reg\n");\r\n" + "> > +#endif\r\n" + "> > +\r\n" + "> > +if (of_property_read_u32_index(dev->of_node, "interrupts",\r\n" + "> > 0, &ret)) {\r\n" + "> > +dev_dbg(dev, "interrupts not defined\n");\r\n" + "> \r\n" + "> In binding document, interrupt is required.\r\n" + "> So return with error code.\r\n" + "> \r\n" + "The interrupt is not required, I have rewrite the binding document. \r\n" + "> > +} else {\r\n" + "> > +priv->irq = platform_get_irq(pdev, 0);\r\n" + "> > +if (priv->irq < 0)\r\n" + "> > +priv->irq = 0;\r\n" + "> \r\n" + "> In binding document, interrupt is required.\r\n" + "> So return with error code.\r\n" + "> \r\n" + "> Regards,\r\n" + "> CK\r\n" + "> \r\n" + "The interrupt is not required, I have rewrite the binding document. \r\n" + "The next upstream version of patch would fix this problem\r\n" + "\r\n" + "\r\n" + "Best, \r\n" + "\r\n" + "Paul\r\n" + "> \r\n" + "\r\n" + "</pre>\r\n" + "</p></body></html><!--type:text--><!--{--><pre>************* MEDIATEK Confidentiality Notice ********************\r\n" + "The information contained in this e-mail message (including any \r\n" + "attachments) may be confidential, proprietary, privileged, or otherwise\r\n" + "exempt from disclosure under applicable laws. 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