All of lore.kernel.org
 help / color / mirror / Atom feed
From: Reinette Chatre <reinette.chatre@intel.com>
To: "Luck, Tony" <tony.luck@intel.com>, "Chen, Yu C" <yu.c.chen@intel.com>
Cc: "tglx@kernel.org" <tglx@kernel.org>,
	"bp@alien8.de" <bp@alien8.de>,
	"mingo@redhat.com" <mingo@redhat.com>,
	"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
	"hpa@zytor.com" <hpa@zytor.com>,
	"fenghuay@nvidia.com" <fenghuay@nvidia.com>,
	"babu.moger@amd.com" <babu.moger@amd.com>,
	"chen.yu@linux.dev" <chen.yu@linux.dev>,
	"x86@kernel.org" <x86@kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v6 2/9] x86/resctrl: Require 64-bit x86 for resctrl support
Date: Thu, 20 Aug 2026 08:54:54 -0700	[thread overview]
Message-ID: <7911abea-d508-4401-b6de-2f6f598f08bf@intel.com> (raw)
In-Reply-To: <SJ1PR11MB608353BCA225A3F48981C08AFCA42@SJ1PR11MB6083.namprd11.prod.outlook.com>

Hi Tony,

On 8/20/26 8:20 AM, Luck, Tony wrote:
>> Reviewed at:
>> https://lore.kernel.org/lkml/d97deaa1-f42c-4fce-8ca8-5ccf8d822cd2@intel.com/
> 
> Reinette,
> 
> I've written up this draft for next series. Are you looking for something like this?
> 
>     x86/resctrl: Require 64-bit x86 for resctrl support
> 
>     All known hardware that supports Intel RDT or AMD QoS is 64-bit.
> 
>     On x86 the maximum supported memory size on a 32-bit kernel is 64GB (when
>     PAE is enabled). Linux imposes additional constraints since each 4KByte
>     page requires a 64-byte "struct page" which must reside in the always-mapped
>     3-4GByte range of the 32-bit kernel virtual address space.  This means the
>     maximum supported memory size is slightly above 32GB, but at that memory
>     size there are considerable inefficiencies as over half of kernel virtual
>     memory is dedicated to the page structures.
> 
>     The earliest server processor to support resctrl was Intel Haswell, released in
>     2014. It supported four memory channels, and production systems were advised
>     to populate all channels to provide sufficient memory bandwidth to keep the
>     cores busy. Best value DIMMs in 2014 were 16GB. So even a single socket Haswell
>     system would have more memory than could be addressed by a 32-bit kernel.

I assume above aims to justify the "no realistic use case for users to build a 32-bit
kernel on a server and enable resctrl"?

To be specific, my comment about RDT not being a "server" feature was made with Apollo
Lake [1] in mind. That system showed up in scenarios where servers do not typically venture
and per [1] its max memory size (8GB) is significantly less than what servers can support.

Apart from that it was the "no realistic use case" that tripped me. At best I think we
can say that we are not aware of 32-bit use cases?
>     Drop 32-bit support by changing the X86_CPU_RESCTRL dependency from X86
>     to X86_64.
> 
>     Since X86_CPU_RESCTRL now implies X86_64, remove the redundant X86_64
>     dependency from X86_CPU_RESCTRL_INTEL_AET.
> 
Reinette

[1] https://www.intel.com/content/www/us/en/products/sku/95594/intel-celeron-processor-j3455-2m-cache-up-to-2-30-ghz/specifications.html

  reply	other threads:[~2026-08-20 15:55 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-25  9:20 [PATCH v6 0/9] Introduce MMIO-based CMT access for Enhanced RDT Chen Yu
2026-07-25  9:22 ` [PATCH v6 1/9] x86/topology: Export topo_lookup_cpuid() for resctrl use Chen Yu
2026-08-19 22:55   ` Reinette Chatre
2026-07-25  9:22 ` [PATCH v6 2/9] x86/resctrl: Require 64-bit x86 for resctrl support Chen Yu
2026-08-19 22:55   ` Reinette Chatre
2026-08-20 15:20     ` Luck, Tony
2026-08-20 15:54       ` Reinette Chatre [this message]
2026-08-20 17:01         ` Luck, Tony
2026-08-20 17:12           ` Dave Hansen
2026-08-20 17:48             ` Reinette Chatre
2026-07-25  9:22 ` [PATCH v6 3/9] x86/resctrl: Parse ACPI ERDT table and save CACD cpumask for RMDD domains Chen Yu
2026-08-19 23:01   ` Reinette Chatre
2026-07-25  9:23 ` [PATCH v6 4/9] x86/resctrl: Attach ACPI ERDT information to L3 mon domain on CPU online Chen Yu
2026-08-19 23:04   ` Reinette Chatre
2026-07-25  9:23 ` [PATCH v6 5/9] x86/resctrl: Parse ACPI CMRC table Chen Yu
2026-08-19 23:06   ` Reinette Chatre
2026-07-25  9:23 ` [PATCH v6 6/9] x86/resctrl: Refactor the monitor read function Chen Yu
2026-08-19 23:07   ` Reinette Chatre
2026-07-25  9:23 ` [PATCH v6 7/9] fs/resctrl: Do not invoke smp_processor_id() in preemptible context Chen Yu
2026-08-19 23:08   ` Reinette Chatre
2026-07-25  9:23 ` [PATCH v6 8/9] x86/resctrl: Introduce erdt_cpu_has() and erdt_support() Chen Yu
2026-08-19 23:08   ` Reinette Chatre
2026-07-25  9:23 ` [PATCH v6 9/9] x86/resctrl: Add MMIO-based LLC occupancy monitoring support Chen Yu
2026-08-19 23:10   ` Reinette Chatre
2026-08-13  6:43 ` [PATCH v6 0/9] Introduce MMIO-based CMT access for Enhanced RDT Chen Yu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=7911abea-d508-4401-b6de-2f6f598f08bf@intel.com \
    --to=reinette.chatre@intel.com \
    --cc=babu.moger@amd.com \
    --cc=bp@alien8.de \
    --cc=chen.yu@linux.dev \
    --cc=dave.hansen@linux.intel.com \
    --cc=fenghuay@nvidia.com \
    --cc=hpa@zytor.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mingo@redhat.com \
    --cc=tglx@kernel.org \
    --cc=tony.luck@intel.com \
    --cc=x86@kernel.org \
    --cc=yu.c.chen@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.