From: Jani Nikula <jani.nikula@linux.intel.com>
To: Gustavo Sousa <gustavo.sousa@intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: Matt Roper <matthew.d.roper@intel.com>,
Suraj Kandpal <suraj.kandpal@intel.com>
Subject: Re: [PATCH v3 14/15] drm/i915/nvlp: Hook up display support
Date: Tue, 10 Feb 2026 10:48:44 +0200 [thread overview]
Message-ID: <7959152f5fc1d5accf13e19bf26ed49330bbdf48@intel.com> (raw)
In-Reply-To: <87tsvp4bv1.fsf@intel.com>
On Mon, 09 Feb 2026, Gustavo Sousa <gustavo.sousa@intel.com> wrote:
> Gustavo Sousa <gustavo.sousa@intel.com> writes:
>
>> From: Matt Roper <matthew.d.roper@intel.com>
>>
>> Although NVL-S and NVL-P are quite different on the GT side, they use
>> identical Xe3p_LPD display IP and should take all the same codepaths.
>>
>> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
>> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
>> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
>
> Jani or Rodrigo,
>
> Ack to apply this via drm-xe-next?
Acked-by: Jani Nikula <jani.nikula@intel.com>
>
> --
> Gustavo Sousa
>
>> ---
>> drivers/gpu/drm/i915/display/intel_display_device.c | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
>> index 471f236c9ddf..1a7f3ca079e8 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
>> @@ -1500,6 +1500,7 @@ static const struct {
>> INTEL_PTL_IDS(INTEL_DISPLAY_DEVICE, &ptl_desc),
>> INTEL_WCL_IDS(INTEL_DISPLAY_DEVICE, &ptl_desc),
>> INTEL_NVLS_IDS(INTEL_DISPLAY_DEVICE, &nvl_desc),
>> + INTEL_NVLP_IDS(INTEL_DISPLAY_DEVICE, &nvl_desc),
>> };
>>
>> static const struct {
>>
>> --
>> 2.52.0
--
Jani Nikula, Intel
next prev parent reply other threads:[~2026-02-10 8:48 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-06 18:35 [PATCH v3 00/15] Basic enabling patches for Xe3p_LPG and NVL-P Gustavo Sousa
2026-02-06 18:35 ` [PATCH v3 01/15] drm/xe/xe3p_lpg: Add support for graphics IP 35.10 Gustavo Sousa
2026-02-06 18:35 ` [PATCH v3 02/15] drm/xe/xe3p_lpg: Add initial workarounds for graphics version 35.10 Gustavo Sousa
2026-02-06 18:35 ` [PATCH v3 03/15] drm/xe/pat: Differentiate between primary and media for PTA Gustavo Sousa
2026-02-06 18:36 ` [PATCH v3 04/15] drm/xe/xe3p_lpg: Add new PAT table Gustavo Sousa
2026-02-06 18:36 ` [PATCH v3 05/15] drm/xe/xe3p_lpg: Add MCR steering Gustavo Sousa
2026-02-09 5:34 ` Bhadane, Dnyaneshwar
2026-02-06 18:36 ` [PATCH v3 06/15] drm/xe/xe3p_lpg: Add LRC parsing for additional RCS engine state Gustavo Sousa
2026-02-06 18:36 ` [PATCH v3 07/15] drm/xe/xe3p_lpg: Disable reporting of context switch status to GHWSP Gustavo Sousa
2026-02-06 18:36 ` [PATCH v3 08/15] drm/xe/xe3p_lpg: Drop unnecessary tuning settings Gustavo Sousa
2026-02-06 18:36 ` [PATCH v3 09/15] drm/xe/xe3p_lpg: Extend 'group ID' mask size Gustavo Sousa
2026-02-06 18:36 ` [PATCH v3 10/15] drm/xe/xe3p_lpg: Update LRC sizes Gustavo Sousa
2026-02-06 18:36 ` [PATCH v3 11/15] drm/xe/xe3p_lpg: Set STLB bank hash mode to 4KB Gustavo Sousa
2026-02-06 18:36 ` [PATCH v3 12/15] drm/xe/nvlp: Add NVL-P platform definition Gustavo Sousa
2026-02-06 18:36 ` [PATCH v3 13/15] drm/xe/nvlp: Attach MOCS table for nvlp Gustavo Sousa
2026-02-06 18:36 ` [PATCH v3 14/15] drm/i915/nvlp: Hook up display support Gustavo Sousa
2026-02-10 1:37 ` Gustavo Sousa
2026-02-10 8:48 ` Jani Nikula [this message]
2026-02-06 18:36 ` [PATCH v3 15/15] drm/xe/nvlp: Bump maximum WOPCM size Gustavo Sousa
2026-02-06 18:42 ` ✗ CI.checkpatch: warning for Basic enabling patches for Xe3p_LPG and NVL-P (rev3) Patchwork
2026-02-06 18:44 ` ✓ CI.KUnit: success " Patchwork
2026-02-06 18:59 ` ✗ CI.checksparse: warning " Patchwork
2026-02-06 19:34 ` ✓ i915.CI.BAT: success " Patchwork
2026-02-06 19:44 ` ✓ Xe.CI.BAT: " Patchwork
2026-02-07 17:39 ` ✗ i915.CI.Full: failure " Patchwork
2026-02-07 19:26 ` ✓ Xe.CI.FULL: success " Patchwork
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